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2025-05-19m68k: defconfig: Update defconfigs for v6.15-rc1Geert Uytterhoeven
- Drop CONFIG_PRIME_NUMBERS=m (auto-modular since commit 313b38a6ecb46db4 ("lib/prime_numbers: convert self-test to KUnit")), - Drop CONFIG_TEST_PRINTF=m (Replaced by auto-modular CONFIG_PRINTF_KUNIT_TEST in commit 7a79e7daa84e2302 ("printf: convert self-test to KUnit")), - Drop CONFIG_TEST_SCANF=m (Replaced by auto-modular CONFIG_SCANF_KUNIT_TEST in commit 97c1f302f2bc318e ("scanf: convert self-test to KUnit")), - Drop CONFIG_TEST_BLACKHOLE_DEV=m (replaced by auto-modular CONFIG_BLACKHOLE_DEV_KUNIT_TEST in commit b341f6fd45abb188 ("blackhole_dev: convert self-test to KUnit")). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/e7d9ff0ef58efaa3e0adcb7207e6b44d948caa25.1744615371.git.geert@linux-m68k.org
2025-05-19Fix spelling error for 'parallel'Anish Dabhane
Signed-off-by: Anish Dabhane <anishdabhane71@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250518140107.21310-1-anishdabhane71@gmail.com>
2025-05-19perf/arm-cmn: Add CMN S3 ACPI bindingRobin Murphy
An ACPI binding for CMN S3 was not yet finalised when the driver support was originally written, but v1.2 of DEN0093 "ACPI for Arm Components" has at last been published; support ACPI systems using the proper HID. Cc: stable@vger.kernel.org Fixes: 0dc2f4963f7e ("perf/arm-cmn: Support CMN S3") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/7dafe147f186423020af49d7037552ee59c60e97.1747652164.git.robin.murphy@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2025-05-19docs: admin-guide: fix typos in reporting-issues.rstShivam Sharma
Correct pin-point to pinpoint, If that the case to If that is the case, and its only slightly modified to it's only slightly modified in Documentation/admin-guide/reporting-issues.rst for proper spelling and grammar. Signed-off-by: Shivam Sharma <10sharmashivam@gmail.com> Acked-by: Thorsten Leemhuis <linux@leemhuis.info> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250518172658.6983-1-10sharmashivam@gmail.com>
2025-05-19mmc: core: Scan the eMMC boot areas for partition tableLoic Poulain
It appears that some vendors provision the boot areas with valid part tables (GPT) in order to have identifiable partitions for device and firmware specific data, such has the qualcomm CDT (Qualcomm Config Data Table). Additionally, these boot areas can be utilized to host device-specific IDs, calibration data, and other critical information. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250507134538.575912-1-loic.poulain@oss.qualcomm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-19llc: fix data loss when reading from a socket in llc_ui_recvmsg()Ilia Gavrilov
For SOCK_STREAM sockets, if user buffer size (len) is less than skb size (skb->len), the remaining data from skb will be lost after calling kfree_skb(). To fix this, move the statement for partial reading above skb deletion. Found by InfoTeCS on behalf of Linux Verification Center (linuxtesting.org) Fixes: 30a584d944fb ("[LLX]: SOCK_DGRAM interface fixes") Cc: stable@vger.kernel.org Signed-off-by: Ilia Gavrilov <Ilia.Gavrilov@infotecs.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2025-05-19Merge tag 'ovpn-net-next-20250515' of https://github.com/OpenVPN/ovpn-net-nextDavid S. Miller
Antonio Quartulli says: ==================== ovpn: pull request for net-next: ovpn 2025-05-15 this is a new version of the previous pull request. These time I have removed the fixes that we are still discussing, so that we don't hold the entire series back. There is a new fix though: it's about properly checking the return value of skb_to_sgvec_nomark(). I spotted the issue while testing pings larger than the iface's MTU on a TCP VPN connection. I have added various Closes and Link tags where applicable, so that we have references to GitHub tickets and other public discussions. Since I have resent the PR, I have also added Andrew's Reviewed-by to the first patch. Please pull or let me know if something should be changed! ==================== Signed-off-by: David S. Miller <davem@davemloft.net> Patchset highlights: - update MAINTAINERS entry for ovpn - extend selftest with more cases - avoid crash in selftest in case of getaddrinfo() failure - fix ndo_start_xmit return value on error - set ignore_df flag for IPv6 packets - drop useless reg_state check in keepalive worker - retain skb's dst when entering xmit function - fix check on skb_to_sgvec_nomark() return value
2025-05-19ASoC: qcom: sc8280xp: Add sound card support for QCS9100 and QCS9075Mohammad Rafi Shaik
Add compatibles for sound card on Qualcomm QCS9100 and QCS9075 boards. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20250519083244.4070689-3-mohammad.rafi.shaik@oss.qualcomm.com Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19ASoC: dt-bindings: qcom,sm8250: Add QCS9100 and QCS9075 sound cardMohammad Rafi Shaik
Document the bindings for the Qualcomm QCS9100 and QCS9075 board specific sound card. The bindings are the same as for other newer Qualcomm ADSP sound cards, thus keep them in existing qcom,sm8250.yaml file, even though Linux driver is separate. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20250519083244.4070689-2-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19ASoC: apple: mca: Constrain channels according to TDM maskMartin Povišer
We don't (and can't) configure the hardware correctly if the number of channels exceeds the weight of the TDM mask. Report that constraint in startup of FE. Fixes: 3df5d0d97289 ("ASoC: apple: mca: Start new platform driver") Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20250518-mca-fixes-v1-1-ee1015a695f6@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Move register definitions to <linux/spi/sh_msiof.h>Geert Uytterhoeven
Move the MSIOF register and register bit definitions from the MSIOF SPI driver to the existing header file <linux/spi/sh_msiof.h>, so they can be shared with the MSIOF I2S driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/066d1086973eb309006258484e9fe8138807e565.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Document frame start sync pulse modeGeert Uytterhoeven
Unused, but nice to have it documented. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/3d3acaab4a4125106a0655d28c09c050341c5eeb.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Double maximum DMA transfer size using two groupsGeert Uytterhoeven
The maximum DMA transfer size is limited by the maximum values that can be written to the word count fields (WDLENx) in the Transmit and Control Data Registers (SITDR2/SIRDR2). As all MSIOF variants support transferring data of multiple (two or four) groups, the maximum size can be doubled by using two groups instead of one, thus reducing setup overhead for very large SPI transfers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/bad522c76b8d225c195433977b22f95015cf2612.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Simplify BRG's Division RatioGeert Uytterhoeven
As FIELD_PREP() masks the value to be stored in the field, the Baud Rate Generator's Division Ratio handling can be simplified from a look-up table to a single subtraction. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/e736221942b0381fb53dc64109a1389f7ec5f44a.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Increase TX FIFO size for R-Car V4H/V4MGeert Uytterhoeven
The MSIOF transmit FIFOs on R-Car V4H and V4M have 256 stages. Add a new family-specific match entry to handle this. Add quirk match entries for older R-Car Gen4 Socs (R-Car V3U and S4-8) that have transmit FIFOs with only 64 stages, just like on R-Car Gen3. Update the (unused) definition of SIFCTR_TFUA for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/69cb5fc48f034d37484fa127b9864a1971a83417.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Correct RX FIFO size for R-Car Gen3Geert Uytterhoeven
According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 28, 2017, the MSIOF receive FIFOs on R-Car Gen3 SoCs have room for 256 words of 32 bits. Note that this change has no actual impact on the behavior of the driver, as SPI_CONTROLLER_MUST_TX is set, and transfer size is currenty limited to the minimum of the transmit and receive FIFO sizes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/6f74508ea4681aa0b7c6bf6810eab026725e75a3.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Correct RX FIFO size for R-Car Gen2Geert Uytterhoeven
According to Renesas Technical Updates TN-RCS-S068A/E, the MSIOF receive FIFOs on R-Car Gen2 SoCs have room for 128 words of 32 bits. Note that this change has no actual impact on the behavior of the driver, as SPI_CONTROLLER_MUST_TX is set, and transfer size is currenty limited to the minimum of the transmit and receive FIFO sizes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/fd11933f932df81d84f417a21e2179bd4fdcfdc1.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Add core support for dual-group transfersGeert Uytterhoeven
All MSIOF variants support transferring data of multiple (2 or 4) groups. Add definitions for the register bits related to multiple groups, and enhance sh_msiof_spi_set_mode_regs() to accept a second group size. For now the second group is unused. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/be75e20cfcd2a6c0d73ab09e0126f902911adc69.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Correct SIMDR2_GRPMASKGeert Uytterhoeven
The Group Output Mask is not a single bit, but a bit field, containing one bit for each of the four possible groups. Correct the definition. Note that this change has no direct impact, as the driver only uses the first group. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/ad268d67807cb7e544eddaf7a056793482a965d4.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: SIFCTR bitfield conversionGeert Uytterhoeven
Convert MSIOF FIFO Control Register field accesses to use the FIELD_PREP() bitfield access macro. This gets rid of explicit shifts and custom field preparation macros. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/0bf4c366381a8999c9755285272897300852bc18.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: SICTR bitfield conversionGeert Uytterhoeven
Convert MSIOF Control Register field accesses to use the FIELD_PREP() bitfield access macro. This gets rid of explicit shifts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/4511c678c8fce5969eb50ffa7372d53396ff80ff.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: SITSCR/SIRSCR bitfield conversionGeert Uytterhoeven
Convert MSIOF Transmit and Receive Clock Select Register field accesses to use the FIELD_PREP() bitfield access macro. This gets rid of explicit shifts and custom field preparation macros. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/f2462c99b6ea2e45b995ab4509c2f039043da032.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: SITMDR2 and SIRMDR2 bitfield conversionGeert Uytterhoeven
Convert MSIOF Transmit and Receive Mode Register 2 field accesses to use the FIELD_PREP() bitfield access macro. This gets rid of explicit shifts and custom field preparation macros. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/135b92d010a71e2c224feab3a5792724b4e60ff1.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: SITMDR1/SIRMDR1 bitfield conversionGeert Uytterhoeven
Convert MSIOF Transmit and Receive Mode Register 1 field accesses to use the FIELD_PREP() bitfield access macro. This gets rid of explicit shifts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/9685c54e752b8ef4256c9b281e9d8292e71d222e.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Make words/fs unsigned in FIFO helpersGeert Uytterhoeven
Make the words and fs parameters of the various FIFO filler and emptier functions unsigned, as they can never be negative. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/a7b13ecb1811148227ec8c883079085ed1ea6eac.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Make words/bits unsigned in sh_msiof_spi_txrx_once()Geert Uytterhoeven
Make the words and bits parameters of sh_msiof_spi_txrx_once() unsigned, as that matches what is passed by the caller. This allows us to replace min_t() by the safer min(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/30eff1052642a4bcb0f1bc4bed7aae25d355a7dc.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Use bool for boolean flagsGeert Uytterhoeven
Use bools instead of integers for boolean flags, which allows us to remove the "!!" idiom from several expressions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/35cd51bdfb3c810911a5be757e0ce5bb29dcc755.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Complete using dev in sh_msiof_spi_probe()Geert Uytterhoeven
Commit c4887bd4b35b225f ("spi: sh-msiof: use dev in sh_msiof_spi_probe()") forgot to convert one instance. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/88d271b2d16c6ad7f174858894573f91cec1bc90.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Fix maximum DMA transfer sizeGeert Uytterhoeven
The maximum amount of data to transfer in a single DMA request is calculated from the FIFO sizes (which is technically not 100% correct, but a simplification, as it is limited by the maximum word count values in the Transmit and Control Data Registers). However, in case there is both data to transmit and to receive, the transmit limit is overwritten by the receive limit. Fix this by using the minimum applicable FIFO size instead. Move the calculation outside the loop, so it is not repeated for each individual DMA transfer. As currently tx_fifo_size is always equal to rx_fifo_size, this bug had no real impact. Fixes: fe78d0b7691c0274 ("spi: sh-msiof: Fix FIFO size to 64 word from 256 word") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/d9961767a97758b2614f2ee8afe1bd56dc900a60.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Remove unneeded compatible valuesGeert Uytterhoeven
The Clock-Synchronized Serial Interfaces with FIFO (MSIOF) driver matches against both SoC-specific and family-specific compatible values to maintain backwards-compatibility with old DTBs predating the introduction of the family-specific compatible values. For RZ/G1, the SoC-specific compatible match entry can be removed from the driver: their DT always had the family-specific compatible values, and thus there was never a need to add the SoC-specific compatible values to the driver. For R-Car Gen2 and M3-W, the SoC-specific compatible match entries can be removed, too, as there are a few points in time where DT backwards-compatibility was broken for other reasons: - Legacy DT clock support is no longer supported since commit 58256143cff7c2e0 ("clk: renesas: Remove R-Car Gen2 legacy DT clock support") in v5.5, and the addition of "renesas,rcar-gen2-msiof" to DTS in v4.11 predates the completion of the clock conversion in v4.15, - Legacy DT LVDS support is no longer supported since commit 841281fe52a769fe ("drm: rcar-du: Drop LVDS device tree backward compatibility") in v5.18, and the addition of "renesas,rcar-gen3-msiof" in commit 8b51f97138ca22b6 ("arm64: dts: r8a7796: Use R-Car Gen 3 fallback binding for msiof nodes") in v4.11 predates the LVDS conversion in commit 58e8ed2ee9abe718 ("arm64: dts: renesas: Convert to new LVDS DT bindings") in v4.20. For R-Car H3, the SoC-specific compatible match entry cannot be removed, as its purpose is to handle an SoC-specific quirk. Suggested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/d33393ac7536bc3f0f624b079f70d80dd19843db.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19spi: sh-msiof: Drop comma after OF match table sentinelGeert Uytterhoeven
It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. Add a comment to clarify the purpose of the empty element. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/2ab5745407339ba54b63c3e6410082c7c566bf95.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19regulator: qcom_spmi: Constify struct spmi_voltage_rangeChristophe JAILLET
'struct spmi_voltage_range' are only modified at runtime to compile a field, n_voltages, that could be computed at compile time. So, simplify spmi_calculate_num_voltages() and compute n_voltages at compile time within the SPMI_VOLTAGE_RANGE macro. Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 85437 26776 512 112725 1b855 drivers/regulator/qcom_spmi-regulator.o After: ===== text data bss dec hex filename 86857 24760 512 112129 1b601 drivers/regulator/qcom_spmi-regulator.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/ef2a4b6df61e19470ddf6cbd1f3ca1ce88a3c1a0.1747570556.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19regulator: max8952: Correct Samsung "Electronics" spelling in copyright headersSumanth Gavini
Fix the misspelling of 'Electronics' in max8952 driver copyright headers. Signed-off-by: Sumanth Gavini <sumanth.gavini@yahoo.com> Link: https://patch.msgid.link/20250518085734.88890-7-sumanth.gavini@yahoo.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19ASoC: tas2781: Header file cleanup and Move the macro definitions to fwlibShenghao Ding
Drop the I2C in one comment, for these registers are also used in SPI driver; Move the macro definition of TASDEVICE_CMD_XXX from tas2781.h to tas2781_fmwlib.c, because the macros are only referenced in only fwlib. Signed-off-by: Shenghao Ding <shenghao-ding@ti.com> Link: https://patch.msgid.link/20250518132451.707-1-shenghao-ding@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19ASoC: rt722: make regmap cache-only in probeShuming Fan
This patch makes sure the access to the codecs is cached until the device is enumerated. Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://patch.msgid.link/20250519090645.2620292-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19dt-binding: mmc: microchip,sdhci-pic32: convert text based binding to json ↵Charan Pedumuru
schema Update text binding to YAML. Changes during conversion: Add appropriate include statements for interrupts and clock-names to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507-mchp-sdhci-v1-2-ed29de05295a@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-19OPP: switch to use kmemdup_array()Zhang Enpei
Use kmemdup_array() to avoid multiplication and possible overflows. Signed-off-by: Zhang Enpei <zhang.enpei@zte.com.cn> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-05-19drm/edid: fixed the bug that hdr metadata was not resetfeijuan.li
When DP connected to a device with HDR capability, the hdr structure was filled.Then connected to another sink device without hdr capability, but the hdr info still exist. Fixes: e85959d6cbe0 ("drm: Parse HDR metadata info from EDID") Cc: <stable@vger.kernel.org> # v5.3+ Signed-off-by: "feijuan.li" <feijuan.li@samsung.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250514063511.4151780-1-feijuan.li@samsung.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-05-19fs/ntfs3: remove ability to change compression on mounted volumeKonstantin Komarov
Remove all the code related to changing compression on the fly because it's not safe and not maintainable. Signed-off-by: Konstantin Komarov <almaz.alexandrovich@paragon-software.com>
2025-05-19crypto: ccp - Add missing tee info reg for teev2Mario Limonciello
The tee info reg for teev2 is the same as teev1. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: ccp - Add missing bootloader info reg for pspv5Mario Limonciello
The bootloader info reg for pspv5 is the same as pspv4. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: sun8i-ce - move fallback ahash_request to the end of the structOvidiu Panait
'struct ahash_request' has a flexible array at the end, so it must be the last member in a struct, to avoid overwriting other struct members. Therefore, move 'fallback_req' to the end of the 'sun8i_ce_hash_reqctx' struct. Fixes: 56f6d5aee88d ("crypto: sun8i-ce - support hash algorithms") Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: octeontx2 - Use dynamic allocated memory region for lmtstBharat Bhushan
Current driver uses static LMTST region allocated by firmware. Firmware allocated memory for LMTST is available in PF/VF BAR2. Using this memory have performance impact as this is mapped as device memory. There is another option to allocate contiguous memory at run time and map this in LMT MAP table with the help of AF driver. With this patch dynamic allocated memory is used for LMTST. Also add myself as maintainer for crypto octeontx2 driver Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: octeontx2 - Initialize cptlfs device info onceBharat Bhushan
Function otx2_cptlf_set_dev_info() initializes common fields of cptlfs data-struct. This function is called every time a cptlf is initialized but this needs be done once for a cptlf block. So this initialization is moved to early device probe code to avoid redundant initialization. Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: xts - Only add ecb if it is not already thereHerbert Xu
Only add ecb to the cipher name if it isn't already ecb. Also use memcmp instead of strncmp since these strings are all stored in an array of length CRYPTO_MAX_ALG_NAME. Fixes: f1c131b45410 ("crypto: xts - Convert to skcipher") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: lrw - Only add ecb if it is not already thereHerbert Xu
Only add ecb to the cipher name if it isn't already ecb. Also use memcmp instead of strncmp since these strings are all stored in an array of length CRYPTO_MAX_ALG_NAME. Fixes: 700cb3f5fe75 ("crypto: lrw - Convert to skcipher") Reported-by: kernel test robot <oliver.sang@intel.com> Closes: https://lore.kernel.org/oe-lkp/202505151503.d8a6cf10-lkp@intel.com Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: testmgr - Add hash export format testingHerbert Xu
Ensure that the hash state can be exported to and imported from the generic algorithm. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: testmgr - Use ahash for generic tfmHerbert Xu
As shash is being phased out, use ahash for the generic tfm. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: hmac - Add ahash supportHerbert Xu
Add ahash support to hmac so that drivers that can't do hmac in hardware do not have to implement duplicate copies of hmac. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: testmgr - Ignore EEXIST on shash allocationHerbert Xu
Soon hmac will support ahash. For compatibility hmac still supports shash so it is possible for two hmac algorithms to be registered at the same time. The shash algorithm will have the driver name "hmac-shash(XXX-driver)". Due to a quirk in the API, there is no way to locate the shash algorithm using the name "hmac(XXX-driver)". It has to be addressed as either "hmac(XXX)" or "hmac-shash(XXX-driver)". Looking it up with "hmac(XXX-driver)" will simply trigger the creation of another instance, and on the second instantiation this will fail with EEXIST. Catch the error EEXIST along with ENOENT since it is expected. If a real shash algorithm came this way, it would be addressed using the proper name "hmac-shash(XXX-driver)". Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>