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2024-10-25arm64: dts: rockchip: add HDMI pinctrl to rk3588-tiger SoMHeiko Stuebner
The Tiger SoM routes all relevant HDMI pins to its Q7 connector. Some from the M0 and some from the M1 set of pins. Add the necessary pinctrl entry to the hdmi controller for the SoM. Not all baseboards may use all pins, but even for them it'll serve documentation purposes. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20241024151403.1748554-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: tegra: smaug: Declare cros-ec extconDiogo Ivo
Leverage the Chrome OS EC in the Pixel C to convey information about the state of the USB-C port via the extcon class. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Link: https://lore.kernel.org/r/20241001-cros_ec_extcon-v1-1-1e212a1a4bbc@tecnico.ulisboa.pt Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: tegra: Add SDMMC sdr104-offsets for Tegra X1Diogo Ivo
Define the sdr104-specific offsets, preventing the driver from defaulting to the 1.8V offsets, which cause the system to hang during the SDR104 mode calibration. The zeroing of these values was chosen since it restores functionality and no better suggestions are provided by the Tegra X1 TRM. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: dts: nvidia: tegra210-smaug: Add TMP451 temperature sensor nodeJasper Korten
The Google Pixel C contains a TI TMP451 temperature sensor. Add a DT node for temperature sensor. Information gathered from downstream tree. Link: https://android.googlesource.com/kernel/tegra/+/refs/heads/android-tegra-dragon-3.18-oreo-m8/arch/arm64/boot/dts/tegra/tegra210-smaug.dtsi#1000 Signed-off-by: Jasper Korten <jja2000@gmail.com> Tested-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: dts: nvidia: tegra210-smaug: Add touchscreen nodeJasper Korten
The Google Pixel C contains a RMI4 HID over I2C touchscreen. Add a DT node for the touchscreen. Information gathered from downstream tree. Link: https://android.googlesource.com/kernel/tegra/+/refs/heads/android-tegra-dragon-3.18-oreo-m8/arch/arm64/boot/dts/tegra/tegra210-smaug.dtsi#542 Signed-off-by: Jasper Korten <jja2000@gmail.com> Tested-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: tegra: p2180: Add mandatory compatible for WiFi nodeTomasz Maciej Nowak
The dtschema requires to specify common ancestor which all SDIO chips are derived from, so add accordingly. Fixes: a50d5dcd2815 ("arm64: tegra: Wire up WiFi on Jetson TX1 module") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409030438.8tumAnp1-lkp@intel.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24arm64: dts: qcom: qcs6490-rb3gen2: Add PCIe nodesKrishna chaitanya chundru
Enable PCIe1 controller and its corresponding PHY nodes on qcs6490-rb3g2 platform. SMMU v2 has limited SID's to assign dynamic SID's with the existing logic. For now, use static iommu-map table assigning unique SID's for each port as dynamic approach needs boarder community discussions. PCIe switch connected to this board has 3 downstream ports and to the one of the downstream an embedded ethernet is connected. Assign unique SID for each downstream port and to embedded ethernet, and also reserve a SID for the endpoints which are going to be connected to the other two downstream ports. As this PCIe switch is present in this platform only update iommu-map in this platform only as other board variants might have different PCIe topology and might need different mapping. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Link: https://lore.kernel.org/r/20241024-enable_pcie-v2-1-e5a6f5da74e4@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-24arm64: dts: qcom: x1e80100-dell-xps13-9345: fix nvme regulator boot glitchAleksandrs Vinarskis
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Based on https://lore.kernel.org/all/20241016145112.24785-1-johan+linaro@kernel.org/ Fixes: f5b788d0e8cd ("arm64: dts: qcom: Add support for X1-based Dell XPS 13 9345") Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20241016202253.9677-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-24arm64: dts: qcom: x1e80100-dell-xps13-9345: route edp-panel enable gpioAleksandrs Vinarskis
tlmm 74 was experimentally found to be panel enable pin, which shall be high for panel (both low-res IPS, OLED) to work. Define it as such. Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Link: https://lore.kernel.org/r/20241016202253.9677-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-24ARM: dts: qcom: ipq4019: use nvmem-layoutRosen Penev
nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20241022002444.843484-1-rosenp@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-24arm64: dts: rockchip: reorder mmc aliases for NanoPi R3STianling Shen
Typically any non-removable storage (emmc) is listed before removable storage (sd-card) options. Also U-Boot will try to override and use mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: enable eMMC HS200 mode for NanoPi R3STianling Shen
It is required to boot from eMMC without additional patch in u-boot. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-5-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: sort props in pmu_io_domains node for NanoPi R3STianling Shen
The status prop is typically the last prop. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-4-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: replace deprecated snps,reset props for NanoPi R3STianling Shen
Replace deprecated snps,reset props and move them to the PHY node. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-3-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: fix model name for FriendlyElec NanoPi R3STianling Shen
Use the marketing name for model name, this matches the dt-binding. Also update the website url in copyright. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: Enable HDMI0 on rock-5aCristian Ciocaltea
Add the necessary DT changes to enable HDMI0 on Radxa ROCK 5A. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241022-rk3588-hdmi0-dt-v3-1-3cc981e89afb@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: Enable HDMI0 on rk3588-nanopc-t6Marcin Juszkiewicz
Add the necessary DT changes to enable HDMI0 on FriendlyELEC NanoPC-T6. Tested on LTS variant of the board but this part is the same on both. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20241023080605.623125-1-marcin.juszkiewicz@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: pwm-leds for Orange Pi 5Jimmy Hon
The green LED RUN is driven by PWM0_LED that can be controlled by PWM0_M2 Fixes: b6bc755d806e ("arm64: dts: rockchip: Add Orange Pi 5") Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241024012726.1730-2-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-24arm64: dts: rockchip: reorder audio/hdmi nodes in Orange Pi 5Jimmy Hon
Fix the node order so analog-audio is before hdmi0-con Audio was submitted first, and it wanted to live above the leds node. Next, the HDMI was submitted, but it wanted to live above the leds node. However, HDMI was approved first, so the Audio node ended up living above the leds node. Fixes: ae46756faff8 ("arm64: dts: rockchip: analog audio on Orange Pi 5") Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241024041851.5600-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-23arm64: dts: qcom: Use 'ufshc' as the node name for UFS controller nodesManivannan Sadhasivam
Devicetree binding has documented the node name for UFS controllers as 'ufshc'. So let's use it instead of 'ufs' which is for the UFS devices. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20240514-ufs-nodename-fix-v1-2-4c55483ac401@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: qcm6490-idp: Add UFS nodesManish Pandey
Add UFS host controller and Phy nodes for Qualcomm qcm6490-idp board. Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Link: https://lore.kernel.org/r/20241019063659.6324-1-quic_mapa@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-17-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sdm: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-16-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-15-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8650: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-14-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8550: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-13-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8450: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-12-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8350: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-11-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8250: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-10-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8150: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-9-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm6350: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-8-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm6115: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-7-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sc: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-6-0505bc7d2c56@linaro.org [bjorn: Update sm7325 references to match the updated case] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22ARM: dts: qcom: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-18-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sc8280xp: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-5-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sc7180: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-4-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: msm8992-libra: drop unused regulators labelsKrzysztof Kozlowski
DTS coding style expects labels to be lowercase, but the labels are not used, so just drop them. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-3-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: msm: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-2-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: ipq: change labels to lower-caseKrzysztof Kozlowski
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-1-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sm8450: Add 'global' interrupt to the PCIe RC nodeManivannan Sadhasivam
Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt to the host CPUs. This interrupt can be used by the device driver to identify events such as PCIe link specific events, safety events, etc... Hence, add it to the PCIe RC node along with the existing MSI interrupts. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240828-pci-qcom-hotplug-v4-12-263a385fbbcb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sa8775p: Add 'linux,pci-domain' to PCIe EP controller nodesManivannan Sadhasivam
'linux,pci-domain' property provides the PCI domain number for the PCI endpoint controllers in a SoC. If this property is not present, then an unstable (across boots) unique number will be assigned. Use this property to specify the domain number based on the actual hardware instance of the PCI endpoint controllers in SA8775P SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240828-pci-qcom-hotplug-v4-9-263a385fbbcb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22ARM: dts: qcom: sdx65: Add 'linux,pci-domain' to PCIe EP controller nodeManivannan Sadhasivam
'linux,pci-domain' property provides the PCI domain number for the PCI endpoint controllers in a SoC. If this property is not present, then an unstable (across boots) unique number will be assigned. Use this property to specify the domain number based on the actual hardware instance of the PCI endpoint controllers in SDX65 SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240828-pci-qcom-hotplug-v4-8-263a385fbbcb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller nodeManivannan Sadhasivam
'linux,pci-domain' property provides the PCI domain number for the PCI endpoint controllers in a SoC. If this property is not present, then an unstable (across boots) unique number will be assigned. Use this property to specify the domain number based on the actual hardware instance of the PCI endpoint controllers in SDX55 SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240828-pci-qcom-hotplug-v4-7-263a385fbbcb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sa8775p: Add TCSR halt register spaceMukesh Ojha
Enable download mode for sa8775p which can help collect ramdump for this SoC. Reviewed-by: Elliot Berman <quic_eberman@quicinc.com> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20240830133908.2246139-2-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sa8775p-ride: add WiFi/BT nodesMiaoqing Pan
Add a node for the PMU module of the WCN6855 present on the sa8775p-ride board. Assign its LDO power outputs to the existing WiFi/Bluetooth module. Signed-off-by: Miaoqing Pan <quic_miaoqing@quicinc.com> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241011041939.2916179-1-quic_miaoqing@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22arm64: dts: qcom: sa8775p: add QCrypto nodesYuvaraj Ranganathan
Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> Link: https://lore.kernel.org/r/20241017144500.3968797-3-quic_yrangana@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22Merge branch ↵Bjorn Andersson
'20241011-sa8775p-mm-v4-resend-patches-v5-0-4a9f17dc683a@quicinc.com' into arm64-for-6.13 Merge SA8775P multimedia clock bindings into the DeviceTree branch to gain access to the clock constants.
2024-10-22dt-bindings: clock: qcom: Add SA8775P display clock controllersTaniya Das
Add device tree bindings for the display clock controllers on Qualcomm SA8775P platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-5-4a9f17dc683a@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22dt-bindings: clock: qcom: Add SA8775P camera clock controllerTaniya Das
Add device tree bindings for the camera clock controller on Qualcomm SA8775P platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-3-4a9f17dc683a@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22dt-bindings: clock: qcom: Add SA8775P video clock controllerTaniya Das
Add device tree bindings for the video clock controller on Qualcomm SA8775P platform. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-1-4a9f17dc683a@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-29 07:57:26 +0000