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2013-10-21staging:lustre: Remove space between function name and open parenthesisDulshani Gunawardhana
Remove checkpatch.pl warning of space prohibited between function name and open parenthesis '('in /lustre/lov. Signed-off-by: Dulshani Gunawardhana <dulshani.gunawardhana89@gmail.com> Reviewed-by: Josh Triplett <josh@joshtriplett.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-21Merge branch 'x86_pkg_temp' of .git into for-rcZhang Rui
2013-10-21staging: lustre: libcfs: Remove bitmap.h fileLisa Nguyen
The functions in the bitmap.h header file are not being used by any source file in the lustre driver. Unless there are any objections, please remove the bitmap.h header file as it contains unused code in the kernel. Signed-off-by: Lisa Nguyen <lisa@xenapiadmin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-21Revert "drivers: thermal: parent virtual hwmon with thermal zone"Zhang Rui
Commit b82715fdd4a5407f56853b24d387d484dd9c3b5b introduces a 'device' subdirectory under /sys/class/hwmon/hwmonX/ directory, for the thermal_zone hwmon devices. And this results in different handling by libsensors. The problem is reported and discussed in this thread http://marc.info/?l=linux-pm&m=138229306109596&w=2 This patch reverts commit b82715fdd4a5407f56853b24d387d484dd9c3b5b. Reported-by: Arnaud Ebalard <arno@natisbad.org> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2013-10-21ARM: imx: enable suspend for imx6slShawn Guo
The imx6sl low power mode implementation inherits imx6q/dl one, and pm-imx6q.c can just work for imx6sl with some minor updates. Let's enable imx6sl suspend support by reusing pm-imx6q.c and use cpu_is_imxXX() to handle the those minor differences between imx6sl and imx6q/dl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: ensure dsm_request signal is not asserted when setting LPMShawn Guo
There is a defect in imx6 LPM design. When SW tries to enter low power mode with following sequence, the chip will enter low power mode before A9 CPU execute WFI instruction: 1. Set CCM_CLPCR[1:0] to 2'b00; 2. ARM CPU enters WFI; 3. ARM CPU wakeup from an interrupt event, which is masked by GPC or not visible to GPC, such as interrupt from local timer; 4. Set CCM_CLPCR[1:0] to 2'b01 or 2'b10; 5. ARM CPU execute WFI. Before the last step, the chip will enter WAIT mode if CCM_CLPCR[1:0] is set to 2'b01, or enter STOP mode if CCM_CLPCR[1:0] is set to 2'b10. The patch implements a recommended workaround for this issue. 1. SW triggers irq #32(IOMUX) to be always pending manually by setting IOMUX_GPR1_GINT bit; 2. SW should then unmask it in GPC before setting CCM LPM; 3. SW should mask it right after CCM LPM is set (bit0-1 of CCM_CLPCR). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter()Shawn Guo
The WB and RBC configuration calls are currently made from imx6q_set_lpm() for WAIT_CLOCKED and WAIT_UNCLOCKED mode with a simple state tracking. This becomes unnecessary since we can make the calls from imx6q_pm_enter() directly now for suspend. More importantly, the current call of imx6q_enable_wb() from imx6q_set_lpm() is buggy. The CLPCR register bits configured by imx6q_enable_wb() will get lost, because imx6q_set_lpm() caches the same register and write it back at the end of the function. That's why the imx6dl suspend/resume does not work currently - the wakeup from suspend triggers a reset on imx6dl. Moves the WB and RBC calls into imx6q_pm_enter() to save the state tracking and fixes above bug, so that suspend/resume can start working on imx6dl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6q: move low-power code out of clock driverShawn Guo
The LPM (Low Power Mode) code that currently sits in imx6q clock driver will be reused by imx6sl. Let's move it into pm-imx6q.c, so that we can keep clock driver SoC specific and reuse pm-imx6q.c on imx6sl. In order to avoid adding another ioremap for CCM block, imx6q_pm_set_ccm_base() is created to let clock driver set up ccm_base for pm code. During the move, the unused CCGR macros get removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: drop extern with function prototypes in common.hShawn Guo
Since commit 70dc8a4 (checkpatch: warn when using extern with function prototypes in .h files), we will get checkpatch warning when updating common.h following the existing convention which has extern for function prototypes. Let's change the convention to not use extern with function prototypes in this header. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: reset core along with enable/disable operationShawn Guo
From hotplug stress test result, resetting core during enable/disable operation can improve cpu hotplug stability. So let's set SRC reset bit in imx_enable_cpu() for the core when its enable bit is accessed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: do not return from imx_cpu_die() callShawn Guo
When imx_cpu_die() is being called, the cpu should never return from the call but just in WFI and wait for hardware to take it down. So let's do cpu_do_idle() repeatly in the call. Doing this help improve the relibility of hotplug operation. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKINGFabio Estevam
This is very useful for detecting 'circular locking dependency' issues. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related optionsFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIOFabio Estevam
Having CONFIG_DEBUG_GPIO=y leads to several debug messages polluting kernel log: [ 0.580325] of_get_named_gpio_flags: can't parse gpios property of node '/regulators/3p3v[0]' [ 0.581185] 3P3V: 3300 mV [ 0.584827] of_get_named_gpio_flags exited with status 124 [ 0.585852] vddio-sd0: 3300 mV [ 0.590023] of_get_named_gpio_flags exited with status 79 [ 0.590770] fec-3v3: 3300 mV [ 0.594805] of_get_named_gpio_flags exited with status 105 [ 0.595491] usb0_vbus: 5000 mV [ 0.599687] of_get_named_gpio_flags exited with status 104 [ 0.600380] usb1_vbus: 5000 mV [ 0.604463] of_get_named_gpio_flags exited with status 126 [ 0.605153] lcd-3v3: 3300 mV [ 0.608970] of_get_named_gpio_flags exited with status 77 Turn this option off, as these messages are not really useful for normal usage. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: replace imx6q_restart() with mxc_restart()Shawn Guo
The imx6q_restart() works fine with normal reboot but will run into problem with emergency reboot like sysrq-b. In that case, of_iomap() gets called from interrupt context and hence triggers the BUG_ON in __get_vm_area_node(). Actually, since commit c1e31d1 (ARM: imx: create mxc_arch_reset_init_dt() for DT boot), imx6q/dl should try to use mxc_restart() by calling mxc_arch_reset_init_dt() beforehand, where things like of_iomap() can be done. The patch updates mxc_restart() a little bit to get it work for imx6q/dl and kill imx6q_restart() completely. Reported-by: Nathan Lynch <nathan_lynch@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dtFabio Estevam
As mx53 is a dt-only SoC, we should retrieve the iomuxc base address from the device tree, instead of using the old MX53_IO_ADDRESS method. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: mach-imx: mm-imx5: Retrieve tzic base address from dtFabio Estevam
As mx53 is a dt-only SoC, we should retrieve the tzic base address from the device tree, instead of using the old MX53_IO_ADDRESS method. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: mach-imx: clk-imx51-imx53: Retrieve base address and irq from dtFabio Estevam
As mx53 is a dt-only SoC, we should retrieve the gpt base address and irq from the device tree, instead of using the old MX53_IO_ADDRESS method. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: mxs_defconfig: Add CHIPIDEA_UDC supportFabio Estevam
Generated by doing: make mxs_defconfig Manually selected the CHIPIDEA_UDC driver make savedefconfig cp defconfig arch/arm/configs/mxs_defconfig Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: Include linux/err.hThierry Reding
The IS_ERR() macro is defined in the linux/err.h header file, so include it explicitly. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx_v6_v7_defconfig: Add CHIPIDEA_UDC supportFabio Estevam
Generated by doing: make imx_v6_v7_defconfig Manually selected the CHIPIDEA_UDC driver make savedefconfig cp defconfig arch/arm/configs/imx_v6_v7_defconfig Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx_v6_v7_defconfig: Add SPDIF supportFabio Estevam
Generated by doing: make imx_v6_v7_defconfig Manually selected the IMX_SPDIF driver make savedefconfig cp defconfig arch/arm/configs/imx_v6_v7_defconfig Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6q: clock and Kconfig update for PCIe supportSean Cross
Update imx6q clock initialization and Kconfig for PCIe support. Signed-off-by: Sean Cross <xobs@kosagi.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: Add LVDS general-purpose clocks to i.MX6QSean Cross
The i.MX6 has two general-purpose LVDS clocks that can be driven from a variety of sources. This patch adds a mux and a gate for both of these clocks. Signed-off-by: Sean Cross <xobs@kosagi.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: remove stale mx53_display_revision() declarationShawn Guo
The mx53_display_revision() declaration in common.h is stale and used nowhere, so remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6: report soc info via soc deviceShawn Guo
The patch enables soc bus infrastructure and adds a function imx_soc_device_init() to report soc info via soc device interface for imx6qdl and imx6sl. With the support, user space can get soc related info by looking at sysfs like below. $ cat /sys/devices/soc0/machine Freescale i.MX6 Quad SABRE Smart Device Board $ cat /sys/devices/soc0/family Freescale i.MX $ cat /sys/devices/soc0/soc_id i.MX6Q $ cat /sys/devices/soc0/revision 1.2 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: use imx_init_revision_from_anatop() on imx6slShawn Guo
Add imx6sl support into imx_init_revision_from_anatop(), so that it can be used to initialize cpu type and revision on imx6sl. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: add a common function to initialize revision from anatopShawn Guo
The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6q: use common soc revision helpersShawn Guo
It calls imx_set_soc_revision() to set up soc revision in imx6q_init_revision(), and replaces all the occurrences of imx6q_revision() with common helper imx_get_soc_revision(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: add soc revision helper functionsShawn Guo
Similar to what we do for cpu type, the patch adds helper functions imx_set_soc_revision() and imx_get_soc_revision() to maintain imx_soc_revision in cpu.c. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: add low-level debug for vybridShawn Guo
Add low-level debug support for vybrid, so that earlyprintk can be enabled for debugging early boot issue. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx: remove IRQF_DISABLEDMichael Opdenacker
This flag is a NOOP since 2.6.35 and can be removed. This is an update for 3.11 of a patch already sent for 3.10 Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6sl: config iomux-gpr1 to select clock for fecFugang Duan
Config iomux-gpr1 to select clock source for fec system clock. Clear gpr1[14], gpr1[18-17] bit to select the fec clock source from internal anatop PLL. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6sl: add imx6sl iomux-gpr field defineFugang Duan
Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header file, which is not fully define all iomux-gpr registers and fields, only add fec related macro define. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21ARM: imx6q: Add pll4_audio_div to clock treeNicolin Chen
There's a pll4_audio_div clock, an extra divider for pll4, missing in current clock tree, thus add it. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-21Merge remote-tracking branch 'shesselba/clk-of-init-v2_for-3.13' into imx/socShawn Guo
2013-10-20Merge branch 'parisc-3.12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parsic fixes from Helge Deller: "There are just two small fixes in here: - Revert a commit which exported the flush_cache_page function. This was noticed by Christoph Hellwig. - Enable the DEVTMPFS, DEVTMPFS_MOUNT and BLK_DEV_INITRD config options in the parisc defconfigs so that latest udev/initrd finds the root disk at boot" * 'parisc-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: enable DEVTMPFS, DEVTMPFS_MOUNT and BLK_DEV_INITRD in defconfigs Revert "parisc: Export flush_cache_page() (needed by lustre)"
2013-10-20iio:adc:max1363 support SMBus for 8-bit devicesVivien Didelot
The driver currently supports only I2C access. But supported devices with an accuracy of 8-bit are compatible with the SMBus byte access routines. This patch wraps the send and receive routines depending on the chip accuracy and fonctionnalities of its adapter. For instance, this allows us to use a MAX11603 on a ICH7 controller. This patch also simplifies the max1363_write_basic_config() routine to use the struct max1363_state fields directly. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-10-20iio: Correct description how to convert microtesla to gaussPeter Meerwald
this just fixes the comment; however, I'm not sure if the driver reports measurements correctly; the raw values are 0.3 uT / LSB; IIO is supposed to report magnetic fields in Gauss, so the scale should be around 1/300 (ignoring ASA) -- but value and scale are returned as VAL_INT Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-10-21ARM: EXYNOS: remove CONFIG_MACH_EXYNOS[4, 5]_DT config optionsBartlomiej Zolnierkiewicz
EXYNOS is now Device Tree (DT) only platform so it makes no sense to have config options responsible for enabling platform specific DT support. Moreover the kernel image won't even link if neither CONFIG_MACH_EXYNOS4_DT nor CONFIG_MACH_EXYNOS5_DT config option is enabled (linker fails with "no machine record defined" error). Remove CONFIG_MACH_EXYNOS[4,5]_DT config options and just use the standard CONFIG_ARCH_EXYNOS[4,5] ones instead. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-10-21ARM: S3C24XX: add dma pdata for s3c2410, s3c2440 and s3c2442Heiko Stuebner
s3c2410 and s3c2442 share the same dma channels while s3c2440 has slight differences. But on all three the reachable sources per dma channel has constraints attached and thus encodes the usable combinations using the S3C24XX_DMA_CHANREQ macro. This also fixes the warning about s3c2410_dma_resource being unused as reported by Olof Johansson. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-10-21dmaengine: s3c24xx-dma: add support for the s3c2410 type of controllerHeiko Stuebner
The earliest variants of the dma controller did not contain support for controlling clocks. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-10-21ARM: S3C24XX: Fix possible dma selection warningHeiko Stuebner
Currently the s3c sound support selects CONFIG_S3C2410_DMA on s3c24xx architectures while the generic dma config is enabled by CONFIG_S3C24XX_DMA. With the way the Kconfig options are layed out currently it is possible to enable Samsung sound support without enabling the necessary dma support resulting in warnings like warning: (SND_SOC_SAMSUNG && SND_S3C24XX_I2S && SND_S3C2412_SOC_I2S && SND_SOC_SAMSUNG_SMDK2443_WM9710 && SND_SOC_SAMSUNG_LN2440SBC_ALC650) selects S3C2410_DMA which has unmet direct dependencies (ARCH_S3C24XX && S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)) Therefore bring the s3c2410 dma support in line with the way the other s3c24xx SoCs handle this by having the SoC dma-support selected if the generic s3c dma support is enabled and have the sound support depend on S3C24XX_DMA on these arches. The s3c2442 is using the same dma descriptors and therefore also selected S3C2410_DMA. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-10-20ARM: dts: omap3-beagle: Adapt USB OTG to generic PHY frameworkRoger Quadros
The generic PHY framewrok expects different properties than the old USB PHY framework. Supply those properties. Fixes USB OTG port on beagle after the Generic PHY framework was merged in greg/usb-next. [1] [1] - https://lkml.org/lkml/2013/9/27/581 Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: am335x-evmsk: Audio supportPeter Ujfalusi
AM335x EVM-SK have only support for audio playback (stereo jack on the board) via tlv320aic3106 codec connected to McASP1. Enable the support for audio playback on the board: - McASP1 configuration - tlv320aic3106 configuration - Machine driver. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: am335x-evm: Add audio support for am335x-evm.dtsDarren Etheridge
Adds sound, tlv320aic3106, mcasp1, and am335x_evm_audio_pin nodes. Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: AM33XX: mcasp: Add location for data port registers to reg-propertyJyri Sarha
This patch adds a second tuple to reg property. The new property tuple describes the memory location for data port registers mapped trough L3 bus on am33xx. The both property tuples are named accordingly in the reg-names property. Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entriesPantelis Antoniou
Add missing mcasp entries in the am33xx.dtsi include file. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: AM4372: Update Support for EPOS EVMMugunthan V N
-> Adding pinmux for cpsw, i2c0. -> Enabling the modules that are present in AM4372 EPOS EVM These modules are tested on AM4372 EPOS EVM. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-20ARM: dts: AM4372: Add L2, EDMA, mailbox, MMC and SHAM nodesLokesh Vutla
Populate nodes for l2-cache-controller, EDMA, mailbox, mmc, sham. Update as well DT properties for epwmss, aes, des. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>