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Dropped in the following commit:
commit a3e6f6543d19 ("Input: wacom - keep wacom_ids ordered")
Reported-by: Hans Spath <inbox-546@hans-spath.de>
CC: stable@vger.kernel.org # v3.17+
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Interoperability issues were identified and root caused to
the Smart Fifo watermarks. These issues arose with
NetGear R7000. Fix this.
Cc: <stable@vger.kernel.org> [3.14+]
Fixes: 1f3b0ff8ecce ("iwlwifi: mvm: Add Smart FIFO support")
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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Since the commit below, iwldvm sends the FLUSH command to
the firmware. All the devices that use iwldvm have a
firmware that expects the _v3 version of this command,
besides 5150.
5150's latest available firmware still expects a _v2 version
of the FLUSH command.
This means that since the commit below, we had a mismatch for
this specific device only.
This mismatch led to the NMI below:
Loaded firmware version: 8.24.2.2
Start IWL Error Log Dump:
Status: 0x0000004C, count: 5
0x00000004 | NMI_INTERRUPT_WDG
0x000006F4 | uPc
0x000005BA | branchlink1
0x000006F8 | branchlink2
0x000008C2 | interruptlink1
0x00005B02 | interruptlink2
0x00000002 | data1
0x07030000 | data2
0x00000068 | line
0x3E80510C | beacon time
0x728A0EF4 | tsf low
0x0000002A | tsf hi
0x00000000 | time gp1
0x01BDC977 | time gp2
0x00000000 | time gp3
0x00010818 | uCode version
0x00000000 | hw version
0x00484704 | board version
0x00000002 | hcmd
0x2FF23080 | isr0
0x0103E000 | isr1
0x0000001A | isr2
0x1443FCC3 | isr3
0x11800112 | isr4
0x00000068 | isr_pref
0x000000D4 | wait_event
0x00000000 | l2p_control
0x00000007 | l2p_duration
0x00103040 | l2p_mhvalid
0x00000007 | l2p_addr_match
0x00000000 | lmpm_pmg_sel
0x00000000 | timestamp
0x00000200 | flow_handler
This was reported here:
https://bugzilla.kernel.org/show_bug.cgi?id=88961
Cc: <stable@vger.kernel.org>
Fixes: a0855054e59b ("iwlwifi: dvm: drop non VO frames when flushing")
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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In 8000 B-step the FW file has changed, but by the time we
know the HW step, the FW file is already requested.
This patch defaults 8000 family to B-step if no HW step is
detected in time. When it can it checks what HW step it
really is (in 8000 family) and if it isn't B-step, the FW
file is released and the A-step file is requested.
Signed-off-by: Liad Kaufman <liad.kaufman@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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Fix the 4165 series name that was called 4265 by mistake.
Signed-off-by: Oren Givon <oren.givon@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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Return probe defer if requesting a dma channel without a dma controller
probed.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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No more use late initcall to manage probing order. Use probe deferring
if needed.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Using __init/__exit attributes can cause several breakages so remove
them.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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All devices with a DMA controller are DT compliant and legacy support
has been removed. For those reasons, some DMA stuff is useless.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
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Apparently PCH fifo underruns are tricky, we have plenty reports that
we see the occasional underrun (especially at boot-up).
So for a change let's see what happens when we don't re-enable pch
fifo underrun reporting when the pipe is disabled. This means that the
kernel can't catch pch fifo underruns when they happen (except when
all pipes are on on the pch). But we'll still catch underruns when
disabling the pipe again. So not a terrible reduction in test
coverage.
Since the DRM_ERROR is new and hence a regression plan B would be to
revert it back to a debug output. Which would be a lot worse than this
hack for underrun test coverage in the wild. See the referenced
discussions for more.
References: http://mid.gmane.org/CA+gsUGRfGe3t4NcjdeA=qXysrhLY3r4CEu7z4bjTwxi1uOfy+g@mail.gmail.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85898
References: https://bugs.freedesktop.org/show_bug.cgi?id=85898
References: https://bugs.freedesktop.org/show_bug.cgi?id=86233
References: https://bugs.freedesktop.org/show_bug.cgi?id=86478
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Tested-by: lu hua <huax.lu@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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To pave the way for future fixed channels to be added easily we should
track both the local and remote mask on a per-L2CAP connection (struct
l2cap_conn) basis. So far the code has used a global variable in a racy
way which anyway needs fixing.
This patch renames the existing conn->fixed_chan_mask that tracked
the remote mask to conn->remote_fixed_chan and adds a new variable
conn->local_fixed_chan to track the local mask. Since the HS support
info is now available in the local mask we can remove the
conn->hs_enabled variable.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
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Dell has new machines. It supports headset Mic and Headphone Mic.
Signed-off-by: Kailang Yang <kailang@realtek.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs into for-linus
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Introduced in b440bde74f, however it was added to
the wrong function in nouveau.
https://bugzilla.kernel.org/show_bug.cgi?id=86011
Cc: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v3.15+
Signed-off-by: Dave Airlie <airlied@redhat.com>
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git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
- Tegra K1 voltage support, and coherency improvements
- GM204 support (modesetting, still waiting on NVIDIA for signed fw to
proceed further), and a lot of bios/i2c/devinit adjustments needed to
support it
- GT21x memory reclocking work
- Various other bits and pieces, most of which are prep-work for a
couple of bigger projects I didn't get finished in time
* 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (73 commits)
drm/nv50/kms: drop requirement that framebuffer bos be contig up-front
drm/nv50/kms: directly use cursor image from userspace buffer
drm/nouveau/kms: when pinning display-related buffers, force contig vram
drm/nouveau: teach nouveau_bo_pin() how to force a contig vram allocation
drm/nouveau/volt: add support for GK20A
drm/nouveau/platform: add GPU speedo information to nouveau platform
drm/nouveau/volt: allow non-bios voltage scaling
drm/gf100-/gr: return non-fatal error code when fw not present
drm/nouveau/devinit: bump priv ring timeouts before executing scripts
drm/nouveau/bios: translate ramcfg strap through M0203
drm/nouveau/fb: make use of M0203 routines for ram type determination
drm/nouveau/bios: add parsing of BIT M(v2) +0x03 table
drm/nouveau/core: allow vbios parsing without knowing chipset type
drm/nouveau/lib: add null backend
drm/nouveau/device: store revision
drm/nouveau/core: add some forgotten subdevs to disable mask
drm/gk20a/clk: fix max VCO value
drm/nouveau: we need pin_refcnt for nouveau_bo_placement_set()
drm/nv50-/kms: add some evo tracing ability for debugging
drm/nv50/kms: use sclass() instead of trial-and-error
...
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We'll move them at pin() time if necessary.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Preparation for transition to planes, which use framebuffers for the
cursor image. We've always done copies from the userspace buffer up
until now for legacy reasons, there's no good reason to do so on the
chipsets this code covers.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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We have the ability to move buffers around in the kernel if necessary,
and should probably use it rather than failing if userspace passes us
a non-contig buffer for a plane.
The NOUVEAU_GEM_TILE_NONCONTIG flag from userspace will become a mere
initial placement hint once all the relevant paths have been updated.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The voltage value are calculated by the hardware characterized
result.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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For GK20A we need the GPU speedo value to calculate voltage levels.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Move the vbios parsing out of init() and call it conditionally if the
platform has a vbios. Non-vbios platforms can use the ctor() to init the
data structures.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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This allows the module to load without acceleration.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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A machine has been spotted where the ramcfg strap is "8", and the ramcfg
xlat table goes 0-7,0-7, resulting in us selecting config 0 for memory
items. On this particular system, config "8" is available and supposed
to be used. It appears that starting from GT21x (where Mv2 appears),
we're supposed to use the value in this table instead.
One concern here is that not all the places we currently use ramcfg xlat
are supposed to be treated the same now. The strap xlat table wasn't
removed from the vbios either, presumably for some kind of good reason.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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We only support one kind of matching here (ramcfg strap), but it appears
alternate methods are possible. I wrote a tool to scan our vbios repo
for other types, but did not see any used. Hopefully this means there
aren't any in the wild that will now break.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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For the moment, just used to speed up vbios-only testing. Have some
ideas for extending in the future.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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For some reason max_vco was set to a lower value that it can support,
which prevented some clock states to be applied. Fix this by setting it
to the same value as downstream.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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On architectures for which access to GPU memory is non-coherent,
caches need to be flushed and invalidated explicitly when BO control
changes between CPU and GPU.
This patch adds buffer synchronization functions which invokes the
correct API (PCI or DMA) to ensure synchronization is effective.
Based on the TTM DMA cache helper patches by Lucas Stach.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Specify TTM_PL_FLAG_UNCACHED when allocating GPFIFOs and fences to
allow them to be safely accessed by the kernel without being synced
on non-coherent architectures.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Allow nouveau_bo_new() to recognize the TTM_PL_FLAG_UNCACHED flag, which
means that we want the allocated BO to be perfectly coherent between the
CPU and GPU. This is useful on non-coherent architectures for which we
do not want to manually sync some rarely-accessed buffers: typically,
fences and pushbuffers.
A TTM BO allocated with the TTM_PL_FLAG_UNCACHED on a non-coherent
architecture will be populated using the DMA API, and accesses to it
performed using the coherent mapping performed by dma_alloc_coherent().
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Add a function allowing us to know whether a device is CPU-coherent,
i.e. accesses performed by the CPU on GPU-mapped buffers will
be immediately visible on the GPU side and vice-versa.
For now, a device is considered to be coherent if it uses the PCI bus on
a non-ARM architecture.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Pinned BOs are supposed to remain in their current location until
unpinned. Display a warning for the supposedly-erroneous case where we
are trying to move such objects.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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