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Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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This patch changes SROM nodes compatible from generic to model specific
to match with binding documentation. Also updating property
"samsung,srom-page-mode" as it is not defined as bool instead of int
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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The official UDOO board kit has 7 and 15.6 inch touchscreen LCD panels
as options.
This patch adds support for 7 inch panel only, but the 15.6 inch one
should be easy to add using the same regulator, backlight device and
LVDS channel.
Since this panel is an option for UDOO board it is disabled by default
and can be enabled (for example) by the following U-Boot commands:
fdt set backlight status okay
fdt set panelchan status okay
fdt set panel7 status okay
fdt set touchscreenp7 status okay
The LVDS channels is also disabled by default to avoid warning from its
driver.
Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add the Keypad Port (KPP) devicetree nodes for IMX31 and IMX35 SOC.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Probably most of NXP LPC32xx boards have 13MHz main oscillator and
therefore for HCLK PLL and ARM core clock rate default hardware
setting is 16 * 13MHz = 208MHz, however a user may vary HCLK PLL/ARM
core rate from 156MHz to about 266MHz for 13MHz clock source.
The change explicitly defines HCLK PLL output rate to default 208MHz
to overwrite any settings done by a bootloader, if needed it can be
redefined in a board DTS file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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The edp-phy control is a part of the General Register Files and
with a recent patch in 4.6 the phy driver can now also handle this
correctly, so move the dts node under the GRF as well.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Similar to the pmu, the general register files contain a lot of different
setting bits grouped into general registers, but also some somewhat special
entities like the controls for some phy-blocks or the io-voltage control.
To be able to move these blocks under the grf node where they actually
belong, make it a simple-mfd.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the
definitions from the latter.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The Renesas R-Car System Controller provides power management for the
CPU cores and various coprocessors, following the generic PM domain
bindings in Documentation/devicetree/bindings/power/power_domain.txt.
This supports R-Car Gen1 (H1), Gen2, and Gen3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible with previous board in few areas:
- We now use DP83867 ethernet phy instead of older DP838865 which fails
in certain use cases.
- Two Ethernet ports now instead of the single one in rev B.
- polarities changed for certain pcf gpios
- Due to SoC phy current requirements, VDDA supplies are split between
ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is
still supplied by ldo5, HDMI is now supplied by LDO2 instead of using
LDO3.
NOTE: It does not make much sense to spin off a new board compatible
flag since there is no real benefit for the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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ChiliSOM has TPS65217's PWR_EN pin connected to AM335x PMIC_POWER_EN
pin. Processor's PMIC_POWER_EN is controlled by it's internal RTC, hence
RTC subsystem is responsible for proper board poweroff sequence.
This change enables complete poweroff sequence for ChiliBoard, switching
PMIC's state from ACTIVE to SLEEP.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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ChiliSOM has 2 Ethernet subsystems with different types of possibly used
PHY interfaces (i.e. MII, RMII, GMII, RGMII). Current code configured
pinmux for RMII on 1st Ethernet subsystem and enabled Ethernet MAC with
1 slave for all boards which use ChiliSOM.
This change moves pinmux configuration of 1st Ethernet subsystem to
ChiliBoard description, as this is board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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uart0 configuration code has been in SOM. However, it is possible to
use all (or none) of 6 uart's of AM335x processor present on ChiliSOM.
This fix moves declaration of uart0 from ChiliSOM to ChiliBoard, because
use of uart is strictly board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This adds the DMA engine to the Nomadik and assigns the UART
DMA channels. Both slave DMA for UARTs and the memcpy engine
works fine, tested on the Nomadik NHK15.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The LIS3LV02DL accelerometer on the Nomadik NHK15 can generate
IRQs by the DRDY line. Map this in the DTS file and set up the
pin as input to the SoC.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This platform is based on a Marvell 88E6282 SoC and 88E6171 switch.
[gregory.clement@free-electrons.com: fix block comment style]
Signed-off-by: Bert Vermeulen <bert@biot.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Add dts file to support Buffalo/Revogear Kurobox-Pro, which is marvell
orion5x based 3.5" HDD NAS.
It's a quite old product and already discontinued. So there's no
official website for it. But it was an early product which used marvell
orion5x 88F5182 chipset, it's popular in the community.
Some unofficial site:
- http://buffalo.nas-central.org/wiki/Category:KuroboxPro
- http://nice.kaze.com/KUROPRO_ProductSpecifications.pdf
This device tree is based on the board file:
arch/arm/mach-orion5x/kurobox_pro-setup.c
However, the probing order of NAND and JEDEC-Flash are different from
the original board file, this results in incompatible minor number
for a few /dev/mtdX and /dev/mtdblockX devices.
So I still want to keep the board file for the time being.
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The regulator has a reg property so include it in the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The mbus node has a ranges property.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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gpio-i2c does not have a reg property, just a list of gpios.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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PCIe has a range property, so the unit name should contain an address.
Make use of the label to enable individual PCIe busses. Also, fixup
the synology dtsi file which added a label pcie2 rather than using the
existing pcie1 label.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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PHYs have an address on the mdio bus. So the unit name should contain
an address. This is complicated in that some .dtsi files contain the
node, but the reg is set in the .dts file. In this case, use the
abstract address X.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The dsa node does not have a reg property, so remove the address from
the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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leds don't have a reg property, so remove the address from the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The DT compiler is now warning about unit names with addresses but not
reg property. Fix all the gpio-key buttons which causes warnings.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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ASPEED Technology Inc is a fabless IC-design company. Their web site
is http://www.aspeedtech.com/.
Tyan is a manufactuer of server and workstation platforms.
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Add OF_DEV_AUXDATA entry for second i2c on the da850 DT board driver
to use i2c clock.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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da850 has two I2C controllers, but the node for i2c1 was missing.
Add node for i2c1 controller and i2c1 pinmux pins.
Signed-off-by: Petr Kulhavy <petr@barix.com>
[nsekhar@ti.com: fix indentation]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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TI has been using the physical address in DT after the @ in device nodes.
The device tree convention is to use the same address that is used for
the reg property. This updates all davinci DT files to use the proper
convention.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The gpio node is missing the mandatory property #gpio-cells, which is
causing runtime errors when using GPIOs e.g. with gpio-leds or gpio-keys:
"could not get #gpio-cells for /soc/gpio@1e26000"
This fixes the problem and adds the missing parameter.
The value is 2 according to the gpio-davinci.txt binding.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A lot display-controller nodes for DSI and the Analogix DP on rk3288
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
* tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
ARM: dts: rockchip: move rk3036 memory definition to board files
ARM: dts: rockchip: enable the eDP on rk3288 veyron devices
ARM: dts: rockchip: simple panel and backlight supplies on veyron boards
ARM: dts: rockchip: override edp hpd handling on veyron-pinky and speedy
ARM: dts: rockchip: add rk3288-veyron-minnie backlight and panel settings
ARM: dts: rockchip: add rk3288-veyron-jaq backlight and panel overrides
ARM: dts: rockchip: add core rk3288-veyron backlight and panel nodes
ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators
ARM: dts: rockchip: move edp-hpd pin definition into common location
ARM: dts: rockchip: add rk3288 displayport controller node
ARM: dts: rockchip: add rk3288 edp-phy node
ARM: dts: rockchip: add missing unitname to cpu_leakage efuse
ARM: dts: rockchip: drop unneeded properties from mipi node
ARM: dts: rockchip: clean up gpio-keys nodes
ARM: dts: rockchip: fix missing usbphy unit-names
ARM: dts: rockchip: fix rk3288 power-domain unit names
ARM: dts: rockchip: update rk3288-veyron cpu operating points
ARM: dts: rockchip: remove broken-cd from emmc and sdio
ARM: dts: rockchip: enable the tsadc for rk3228 evb
ARM: dts: rockchip: add the thermal main info found on rk3228
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.7
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
* tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add reset control for USB
ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
ARM: dts: socfpga: Add support for HPS KEYs/SWs on SoCKit
ARM: dts: socfpga: Add support for HPS LEDs on SoCKit
ARM: dts: socfpga: Drop gmac0 from CV dtsi
ARM: dts: socfpga: Drop phy-addr OF property from CV dtsi
ARM: dts: socfpga: Add missing clock and interrupt fields for Arria10 DMA
ARM: dts: socfpga: add the clk-phase property for sd/mmc clock
ARM: dts: socfpga: add cap-sd-highspeed for SD/MMC node
Signed-off-by: Olof Johansson <olof@lixom.net>
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into next/dt
Device Tree additions for LPC18xx platform
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
* tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc:
dt-bindings: phy-lpc18xx-usb-otg: remove unit address from binding
ARM: dts: lpc4350-hitex-eval: fix unit name warnings from dtc
ARM: dts: lpc4357-ea4357: fix unit name warnings from dtc
ARM: dts: lpc18xx: remove unit addresses from creg childs
ARM: dts: armv7-m: add unit name to interrupt-controller
ARM: dts: lpc4350-hitex-eval: add adc1
ARM: dts: lpc4357-ea4357: add dac
ARM: dts: lpc4357-ea4357: add adc0
ARM: dts: lpc18xx: add dac node
ARM: dts: lpc18xx: add adc nodes
ARM: dts: lpc18xx: add rtc node
ARM: dts: lpc18xx: add creg-clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Versatile DTS changes, baseline for the v4.7 series:
- Add CLCD panel nodes to PB1176 and PB11MPCore
- Add a DT binding blurb for the Versatile IB2 syscon
- Add DTS files for the (QEMU supported) RealView EB
boards in all variants.
- Add DTS files for the (QEMU supported) RealView PBA8
and PBX-A9 board variants.
* tag 'versatile-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: realview: DT support for the PBA8 and PBX-A9
ARM: dts: realview: support all the RealView EB board variants
ARM: dts: realview: PB1176: define a standard VGA panel
ARM: dts: realview: PB11MPCore: define a standard VGA panel
Documentation/DT: add blurb for IB2 syscon to Versatile
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch add the i2c dt nodes for rk3228 SoCs.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC Cleanup for v4.7
* Remove unnecessary clock-output-names properties from DT
* Use generic pinctrl properties in DT
* tag 'renesas-cleanup-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (26 commits)
ARM: dts: sh73a0: Remove unnecessary clock-output-names properties
ARM: dts: r8a73a4: Remove unnecessary clock-output-names properties
ARM: dts: lager: Remove unnecessary clock-output-names properties
ARM: dts: porter: Remove unnecessary clock-output-names properties
ARM: dts: koelsch: Remove unnecessary clock-output-names properties
ARM: dts: gose: Remove unnecessary clock-output-names properties
ARM: dts: r8a7794: Remove unnecessary clock-output-names properties
ARM: dts: r8a7793: Remove unnecessary clock-output-names properties
ARM: dts: r8a7791: Remove unnecessary clock-output-names properties
ARM: dts: r8a7779: Remove unnecessary clock-output-names properties
ARM: dts: r8a7778: Remove unnecessary clock-output-names properties
ARM: dts: r8a7740: Remove unnecessary clock-output-names properties
ARM: dts: r7s72100: Remove unnecessary clock-output-names properties
ARM: dts: r8a7790: Remove unnecessary clock-output-names properties
ARM: dts: kzm9d: use generic pinctrl properties
ARM: dts: kzm9g: use generic pinctrl properties
ARM: dts: silk: use generic pinctrl properties
ARM: dts: alt: use generic pinctrl properties
ARM: dts: gose: use generic pinctrl properties
ARM: dts: porter: use generic pinctrl properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM64 Based SoC DT Updates for v4.7
* Use USB3.0 fallback compatibility string in DT for r8a7795 SoC
* Add CAN support to DT for r8a7795 SoC
* tag 'renesas-arm64-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
arm64: dts: r8a7795: Add CAN support
arm64: dts: r8a7795: Add CAN external clock support
Signed-off-by: Olof Johansson <olof@lixom.net>
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clkout1 clock node and its generation tree was missing. Add this based
on the data on TRM and PRCM functional spec.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
First DT batch for 4.7, additions for sama5d2 SoC:
- chipid node to identify the SoC
- SFR node (Special Function Registers)
- LCD controller's node
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: add LCD controller
ARM: dts: at91: sama5d2: add chipid node
ARM: dts: at91: sama5d2: add SFR node
Signed-off-by: Olof Johansson <olof@lixom.net>
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This allows reporting & debugging problems occurring early in the boot
process.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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There are few devices that have USB power controlled using GPIO. Linux
USB host driver (bcma-hcd) already supports this by reading vcc-gpio
from DT. Set it properly for all known devices.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This commit adds definition for cpu_on, cpu_off and cpu_suspend commands.
These definitions must match the corresponding PSCI definitions in
boot monitor.
Having those command and corresponding PSCI support in boot monitor allows
run time CPU hot plugin.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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Add aliases for SPI nodes, this is required to probe the SPI devices in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.
Script for the same (and hand modified for Makefile and MAINTAINERS
files):
for i in arch/arm/boot/dts/k2*
do
b=`basename $i`;
git mv $i arch/arm/boot/dts/keystone-$b;
sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
done
NOTE: bootloaders that depend on older dtb names will need to be
updated as well.
[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2
Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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The DCU IP has distinct clock inputs for register access and the
pixel clocks, at least in some implementations. LS1021a seems to
use the same clock, therefore specify the same clock for "dcu"
and "pix".
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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