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2023-10-05Merge tag 'clk-fixes-for-linus' of ↵Geert Uytterhoeven
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux into renesas-dts-for-v6.7 Adding versa3 clock generator nodes to DTS depends on the fixed clock index handling: - Fix the binding for versaclock3 that was introduced this merge window so we know what the values are for clk consumers
2023-10-05dt-bindings: soc: renesas: Document R-Car S4 Starter KitKuninori Morimoto
Add "renesas,s4sk" which targets the Renesas R-Car S4 Starter Kit board. Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87sf6sfn9i.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05dt-bindings: soc: renesas: Document SMARC Carrier-II EVKClaudiu Beznea
Document the Renesas SMARC Carrier-II EVK board which is based on the Renesas RZ/G3S SMARC SoM. The SMARC Carrier-II EVK consists of an RZ/G3S SoM module and a SMARC Carrier-II carrier board; the SoM module sits on top of the carrier board. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230929053915.1530607-27-claudiu.beznea@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05dt-bindings: soc: renesas: Document RZ/G3S SMARC SoMClaudiu Beznea
Document the Renesas RZ/G3S SMARC SoM board which is based on the Renesas RZ/G3S (R9A08G045S33) SoC. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230929053915.1530607-24-claudiu.beznea@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoCClaudiu Beznea
Add documentation for the RZ/G3S CPG. The RZ/G3S CPG module is almost identical to the one available in RZ/G2{L,UL}, the exception being some core clocks as follows: - The SD clock is composed of a mux and a divider, and the divider has some limitations (div = 1 cannot be set if mux rate is 800MHz), - There are 3 SD clocks, - The OCTA and TSU clocks are specific to RZ/G3S, - PLL1/4/6 are specific to RZ/G3S with its own computation formula. Even with this RZ/G3S could use the same bindings as RZ/G2L. Along with documentation bindings for the RZ/G3S (R9A08G045) Clock Pulse Generator (CPG) core clocks, module clocks and resets were added. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230929053915.1530607-13-claudiu.beznea@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-04ARM: dts: rockchip: Switch to operating-points-v2 for RK3128's CPUAlex Bee
This will allow frequency-scaling for the cpu-cores. Operating frequencies and voltages have been taken from Rockchip's downstream kernel. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-10-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Enable SMP bring-up for RK3128Alex Bee
For bring-up of the non-boot cpu cores the enable-method for RK3036 can be re-used. This adds a (small) chunk of SRAM for execution of the SMP trampoline code and the respective enable-method property to the cpus. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add CPU resets for RK3128Alex Bee
In order to support bring-up of the non-boot cores, this patch adds the reset controls for the cpu cores. They are required/will be used by the Rockchip platsmp driver. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-6-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add SRAM node for RK3128Alex Bee
RK3128 SoCs have 8KB of SRAM. Add the respective device tree node for it. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20230829214004.314932-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Enable pwm fan for edgeble-neu2Jagan Teki
Edgeble Neu2 IO board Fan connected to PWM11. Enable the pwm fan for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-10-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm11 node to rv1126Jagan Teki
Add pwm11 node for Rockchip RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-6-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm11m0 pins to rv1126Jagan Teki
Add pwm11m0 pins for Rockchip RV1126 PWM11. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-5-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm2 node to rv1126Jagan Teki
Add PWM2 node for Rockchip RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-4-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04ARM: dts: rockchip: Add pwm2m0 pins to rv1126Jagan Teki
Add pwm2m0 pins for Rockchip RV1126 PWM2. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20230731103518.2906147-3-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: Add NanoPC T6 PCIe e-key supportJohn Clark
before ~~~~ 0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0002:20:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0002:21:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) 0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0004:41:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) after ~~~ 0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0002:20:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0002:21:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) 0003:30:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0003:31:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8822CE 802.11ac PCIe Wireless Network Adapter 0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0004:41:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05) Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20230906012305.7113-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: Add sdio node to rock-5bTamás Szűcs
Enable SDIO on Radxa ROCK 5 Model B M.2 Key E. Add sdio node and alias as mmc2. Add regulator for the 3.3 V rail bringing it up during boot. Make sure EKEY_EN is muxed as GPIO. Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230924203740.65744-1-tszucs@protonmail.ch Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe3 bus to rk3588-evb1Sebastian Reichel
Enable PCIe3 support, which is exposed via a PCIe3 connector. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230918141327.131108-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe2 network controller to rk3588-evb1Sebastian Reichel
The RK3588 EVB1 has a second network card, which is connected via PCIe2. This adds support for that. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230918141327.131108-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe for M.2 E-Key to rock-5bSebastian Reichel
Enable PCIe2_0 controller and its voltage supply, which is routed to the M.2 E-Key on the upper side of the Radxa Rock 5B. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230918141451.131247-4-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe for M.2 M-key to rock-5bSebastian Reichel
The Radxa Rock 5B has PCIe 3x4 routed to its M.2 M-key connector on the board's back. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230918141451.131247-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe network controller to rock-5bSebastian Reichel
Enable the RTL8125 network controller, which is connected via PCIe. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230918141451.131247-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: Add saradc node to Indiedroid NovaChris Morgan
Add ADC support for the Indiedroid Nova, as well as the two ADC buttons found on the device. The buttons are documented as "boot" and "recovery". The boot button is used by the bootloader to boot into USB recovery mode. The recovery button use is currently unknown. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230918173255.1325-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add USB2 to rk3588s-indiedroidChris Morgan
Enable USB2 (EHCI and OCHI mode) support for the Indiedroid Nova. This adds support for USB for the 4 full size USB-A ports. Note that USB 3 (the two blue full-size USB-A ports) is still outstanding, as is support for USB on the USB-C ports. The controller is not yet supported for these ports. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230918173255.1325-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-04arm64: dts: rockchip: add PCIe to rk3588s-indiedroid-novaChris Morgan
Add the necessary nodes to the Indiedroid Nova to activate the PCI express port that is used by the RTL8111 ethernet controller. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230918173255.1325-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-02arm64: dts: meson-s4: add hwrng nodeAlexey Romanov
Using this node, we can obtain random numbers via hardware random number generator. Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230929102942.67985-4-avromanov@salutedevices.com [narmstrong: fixed commit message] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-02dt-bindings: pwm: rockchip: Document rv1126-pwmJagan Teki
Document pwm compatible for rv1126 which is fallback compatible of rk3328-pwm group. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230731103518.2906147-2-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-09-30riscv: dts: starfive: add assigned-clock* to limit frquencyWilliam Qiu
In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-09-29ARM: dts: at91: sam9x60_curiosity: Add mandatory dt property for RTTTudor Ambarus
atmel,rtt-rtc-time-reg is a mandatory property and encodes the GPBR register used to store the time base when the RTT is used as an RTC. Align the RTT with what's currently done for sam9x60ek and sama7g5ek, and enable it by default even if RTC is also enabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> [nicolas.ferre@microchip.com: adapt to newer kernel] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230928143644.208515-1-nicolas.ferre@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-29ARM: dts: sunxi: add support for Anbernic RG-NanoChris Morgan
The Anbernic RG-Nano is a small portable game device based on the Allwinner V3s SoC. It has GPIO buttons on the face and side for input, a single mono speaker, a 240x240 SPI controlled display, a USB-C OTG port, an SD card slot for booting, and 64MB of RAM included in the SoC. There does not appear to be a crystal feeding the internal RTC so it does not keep proper time (for me it ran 8 hours slow in a 24 hour period). External RTC works just fine. Working/Tested: - SDMMC - UART (for debugging) - Buttons - Charging/battery/PMIC - Speaker - RTC (external RTC) - USB - Display Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230929144441.3409-5-macroalpha82@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-29dt-bindings: arm: sunxi: add Anbernic RG-NanoChris Morgan
The Anbernic RG-Nano is a portable handheld console from Anbernic which uses the Allwinner V3s SoC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230929144441.3409-4-macroalpha82@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-29ARM: dts: sun8i: v3s: add EHCI and OHCI to v3s dtsChris Morgan
Add the EHCI and OHCI controller to the Allwinner v3s to support using USB in host mode. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230929144441.3409-3-macroalpha82@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-29arm: dts: sun8i: V3s: Add pinctrl for pwmChris Morgan
Add pinctrl nodes for pwm0 and pwm1. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230929144441.3409-2-macroalpha82@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-29ARM: dts: stm32: omit unused pinctrl groups from stm32mp15 dtb filesSascha Hauer
stm32mp15-pinctrl.dtsi contains nearly all pinctrl groups collected from all boards. Most of them end up unused by a board and only waste binary space. Add /omit-if-no-ref/ to the groups to scrub the unused groups from the dtbs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-09-29ARM: dts: stm32: stm32f7-pinctrl: don't use multiple blank linesDario Binacchi
The patch fixes the following warning: arch/arm/dts/stm32f7-pinctrl.dtsi:380: check: Please don't use multiple blank lines Fixes: ba287d1a0137 ("ARM: dts: stm32: add pin map for LTDC on stm32f7") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-09-29ARM: dts: stm32: add HASH on stm32mp131Lionel Debieve
Add the HASH support on stm32mp131. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-09-29arm64: dts: st: enable secure arm-wdt watchdog on stm32mp257f-ev1Alexandre Torgue
Enable the watchdog and define the default timeout to 32 seconds. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-09-29ARM: dts: at91: sama5d29_curiosity: Add device tree for sama5d29_curiosity boardMihai Sain
Add initial device tree file for sama5d29_curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20230919124606.26898-3-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-29dt-bindings: ARM: at91: Document Microchip SAMA5D29 CuriosityAndrei Simion
Document device tree binding of SAMA5D29 Curiosity, from Microchip. Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230919124606.26898-2-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-29arm64: dts: meson: g12: name spdifout consistentlyJerome Brunet
g12 and sm1 are fairly similar when it comes to audio. Both have 2 spdif outputs. While the 2nd output is named "spdifout_b" for both, the 1st one is named 'spdifout' for g12 and 'spdifout_a' for sm1. Use 'spdifout_a' for both instead. This change does not fix any particular problem. The intent is just to make it easier to have a common card definitions for platform designs using both SoC families, when spdifout is used. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20230925135326.1689396-1-jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-09-29arm64: dts: Add pinctrl node for Amlogic T7 SoCsHuqiang Qin
Add pinctrl device. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Lucas Tanure <tanure@linux.com> Link: https://lore.kernel.org/r/20230922094342.637251-4-huqiang.qin@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-09-28Merge tag 'ux500-dts-for-armsoc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt Ux500 device tree updates for v6.7: - Two fixes from Krzysztof fixing up DT properties on the touchscreen. * tag 'ux500-dts-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: st: href-tvk1281618: correct touchscreen syna,nosleep-mode ARM: dts: st: href-tvk1281618: fix touchscreen VIO supply Link: https://lore.kernel.org/r/CACRpkdZc5Yzsos2+gRPtCT-+ohmaV69ew5YFJLakD+9VFkrkfQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-09-28arm64: dts: Add AMD Pensando Elba SoC supportBrad Larson
Add AMD Pensando common and Elba SoC specific device nodes Signed-off-by: Brad Larson <blarson@amd.com> Link: https://lore.kernel.org/r/20230925195610.47971-5-blarson@amd.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-09-28dt-bindings: arm: add AMD Pensando boardsBrad Larson
Document the compatible for AMD Pensando Elba SoC boards. Signed-off-by: Brad Larson <blarson@amd.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230925195610.47971-2-blarson@amd.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-09-27ARM: dts: qcom: ipq8064: move keys and leds out of soc nodeKrzysztof Kozlowski
GPIO keys and LEDs are not part of the SoC, so move them to top-level to fix dtbs_check warnings like: qcom-ipq8064-rb3011.dtb: soc: gpio-keys: {'compatible': ['gpio-keys'], ... should not be valid under {'type': 'object'} from schema $id: http://devicetree.org/schemas/simple-bus.yaml# Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183914.51414-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: dts: qcom: mdm9615: populate vsdcc fixed regulatorKrzysztof Kozlowski
Fixed regulator put under "regulators" node will not be populated, unless simple-bus or something similar is used. Drop the "regulators" wrapper node to fix this. Fixes: 2c5e596524e7 ("ARM: dts: Add MDM9615 dtsi") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183914.51414-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: dts: qcom: apq8060: drop incorrect regulator-typeKrzysztof Kozlowski
regulator-fixed does not have a "regulator-type" property: qcom-apq8060-dragonboard.dtb: regulator-fixed: Unevaluated properties are not allowed ('regulator-type' was unexpected) Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183914.51414-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: dts: qcom: apq8064: drop incorrect regulator-typeKrzysztof Kozlowski
regulator-fixed does not have a "regulator-type" property: qcom-apq8064-ifc6410.dtb: regulator-ext-3p3v: Unevaluated properties are not allowed ('regulator-type' was unexpected) Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183914.51414-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: dts: qcom: sdx65: fix SDHCI clocks orderKrzysztof Kozlowski
Bindings expect clocks to be in different order: qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:0: 'iface' was expected qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:1: 'core' was expected Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183335.49961-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: dts: qcom: apq8064: drop label property from DSIKrzysztof Kozlowski
DSI node does not accept nor use "label" property: qcom-apq8064-asus-nexus7-flo.dtb: dsi@4700000: Unevaluated properties are not allowed ('label' was unexpected) Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183335.49961-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-27ARM: qcom: msm8974: Add rpm-master-stats nodeMatti Lehtimäki
Add rpm-master-stats node for MSM8974 and the required RPM MSG RAM slices for memory access. Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20230922003533.107835-3-matti.lehtimaki@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.34.1) at 2025-10-01 11:31:24 +0000