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2019-08-30perf/x86/amd/ibs: Fix sample bias for dispatched micro-opsKim Phillips
When counting dispatched micro-ops with cnt_ctl=1, in order to prevent sample bias, IBS hardware preloads the least significant 7 bits of current count (IbsOpCurCnt) with random values, such that, after the interrupt is handled and counting resumes, the next sample taken will be slightly perturbed. The current count bitfield is in the IBS execution control h/w register, alongside the maximum count field. Currently, the IBS driver writes that register with the maximum count, leaving zeroes to fill the current count field, thereby overwriting the random bits the hardware preloaded for itself. Fix the driver to actually retain and carry those random bits from the read of the IBS control register, through to its write, instead of overwriting the lower current count bits with zeroes. Tested with: perf record -c 100001 -e ibs_op/cnt_ctl=1/pp -a -C 0 taskset -c 0 <workload> 'perf annotate' output before: 15.70 65: addsd %xmm0,%xmm1 17.30 add $0x1,%rax 15.88 cmp %rdx,%rax je 82 17.32 72: test $0x1,%al jne 7c 7.52 movapd %xmm1,%xmm0 5.90 jmp 65 8.23 7c: sqrtsd %xmm1,%xmm0 12.15 jmp 65 'perf annotate' output after: 16.63 65: addsd %xmm0,%xmm1 16.82 add $0x1,%rax 16.81 cmp %rdx,%rax je 82 16.69 72: test $0x1,%al jne 7c 8.30 movapd %xmm1,%xmm0 8.13 jmp 65 8.24 7c: sqrtsd %xmm1,%xmm0 8.39 jmp 65 Tested on Family 15h and 17h machines. Machines prior to family 10h Rev. C don't have the RDWROPCNT capability, and have the IbsOpCurCnt bitfield reserved, so this patch shouldn't affect their operation. It is unknown why commit db98c5faf8cb ("perf/x86: Implement 64-bit counter support for IBS") ignored the lower 4 bits of the IbsOpCurCnt field; the number of preloaded random bits has always been 7, AFAICT. Signed-off-by: Kim Phillips <kim.phillips@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: "Arnaldo Carvalho de Melo" <acme@kernel.org> Cc: <x86@kernel.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "Borislav Petkov" <bp@alien8.de> Cc: Stephane Eranian <eranian@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: "Namhyung Kim" <namhyung@kernel.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Link: https://lkml.kernel.org/r/20190826195730.30614-1-kim.phillips@amd.com
2019-08-30perf/x86/intel: Restrict period on NehalemJosh Hunt
We see our Nehalem machines reporting 'perfevents: irq loop stuck!' in some cases when using perf: perfevents: irq loop stuck! WARNING: CPU: 0 PID: 3485 at arch/x86/events/intel/core.c:2282 intel_pmu_handle_irq+0x37b/0x530 ... RIP: 0010:intel_pmu_handle_irq+0x37b/0x530 ... Call Trace: <NMI> ? perf_event_nmi_handler+0x2e/0x50 ? intel_pmu_save_and_restart+0x50/0x50 perf_event_nmi_handler+0x2e/0x50 nmi_handle+0x6e/0x120 default_do_nmi+0x3e/0x100 do_nmi+0x102/0x160 end_repeat_nmi+0x16/0x50 ... ? native_write_msr+0x6/0x20 ? native_write_msr+0x6/0x20 </NMI> intel_pmu_enable_event+0x1ce/0x1f0 x86_pmu_start+0x78/0xa0 x86_pmu_enable+0x252/0x310 __perf_event_task_sched_in+0x181/0x190 ? __switch_to_asm+0x41/0x70 ? __switch_to_asm+0x35/0x70 ? __switch_to_asm+0x41/0x70 ? __switch_to_asm+0x35/0x70 finish_task_switch+0x158/0x260 __schedule+0x2f6/0x840 ? hrtimer_start_range_ns+0x153/0x210 schedule+0x32/0x80 schedule_hrtimeout_range_clock+0x8a/0x100 ? hrtimer_init+0x120/0x120 ep_poll+0x2f7/0x3a0 ? wake_up_q+0x60/0x60 do_epoll_wait+0xa9/0xc0 __x64_sys_epoll_wait+0x1a/0x20 do_syscall_64+0x4e/0x110 entry_SYSCALL_64_after_hwframe+0x44/0xa9 RIP: 0033:0x7fdeb1e96c03 ... Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: acme@kernel.org Cc: Josh Hunt <johunt@akamai.com> Cc: bpuranda@akamai.com Cc: mingo@redhat.com Cc: jolsa@redhat.com Cc: tglx@linutronix.de Cc: namhyung@kernel.org Cc: alexander.shishkin@linux.intel.com Link: https://lkml.kernel.org/r/1566256411-18820-1-git-send-email-johunt@akamai.com
2019-08-30cfg80211: add local BSS receive time to survey informationFelix Fietkau
This is useful for checking how much airtime is being used up by other transmissions on the channel, e.g. by calculating (time_rx - time_bss_rx) or (time_busy - time_bss_rx - time_tx) Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20190828102042.58016-1-nbd@nbd.name Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2019-08-30ALSA: hda/realtek - Fix overridden device-specific initializationTakashi Iwai
The recent change to shuffle the codec initialization procedure for Realtek via commit 607ca3bd220f ("ALSA: hda/realtek - EAPD turn on later") caused the silent output on some machines. This change was supposed to be safe, but it isn't actually; some devices have quirk setups to override the EAPD via COEF or BTL in the additional verb table, which is applied at the beginning of snd_hda_gen_init(). And this EAPD setup is again overridden in alc_auto_init_amp(). For recovering from the regression, tell snd_hda_gen_init() not to apply the verbs there by a new flag, then apply the verbs in alc_init(). BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=204727 Fixes: 607ca3bd220f ("ALSA: hda/realtek - EAPD turn on later") Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-08-30drm/selftests: modes: Add more unit tests for the cmdline parserMaxime Ripard
Let's add some unit tests for the recent bugs we just fixed. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-4-mripard@kernel.org
2019-08-30drm/modes: Introduce a whitelist for the named modesMaxime Ripard
The named modes support has introduced a number of glitches that were in part due to the fact that the parser will take any string as a named mode. Since we shouldn't have a lot of options there (and they should be pretty standard), let's introduce a whitelist of the available named modes so that the kernel can differentiate between a poorly formed command line and a named mode. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-3-mripard@kernel.org
2019-08-30drm/modes: Fix the command line parser to take force options into accountMaxime Ripard
The command line parser when it has been rewritten introduced a regression when the only thing on the command line is an option to force the detection of a connector (such as video=HDMI-A-1:d), which are completely valid. It's been further broken by the support for the named modes which take anything that is not a resolution as a named mode. Let's fix this by running the extra command line option parser on the named modes if they only take a single character. Fixes: e08ab74bd4c7 ("drm/modes: Rewrite the command line parser") Reported-by: Jernej Škrabec <jernej.skrabec@gmail.com> Reported-by: Thomas Graichen <thomas.graichen@googlemail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-2-mripard@kernel.org
2019-08-30drm/modes: Add a switch to differentiate free standing optionsMaxime Ripard
Some extra command line options can be either specified without anything else on the command line (basically all the force connection options), but some other are only relevant when matched with a resolution (margin and interlace). Let's add a switch to restrict if needed the available option set. Fixes: e08ab74bd4c7 ("drm/modes: Rewrite the command line parser") Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-1-mripard@kernel.org
2019-08-30Revert "Bluetooth: btusb: driver to enable the usb-wakeup feature"Mario Limonciello
This reverts commit a0085f2510e8976614ad8f766b209448b385492f. This commit has caused regressions in notebooks that support suspend to idle such as the XPS 9360, XPS 9370 and XPS 9380. These notebooks will wakeup from suspend to idle from an unsolicited advertising packet from an unpaired BLE device. In a bug report it was sugggested that this is caused by a generic lack of LE privacy support. Revert this commit until that behavior can be avoided by the kernel. Fixes: a0085f2510e8 ("Bluetooth: btusb: driver to enable the usb-wakeup feature") BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=200039 Link: https://marc.info/?l=linux-bluetooth&m=156441081612627&w=2 Link: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/750073/ CC: Bastien Nocera <hadess@hadess.net> CC: Christian Kellner <ckellner@redhat.com> CC: Sukumar Ghorai <sukumar.ghorai@intel.com> Signed-off-by: Mario Limonciello <mario.limonciello@dell.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2019-08-30mmc: sdhci-cadence: enable v4_mode to fix ADMA 64-bit addressingMasahiro Yamada
The IP datasheet says this controller is compatible with SD Host Specification Version v4.00. As it turned out, the ADMA of this IP does not work with 64-bit mode when it is in the Version 3.00 compatible mode; it understands the old 64-bit descriptor table (as defined in SDHCI v2), but the ADMA System Address Register (SDHCI_ADMA_ADDRESS) cannot point to the 64-bit address. I noticed this issue only after commit bd2e75633c80 ("dma-contiguous: use fallback alloc_pages for single pages"). Prior to that commit, dma_set_mask_and_coherent() returned the dma address that fits in 32-bit range, at least for the default arm64 configuration (arch/arm64/configs/defconfig). Now the host->adma_addr exceeds the 32-bit limit, causing the real problem for the Socionext SoCs. (As a side-note, I was also able to reproduce the issue for older kernels by turning off CONFIG_DMA_CMA.) Call sdhci_enable_v4_mode() to fix this. Cc: <stable@vger.kernel.org> # v4.20+ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mmc: sdhci-sprd: clear the UHS-I modes read from registersChunyan Zhang
sprd's sd host controller supports SDR50/SDR104/DDR50 though, the UHS-I mode used by the specific card can be selected via devicetree only. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Tested-by: Baolin Wang <baolin.wang@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mms: sdhci-sprd: add SDHCI_QUIRK_BROKEN_CARD_DETECTIONChunyan Zhang
sprd's sd host controller doesn't support detection to card insert or remove. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Tested-by: Baolin Wang <baolin.wang@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mmc: sdhci-sprd: add SDHCI_QUIRK2_PRESET_VALUE_BROKENChunyan Zhang
The bit of PRESET_VAL_ENABLE in HOST_CONTROL2 register is reserved on sprd's sd host controller, set quirk2 to disable configuring this. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Tested-by: Baolin Wang <baolin.wang@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mmc: sdhci-sprd: add get_ro hook functionChunyan Zhang
sprd's sd host controller doesn't support write protect to sd card. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Tested-by: Baolin Wang <baolin.wang@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mmc: sdhci-sprd: fixed incorrect clock dividerChunyan Zhang
The register SDHCI_CLOCK_CONTROL should be cleared before config clock divider, otherwise the frequency configured maybe lower than we expected. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Tested-by: Baolin Wang <baolin.wang@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-30mmc: core: Fix init of SD cards reporting an invalid VDD rangeUlf Hansson
The OCR register defines the supported range of VDD voltages for SD cards. However, it has turned out that some SD cards reports an invalid voltage range, for example having bit7 set. When a host supports MMC_CAP2_FULL_PWR_CYCLE and some of the voltages from the invalid VDD range, this triggers the core to run a power cycle of the card to try to initialize it at the lowest common supported voltage. Obviously this fails, since the card can't support it. Let's fix this problem, by clearing invalid bits from the read OCR register for SD cards, before proceeding with the VDD voltage negotiation. Cc: stable@vger.kernel.org Reported-by: Philip Langdale <philipl@overt.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Philip Langdale <philipl@overt.org> Tested-by: Philip Langdale <philipl@overt.org> Tested-by: Manuel Presnitz <mail@mpy.de>
2019-08-30Merge tag 'drm-intel-fixes-2019-08-29' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes drm/i915 fixes for v5.3-rc7: - Fix DP MST max BPC property creation after DRM register - Fix unused ggtt deballooning and NULL dereference in guest - Fix DSC eDP transcoder identification - Fix WARN from DMA API debug by setting DMA max segment size Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87a7bseati.fsf@intel.com
2019-08-29net: spider_net: Use struct_size() helperGustavo A. R. Silva
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct spider_net_card { ... struct spider_net_descr darray[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(struct spider_net_card) + (tx_descriptors + rx_descriptors) * sizeof(struct spider_net_descr) with: struct_size(card, darray, tx_descriptors + rx_descriptors) Notice that, in this case, variable alloc_size is not necessary, hence it is removed. Building: allmodconfig powerpc. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30Merge tag 'drm-fixes-5.3-2019-08-28' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-fixes drm-fixes-5.3-2019-08-28: amdgpu: - Fix GFXOFF regression for PCO and RV2 - Fix missing fence reference - Fix VG20 power readings on certain SMU firmware versions - Fix dpm level setup for VG20 - Add an ATPX laptop quirk Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829022925.32678-1-alexander.deucher@amd.com
2019-08-29Merge tag '5.3-rc6-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds
Pull cifs fixes from Steve French: "A few small SMB3 fixes, and a larger one to fix various older string handling functions" * tag '5.3-rc6-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: update internal module number cifs: replace various strncpy with strscpy and similar cifs: Use kzfree() to zero out the password cifs: set domainName when a domain-key is used in multiuser
2019-08-30netfilter: nft_meta_bridge: Fix get NFT_META_BRI_IIFVPROTO in network byteorderwenxu
Get the vlan_proto of ingress bridge in network byteorder as userspace expects. Otherwise this is inconsistent with NFT_META_PROTOCOL. Fixes: 2a3a93ef0ba5 ("netfilter: nft_meta_bridge: Add NFT_META_BRI_IIFVPROTO support") Signed-off-by: wenxu <wenxu@ucloud.cn> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2019-08-29Merge branch 'r8169-add-support-for-RTL8125'David S. Miller
Heiner Kallweit says: ==================== r8169: add support for RTL8125 This series adds support for the 2.5Gbps chip RTl8125. It can be found on PCIe network cards, and on an increasing number of consumer gaming mainboards. Series is partially based on the r8125 vendor driver. Tested with a Delock 89531 PCIe card against a Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed, but on some systems there may be compatibility issues w/o firmware. Firmware has been submitted to linux-firmware. v2: - split first patch into 6 smaller ones to facilitate bisecting ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for EEE on RTL8125Heiner Kallweit
This adds EEE support for RTL8125 based on the vendor driver. Supported is EEE for 100Mbps and 1Gbps. Realtek recommended to not yet enable EEE for 2.5Gbps due to potential compatibility issues. Also ethtool doesn't support yet controlling EEE for 2.5Gbps and 5Gbps. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add RTL8125 PHY initializationHeiner Kallweit
This patch adds PHY initialization magic copied from the r8125 vendor driver. In addition it supports loading the firmware for chip version RTL_GIGA_MAC_VER_61. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: add support for RTL8125Heiner Kallweit
This adds support for 2.5Gbps chip RTL8125, it's partially based on the r8125 vendor driver. Tested with a Delock 89531 PCIe card against a Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed, but on some systems there may be compatibility issues w/o firmware. Firmware has been submitted to linux-firmware. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: don't use bit LastFrag in tx descriptor after sendHeiner Kallweit
On RTL8125 this bit is always cleared after send. Therefore check for tx_skb->skb being set what is functionally equivalent. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: read common register for PCI commitHeiner Kallweit
RTL8125 uses a different register number for IntrMask. To net have side effects by reading a random register let's use a register that is the same on all supported chip families. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: move disabling interrupt coalescing to RTL8169/RTL8168 initHeiner Kallweit
RTL8125 doesn't support the same coalescing registers, therefore move this initialization to the 8168/6169-specific init. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: factor out reading MAC address from registersHeiner Kallweit
For RTL8125 we will have to read the MAC address also from another register range, therefore create a small helper. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: restrict rtl_is_8168evl_up to RTL8168 chip versionsHeiner Kallweit
Extend helper rtl_is_8168evl_up to properly work once we add mac version numbers >51 for RTL8125. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29r8169: change interrupt mask type to u32Heiner Kallweit
RTL8125 uses a 32 bit interrupt mask even though only bits in the lower 16 bits are used. Change interrupt mask size to u32 to be prepared and reintroduce helper rtl_get_events. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-30Merge tag 'drm-misc-fixes-2019-08-28' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes drm-misc-fixes for v5.3 (rc7?): - Make qxl reservel the vga ports using vgaargb to prevent switching to vga compatibility mode. - Fix omap port lookup for SDI output - Use virtio_max_dma_size to fix an issue with swiotlb. - Compiler fixes to komeda. - Add missing of_node_get() call in komeda. - Reorder the komeda de-init functions. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f187c28b-6279-2c4f-3e53-296ee899133b@linux.intel.com
2019-08-29Merge tag 'mlx5-updates-2019-08-22' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2019-08-22 Misc updates for mlx5e net device driver 1) Maxim and Tariq add the support for LAG TX port affinity distribution When VF LAG is enabled, VFs netdevs will round-robin the TX affinity of their tx queues among the different LAG ports. 2) Aya adds the support for ip-in-ip RSS. 3) Marina adds the support for ip-in-ip TX TSO and checksum offloads. 4) Moshe adds a device internal drop counter to mlx5 ethtool stats. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: dsa: mv88e6xxx: fix freeing unused SERDES IRQVivien Didelot
Now mv88e6xxx does not enable its ports at setup itself and let the DSA core handle this, unused ports are disabled without being powered on first. While that is expected, the SERDES powering code was assuming that a port was already set up before powering it down, resulting in freeing an unused IRQ. The patch fixes this assumption. Fixes: b759f528ca3d ("net: dsa: mv88e6xxx: enable SERDES after setup") Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Marek Behún <marek.behun@nic.cz> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: dsa: mv88e6xxx: keep CMODE writable code privateVivien Didelot
This is a follow-up patch for commit 7a3007d22e8d ("net: dsa: mv88e6xxx: fully support SERDES on Topaz family"). Since .port_set_cmode is only called from mv88e6xxx_port_setup_mac and mv88e6xxx_phylink_mac_config, it is fine to keep this "make writable" code private to the mv88e6341_port_set_cmode implementation, instead of adding yet another operation to the switch info structure. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: dsa: mv88e6xxx: get serdes lane after lockVivien Didelot
This is a follow-up patch for commit 17deaf5cb37a ("net: dsa: mv88e6xxx: create serdes_get_lane chip operation"). The .serdes_get_lane implementations access the CMODE of a port, even though it is cached at the moment, it is safer to call them after the mutex is locked, not before. At the same time, check for an eventual error and return IRQ_DONE, instead of blindly ignoring it. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29Merge branch 'net-hns3-add-some-cleanups-and-optimizations'David S. Miller
Huazhong Tan says: ==================== net: hns3: add some cleanups and optimizations This patch-set includes cleanups, optimizations and bugfix for the HNS3 ethernet controller driver. [patch 01/12] adds code optimization for debugfs command "dump reg". [patch 02/12] fixes magic number issues. [patch 03/12] modifies some parameters about hclge_dbg_dump_tm_map(). [patch 04/12] removes some unused parameters. [patch 05/12] refactors some logs to make them more readable. [patch 06/12] makes some resusable codes into functions. [patch 07/12] fixes some type errors. [patch 08/12] reduces the waiting time for per TQP reset. [patch 09/12] implements .process_hw_error for hns3 client. [patch 10/12] adds phy selftest for HNS3 driver. [patch 11/12] adds checking for reset interrupt status when reset fails. [patch 12/12] prevents SSU loopback when running ethtool -t. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: not allow SSU loopback while execute ethtool -t devYufeng Mo
The current loopback mode is to add 0x1F to the SMAC address as the DMAC address and enable the promiscuous mode. However, if the VF address is the same as the DMAC address, the loopback test fails. Loopback can be enabled in three places: SSU, MAC, and serdes. By default, SSU loopback is enabled, so if the SMAC and the DMAC are the same, the packets are looped back in the SSU. If SSU loopback is disabled, packets can reach MAC even if SMAC is the same as DMAC. Therefore, this patch disables the SSU loopback before the loopback test. In this way, the SMAC and DMAC can be the same, and the promiscuous mode does not need to be enabled. And this is not valid in version 0x20. This patch also uses a macro to replace 0x1F. Fixes: c39c4d98dc65 ("net: hns3: Add mac loopback selftest support in hns3 driver") Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: check reset interrupt status when reset failsHuazhong Tan
Currently, the reset interrupt will be cleared firstly, so when reset fails, if interrupt status register has reset interrupt, it means there is a new coming reset. Fixes: 72e2fb07997c ("net: hns3: clear reset interrupt status in hclge_irq_handle()") Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: add phy selftest functionYufeng Mo
Currently, the loopback test supports only mac selftest and serdes selftest. This patch adds phy selftest. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: implement .process_hw_error for hns3 clientWeihang Li
When hardware or IMP get specified error it may need the client to take some special operations. This patch implements the hns3 client's process_hw_errorx. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: optimize waiting time for TQP resetZhongzhu Liu
This patch optimizes the waiting time for TQP reset. Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Reviewed-by: Yunsheng Lin <linyunsheng@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: fix incorrect type in assignment.Guojia Liao
This patch fixes some incorrect type in assignment reported by sparse. Those sparse warning as below: - warning : restricted __le16 degrades to integer - warning : cast from restricted __le32 - warning : expected restricted __le32 - warning : cast from restricted __be32 - warning : cast from restricted __be16 - warning : cast to restricted __le16 Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: make some reusable codes into a functionYonglong Liu
In hclge_dcb.c, these pair of codes: hclge_notify_client(hdev, HNAE3_DOWN_CLIENT); hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT); and hclge_notify_client(hdev, HNAE3_INIT_CLIENT); hclge_notify_client(hdev, HNAE3_UP_CLIENT); are called many times, so make them into a function. Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> Reviewed-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: optimize some log printingsYufeng Mo
To better identify abnormal conditions, this patch modifies or adds some logs to show driver status more accurately. Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: reduce the parameters of some functionsGuojia Liao
This patch simplifies parameters of some functions by deleting unused parameter. Signed-off-by: Guojia Liao <liaoguojia@huawei.com> Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: modify base parameter of kstrtouint in hclge_dbg_dump_tm_mapHuazhong Tan
This patch replaces kstrtouint()'s patameter base with 0 in the hclge_dbg_dump_tm_mac(), which makes it more flexible. Also uses a macro to replace string "dump tm map", since it has been used multiple times. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: use macro instead of magic numberHuazhong Tan
This patch uses macro to replace some magic number. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29net: hns3: code optimization for debugfs related to "dump reg"Zhongzhu Liu
For making the code more readable, this patch uses a array to keep the information about the dumping register, and then uses it to parse the parameter cmd_buf which passing into hclge_dbg_dump_reg_cmd(). Also replaces parameter "base" of kstrtouint with 0 in the hclge_dbg_dump_reg_common(), which makes it more flexible. Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-29dpaa2-eth: Add pause frame supportIoana Radulescu
Starting with firmware version MC10.18.0, we have support for L2 flow control. Asymmetrical configuration (Rx or Tx only) is supported, but not pause frame autonegotioation. Pause frame configuration is done via ethtool. By default, we start with flow control enabled on both Rx and Tx. Changes are propagated to hardware through firmware commands, using two flags (PAUSE, ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows: PAUSE | ASYM_PAUSE | Rx pause | Tx pause ---------------------------------------- 0 | 0 | disabled | disabled 0 | 1 | disabled | enabled 1 | 0 | enabled | enabled 1 | 1 | enabled | disabled The hardware can automatically send pause frames when the number of buffers in the pool goes below a predefined threshold. Due to this, flow control is incompatible with Rx frame queue taildrop (both mechanisms target the case when processing of ingress frames can't keep up with the Rx rate; for large frames, the number of buffers in the pool may never get low enough to trigger pause frames as long as taildrop is enabled). So we set pause frame generation and Rx FQ taildrop as mutually exclusive. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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