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2014-11-27ARM: dts: Remove unused bootargs from exynos3250-rinatoChanwoo Choi
This patch removes unused dt node of command line from Exynos3250-based Rinato board because kernel use the command line from bootloader. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-27ARM: dts: add board dts file for Exynos3250-based Monk boardYoungjun Cho
This patch adds new board dts file to support Samsung Monk board which is based on Exynos3250 SoC and has different H/W configuration from Rinato. This dts file support following features: - eMMC - Main PMIC (Samsung S2MPS14) - Interface PMIC (Maxim MAX77836, MUIC, fuel-gauge, charger) - RTC of Exynos3250 - ADC of Exynos3250 with NTC thermistor - I2S of Exynos3250 - TMU of Exynos3250 - Secure firmware for Exynos3250 secondary cpu boot - Serial ports of Exynos3250 - gpio-key for power key Signed-off-by: Youngjun Cho <yj44.cho@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-27Documentation: devicetree: Add Exynos-based boards compatible stringChanwoo Choi
This patch adds the missing compatible/description of Exynos-based boards to remove following build warning. WARNING: DT compatible string "samsung,..." appears un-documented -- check ./Documentation/devicetree/bindings/ Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-26stmmac: platform: fix default values of the filter bins settingHuacai Chen
The commit 3b57de958e2a brought the support for a different amount of the filter bins, but didn't update the platform driver that without CONFIG_OF. Fixes: 3b57de958e2a (net: stmmac: Support devicetree configs for mcast and ucast filter entries) Signed-off-by: Huacai Chen <chenhc@lemote.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-26arm64: Move some head.text functions to executable sectionLaura Abbott
The head.text section is intended to be run at early bootup before any of the regular kernel mappings have been setup. Parts of head.text may be freed back into the buddy allocator due to TEXT_OFFSET so for security requirements this memory must not be executable. The suspend/resume/hotplug code path requires some of these head.S functions to run however which means they need to be executable. Support these conflicting requirements by moving the few head.text functions that need to be executable to the text section which has the appropriate page table permissions. Tested-by: Kees Cook <keescook@chromium.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-11-26arm64: jump labels: NOP out NOP -> NOP replacementMark Rutland
In the arm64 arch_static_branch implementation we place an A64 NOP into the instruction stream and log relevant details to a jump_entry in a __jump_table section. Later this may be replaced with an immediate branch without link to the code for the unlikely case. At init time, the core calls arch_jump_label_transform_static to initialise the NOPs. On x86 this involves inserting the optimal NOP for a given microarchitecture, but on arm64 we only use the architectural NOP, and hence replace each NOP with the exact same NOP. This is somewhat pointless. Additionally, at module load time we don't call jump_label_apply_nops to patch the optimal NOPs in, unlike other architectures, but get away with this because we only use the architectural NOP anyway. A later notifier will patch NOPs with branches as required. Similarly to x86 commit 11570da1c5b1dee1 (x86/jump-label: Do not bother updating NOPs if they are correct), we can avoid patching NOPs with identical NOPs. Given that we only use a single NOP encoding, this means we can NOP-out the body of arch_jump_label_transform_static entirely. As the default __weak arch_jump_label_transform_static implementation performs a patch, we must use an empty function to achieve this. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Jiang Liu <liuj97@gmail.com> Cc: Laura Abbott <lauraa@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-11-26arm64: add support to dump the kernel page tablesLaura Abbott
In a similar manner to arm, it's useful to be able to dump the page tables to verify permissions and memory types. Add a debugfs file to check the page tables. Acked-by: Steve Capper <steve.capper@linaro.org> Tested-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Laura Abbott <lauraa@codeaurora.org> [will: s/BUFFERABLE/NORMAL-NC/] Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-11-26net/mlx4_core: Limit count field to 24 bits in qp_alloc_resJack Morgenstein
Some VF drivers use the upper byte of "param1" (the qp count field) in mlx4_qp_reserve_range() to pass flags which are used to optimize the range allocation. Under the current code, if any of these flags are set, the 32-bit count field yields a count greater than 2^24, which is out of range, and this VF fails. As these flags represent a "best-effort" allocation hint anyway, they may safely be ignored. Therefore, the PF driver may simply mask out the bits. Fixes: c82e9aa0a8 "mlx4_core: resource tracking for HCA resources used by guests" Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-26Merge branch 'bcm_sf2'David S. Miller
Florian Fainelli says: ==================== net: dsa: bcm_sf2: misc bugfixes This patch series contains two bug fixes: - first patch fixes an issue on the error path of the driver where we could have left some of our registers mapped - second patch enforces the use of a software reset of the switch to guarantee the HW is in a consistent state prior to software initialization ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-26net: dsa: bcm_sf2: reset switch prior to initializationFlorian Fainelli
Our boot agent may have left the switch in an certain configuration state, make sure we issue a software reset prior to configuring the switch in order to ensure the HW is in a consistent state, in particular transmit queues and internal buffers. Fixes: 246d7f773c13 ("net: dsa: add Broadcom SF2 switch driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-26net: dsa: bcm_sf2: fix unmapping registers in case of errorsFlorian Fainelli
In case we fail to ioremap() one of our registers, we would be leaking existing mappings, unwind those accordingly on errors. Fixes: 246d7f773c13 ("net: dsa: add Broadcom SF2 switch driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-26ARM: at91: remove all !DT related configuration optionsNicolas Ferre
OLD_CLK_AT91 & OLD_IRQ_AT91 were only selected by entries in Kconfig.non_dt that are now gone. So we remove all this legacy stuff and select the proper options in the SOC_ entries. As USE_OF is now selected directly in arch/arm/Kconfig AT91 entry, we can safely remove it everywhere in this file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26irqchip: dw-apb-ictl: Add PM supportJisheng Zhang
This patch adds in support for S2R for dw-apb-ictl irqchip driver. We can used relaxed variants in the resume hook because there's no DMA at all here, the device type memory attribute can ensure the operations order and relaxed version imply compiler barrier. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Link: https://lkml.kernel.org/r/1415773374-4629-4-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPEJisheng Zhang
The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26irqchip: dw-apb-ictl: Always use use {readl|writel}_relaxedJisheng Zhang
There's no DMA at all, the device type memory attribute can ensure the operations order and relaxed version imply compiler barrier, so we are safe to use relaxed version to improve the performance a bit. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-2-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26ARM: at91/trivial: update Kconfig comment to mention SAMA5Nicolas Ferre
Cortex-A5 SAMA5 processors were not listed, add this in the AT91 comment. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: always USE_OF from now onNicolas Ferre
As we always use Device Tree now, we can add the configuration here. Also remove the condition for PINCTRL_AT91. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91/Kconfig: remove ARCH_AT91RM9200 option for driversNicolas Ferre
The precise selection is useless, so we simply remove these dependencies. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26kvm: fix kvm_is_mmio_pfn() and rename to kvm_is_reserved_pfn()Ard Biesheuvel
This reverts commit 85c8555ff0 ("KVM: check for !is_zero_pfn() in kvm_is_mmio_pfn()") and renames the function to kvm_is_reserved_pfn. The problem being addressed by the patch above was that some ARM code based the memory mapping attributes of a pfn on the return value of kvm_is_mmio_pfn(), whose name indeed suggests that such pfns should be mapped as device memory. However, kvm_is_mmio_pfn() doesn't do quite what it says on the tin, and the existing non-ARM users were already using it in a way which suggests that its name should probably have been 'kvm_is_reserved_pfn' from the beginning, e.g., whether or not to call get_page/put_page on it etc. This means that returning false for the zero page is a mistake and the patch above should be reverted. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26arm/arm64: kvm: drop inappropriate use of kvm_is_mmio_pfn()Ard Biesheuvel
Instead of using kvm_is_mmio_pfn() to decide whether a host region should be stage 2 mapped with device attributes, add a new static function kvm_is_device_pfn() that disregards RAM pages with the reserved bit set, as those should usually not be mapped as device memory. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26arm/arm64: KVM: vgic: Fix error code in kvm_vgic_create()Christoffer Dall
If we detect another vCPU is running we just exit and return 0 as if we succesfully created the VGIC, but the VGIC wouldn't actual be created. This shouldn't break in-kernel behavior because the kernel will not observe the failed the attempt to create the VGIC, but userspace could be rightfully confused. Cc: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26arm64: KVM: Handle traps of ICC_SRE_EL1 as RAZ/WIChristoffer Dall
When running on a system with a GICv3, we currenly don't allow the guest to access the system register interface of the GICv3. We do this by clearing the ICC_SRE_EL2.Enable, which causes all guest accesses to ICC_SRE_EL1 to trap to EL2 and causes all guest accesses to other ICC_ registers to cause an undefined exception in the guest. However, we currently don't handle the trap of guest accesses to ICC_SRE_EL1 and will spill out a warning. The trap just needs to handle the access as RAZ/WI, and a guest that tries to prod this register and set ICC_SRE_EL1.SRE=1, must read back the value (which Linux already does) to see if it succeeded, and will thus observe that ICC_SRE_EL1.SRE was not set. Add the simple trap handler in the sorted table of the system registers. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> [ardb: added cp15 handling] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26arm64: KVM: fix unmapping with 48-bit VAsMark Rutland
Currently if using a 48-bit VA, tearing down the hyp page tables (which can happen in the absence of a GICH or GICV resource) results in the rather nasty splat below, evidently becasue we access a table that doesn't actually exist. Commit 38f791a4e499792e (arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2) added a pgd_none check to __create_hyp_mappings to account for the additional level of tables, but didn't add a corresponding check to unmap_range, and this seems to be the source of the problem. This patch adds the missing pgd_none check, ensuring we don't try to access tables that don't exist. Original splat below: kvm [1]: Using HYP init bounce page @83fe94a000 kvm [1]: Cannot obtain GICH resource Unable to handle kernel paging request at virtual address ffff7f7fff000000 pgd = ffff800000770000 [ffff7f7fff000000] *pgd=0000000000000000 Internal error: Oops: 96000004 [#1] PREEMPT SMP Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.18.0-rc2+ #89 task: ffff8003eb500000 ti: ffff8003eb45c000 task.ti: ffff8003eb45c000 PC is at unmap_range+0x120/0x580 LR is at free_hyp_pgds+0xac/0xe4 pc : [<ffff80000009b768>] lr : [<ffff80000009cad8>] pstate: 80000045 sp : ffff8003eb45fbf0 x29: ffff8003eb45fbf0 x28: ffff800000736000 x27: ffff800000735000 x26: ffff7f7fff000000 x25: 0000000040000000 x24: ffff8000006f5000 x23: 0000000000000000 x22: 0000007fffffffff x21: 0000800000000000 x20: 0000008000000000 x19: 0000000000000000 x18: ffff800000648000 x17: ffff800000537228 x16: 0000000000000000 x15: 000000000000001f x14: 0000000000000000 x13: 0000000000000001 x12: 0000000000000020 x11: 0000000000000062 x10: 0000000000000006 x9 : 0000000000000000 x8 : 0000000000000063 x7 : 0000000000000018 x6 : 00000003ff000000 x5 : ffff800000744188 x4 : 0000000000000001 x3 : 0000000040000000 x2 : ffff800000000000 x1 : 0000007fffffffff x0 : 000000003fffffff Process swapper/0 (pid: 1, stack limit = 0xffff8003eb45c058) Stack: (0xffff8003eb45fbf0 to 0xffff8003eb460000) fbe0: eb45fcb0 ffff8003 0009cad8 ffff8000 fc00: 00000000 00000080 00736140 ffff8000 00736000 ffff8000 00000000 00007c80 fc20: 00000000 00000080 006f5000 ffff8000 00000000 00000080 00743000 ffff8000 fc40: 00735000 ffff8000 006d3030 ffff8000 006fe7b8 ffff8000 00000000 00000080 fc60: ffffffff 0000007f fdac1000 ffff8003 fd94b000 ffff8003 fda47000 ffff8003 fc80: 00502b40 ffff8000 ff000000 ffff7f7f fdec6000 00008003 fdac1630 ffff8003 fca0: eb45fcb0 ffff8003 ffffffff 0000007f eb45fd00 ffff8003 0009b378 ffff8000 fcc0: ffffffea 00000000 006fe000 ffff8000 00736728 ffff8000 00736120 ffff8000 fce0: 00000040 00000000 00743000 ffff8000 006fe7b8 ffff8000 0050cd48 00000000 fd00: eb45fd60 ffff8003 00096070 ffff8000 006f06e0 ffff8000 006f06e0 ffff8000 fd20: fd948b40 ffff8003 0009a320 ffff8000 00000000 00000000 00000000 00000000 fd40: 00000ae0 00000000 006aa25c ffff8000 eb45fd60 ffff8003 0017ca44 00000002 fd60: eb45fdc0 ffff8003 0009a33c ffff8000 006f06e0 ffff8000 006f06e0 ffff8000 fd80: fd948b40 ffff8003 0009a320 ffff8000 00000000 00000000 00735000 ffff8000 fda0: 006d3090 ffff8000 006aa25c ffff8000 00735000 ffff8000 006d3030 ffff8000 fdc0: eb45fdd0 ffff8003 000814c0 ffff8000 eb45fe50 ffff8003 006aaac4 ffff8000 fde0: 006ddd90 ffff8000 00000006 00000000 006d3000 ffff8000 00000095 00000000 fe00: 006a1e90 ffff8000 00735000 ffff8000 006d3000 ffff8000 006aa25c ffff8000 fe20: 00735000 ffff8000 006d3030 ffff8000 eb45fe50 ffff8003 006fac68 ffff8000 fe40: 00000006 00000006 fe293ee6 ffff8003 eb45feb0 ffff8003 004f8ee8 ffff8000 fe60: 004f8ed4 ffff8000 00735000 ffff8000 00000000 00000000 00000000 00000000 fe80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 fea0: 00000000 00000000 00000000 00000000 00000000 00000000 000843d0 ffff8000 fec0: 004f8ed4 ffff8000 00000000 00000000 00000000 00000000 00000000 00000000 fee0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff20: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff40: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff60: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffa0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000005 00000000 ffe0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Call trace: [<ffff80000009b768>] unmap_range+0x120/0x580 [<ffff80000009cad4>] free_hyp_pgds+0xa8/0xe4 [<ffff80000009b374>] kvm_arch_init+0x268/0x44c [<ffff80000009606c>] kvm_init+0x24/0x260 [<ffff80000009a338>] arm_init+0x18/0x24 [<ffff8000000814bc>] do_one_initcall+0x88/0x1a0 [<ffff8000006aaac0>] kernel_init_freeable+0x148/0x1e8 [<ffff8000004f8ee4>] kernel_init+0x10/0xd4 Code: 8b000263 92628479 d1000720 eb01001f (f9400340) ---[ end trace 3bc230562e926fa4 ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Jungseok Lee <jungseoklee85@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26mmc: omap_hsmmc: Fix UHS card with DDR50 supportUlf Hansson
The commit, mmc: omap: clarify DDR timing mode between SD-UHS and eMMC, switched omap_hsmmc to support MMC DDR mode instead of UHS DDR50 mode. Add UHS DDR50 mode again and this time let's also keep the MMC DDR mode. Fixes: 5438ad95a57c (mmc: omap: clarify DDR timing mode between SD-UHS and eMMC) Reported-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: add core-level function for sending tuning commandsMinda Chen
According to the SD card spec, Add a manual tuning command function for SDR104/HS200. Sending command 19 or command 21 to read data and compare with the tunning block pattern. This patch will help to decrease some platform private codes in SDHCI platform_execute_tuning() callbacks. Signed-off-by: Minda Chen <Minda.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: hold SD Clock before CMD11 during SignalVincent Yang
Voltage Switch Procedure This patch is to fix an issue found on mb86s7x platforms. [symptom] There are some UHS-1 SD memory cards sometimes cannot be detected correctly, e.g., Transcend 600x SDXC 64GB UHS-1 memory card. During Signal Voltage Switch Procedure, failure to switch is indicated by the card holding DAT[3:0] low. [analysis] According to SD Host Controller Simplified Specification Version 3.00 chapter 3.6.1, the Signal Voltage Switch Procedure should be: (1) Check S18A; (2) Issue CMD11; (3) Check CMD 11 response; (4) Stop providing SD clock; (5) Check DAT[3:0] should be 0000b; (6) Set 1.8V Signal Enable; (7) Wait 5ms; (8) Check 1.8V Signal Enable; (9) Provide SD Clock; (10) Wait 1ms; (11) Check DAT[3:0] should be 1111b; (12) error handling With CONFIG_MMC_CLKGATE=y, sometimes there is one more gating/un-gating SD clock between (2) and (3). In this case, some UHS-1 SD cards will hold DAT[3:0] 0000b at (11) and thus fails Signal Voltage Switch Procedure. [solution] By mmc_host_clk_hold() before CMD11, the additional gating/un-gating SD clock between (2) and (3) can be prevented and thus no failure at (11). It has been verified with many UHS-1 SD cards on mb86s7x platforms and works correctly. Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Reviewed-by: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mxs-mmc: Check for clk_prepare_enable() errorFabio Estevam
clk_prepare_enable() may fail and in this case we should propagate the error. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mxs-mmc: Propagate the real errorFabio Estevam
If platform_get_irq() fails, it is better to propagate the real error value instead of a 'fake' one. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mxs-mmc: No need to do NULL check on 'iores'Fabio Estevam
devm_ioremap_resource() already checks if 'iores' is NULL or not, so we can skip this manual check. While at it, move platform_get_resource() closer to devm_ioremap_resource() for better readability. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: Add support for IMG PistachioAndrew Bresticker
Add support for the DW MMC host found on the Imagination Pistachio SoC. Like the DW MMC hosts found on SOCFPGA and Rockchip SoCs, the DW MMC host on Pistachio requires the use of SDMMC_CMD_USE_HOLD_REG. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mxs-mmc: Simplify PM hooksFabio Estevam
By using SIMPLE_DEV_PM_OPS we can make the code smaller and cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mxs-mmc: Register the irq with the device nameFabio Estevam
Instead of registering the irq name with the driver's name, it's better to pass the device name so that we have a more explicit indication as to what mmc instance the irq is related: $ cat /proc/interrupts CPU0 ... 26: 6 - 96 80010000.ssp Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: avoid write to CDTHRCTL on older versionsJames Hogan
Commit f1d2736c8156 (mmc: dw_mmc: control card read threshold) added dw_mci_ctrl_rd_thld() with an unconditional write to the CDTHRCTL register at offset 0x100. However before version 240a, the FIFO region started at 0x100, so the write messes with the FIFO and completely breaks the driver. If the version id < 240A, return early from dw_mci_ctl_rd_thld() so as not to hit this problem. Fixes: f1d2736c8156 (mmc: dw_mmc: control card read threshold) Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: <stable@vger.kernel.org> # v3.13+ Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: toshsd: move dereference below check for NULLDan Carpenter
We check for NULL pointers after dereferencing so it's too late. Oddly enough, Smatch misses this code but complains about the caller passing NULL pointers to this function: drivers/mmc/host/toshsd.c:389 toshsd_irq() error: we previously assumed 'host->cmd' could be null (see line 349) Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: atmel-mci: remove compat for non DT board when requesting dma chanludovic.desroches@atmel.com
All boards with a dma controller have DT support so using dma_request_slave_channel_compat is no more needed. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: add support for the other bit of sdio interruptAddy Ke
The bit of sdio interrupt is 16 in designware implementation, but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the number of slot0 in the SDIO interrupt registers. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: mvsdio: Work around broken TX DMAAndrew Lunn
In order to use the mvsdio driver for sdio, it has been necessary to use a module parameter to disable DMA so to force PIO is used. It is then possible to use wireless LAN devices like mwifiex found on topkick and mirabox. However, accessing an MMC SD card does work with DMA. Investigation has shown that MMC block device accesses are always aligned to 64 byte boundaries, where as transfers from mwifiex are rarely more than word aligned. It has also been determined that card to host transfers work with DMA for SDIO devices, but host to card transfers with DMA have problems. This patch extends the current checks for buffers which are not word aligned or multiple of words. All host to card transfers which are not 64 byte aligned are now also performed via PIO. This should not affect the performance of SD cards, but allow sdio devices to work out of the box, and they are likely to be more efficient since DMA will be used for card to host transfers. Tested on mirabox for wifi via mwifiex Tested on 370 RD for file systems on an SD card. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: block: Increase max_devicesBen Hutchings
Currently the driver imposes a limit of 256 total minor numbers, apparently based on the historic Unix/Linux limit. This is quite restrictive, particularly if we raise the maximum number of partitions per card to 256 to match sd. In order to make the full minor number space available we would have to replace the static dev_use and name_use arrays with struct ida. But we can at least allow use of 256 cards rather than just 256 minors, with only a small change. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: add support for ARM64Alim Akhtar
There are upcoming ARM64 SoCs with dw_mmc host controller. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: reset sdio card properly on resume.NeilBrown
mmc_sdio_power_restore() calls mmc_send_if_cond(host, host->card->ocr); ret = mmc_send_io_op_cond(host, 0, NULL); between mmc_go_idle() and mmc_sdio_init_card(). mmc_sdio_resume() needs to as well, else my libertas sdio wifi device doesn't resume properly from suspend. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: use card->ocr when negotiating voltage setting in ↵NeilBrown
mmc_sdio_power_restore As we are restoring power to a known card, it makes sense to use the 'ocr' value known for the card rather than the generic one for the host interface. This matches the use of card->ocr passed to mmc_power_up in mmc_sdio_runtime_resume (just before mmc_sdio_power_restore is called), and the value passed to mmc_sdio_init_card() a little later in mmc_sdio_power_restore(). Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: add Toshiba PCI SD controller driverOndrej Zary
This patch resurrects an old never-finished driver for Toshiba PCI SD controllers found in some older Toshiba laptops (such as Portege R100): 02:0d.0 System peripheral [0880]: Toshiba America Info Systems SD TypA Controller [1179:0805] (rev 05) The code is fixed, cleaned up and successfully tested with SD, SDHC, SDXC and MMC cards on Portege R100. (MMC cards don't even work in Windows!) SDIO probably does not work (don't have any SDIO card). The hardware is slow (around 2 MB/s - same in Windows) because it does not support bus mastering (busmaster enable bit cannot be set in PCI control reg). Also the card clock is limited to 16MHz (33MHz PCI clock divided by 2). Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: exynos: Add support for exynos7Abhilash Kesavan
The Exynos7 has a DWMMC controller (v2.70a) which is different from prior versions. This patch adds new compatible strings for exynos7. This patch also fixes the CLKSEL register offset on exynos7. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: consistent handling of initial valuesJohan Rudholm
mmc_do_hw_reset(), mmc_power_up() and mmc_power_off() all set similar initial values for bus_mode, bus_width, chip_select and timing. Let's make this handling simpler and more consistent by sticking them together in a common function. This will introduce small changes in behavior in the following places: mmc_power_off(): For SPI hosts, explicitly set bus_mode = MMC_BUSMODE_PUSHPULL and chip_select = MMC_CS_HIGH, before we left them as they were. For non-SPI hosts, set bus_mode = MMC_BUSMODE_PUSHPULL instead of MMC_BUSMODE_OPENDRAIN as before. These two changes should not be a problem since the device will be powered off anyway. mmc_do_hw_reset(): Always set bus_mode = MMC_BUSMODE_PUSHPULL, as required by SD/SDIO cards. MMC cards require MMC_BUSMODE_OPENDRAIN, but this is taken care of by mmc_init_card() and mmc_attach_mmc(). Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused slot_id parameterAndreas Fenkart
omap_hsmmc only supports one slot. So slot id is always zero, and slot id was never used in the callbacks anyway Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: Remove unnecessary callbacks from platform dataAndreas Fenkart
These callbacks are set during driver probe and not from the platform init, -- evtl. they had been for oamp 1/2 -- for omap3 they are local functions of the driver. These indirection could be dropped altogether in favor of regular function calls TODO Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: pass mmc_priv struct to gpio init / freeAndreas Fenkart
this is needed when installing callbacks in the host struct and not in the platform data, e.g. cover detect irq should be stored in omap_hsmmc_host and not platform data Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unnecessary omap_hsmmc_slot_data indirectionAndreas Fenkart
omap_hsmmc supports only one slot per controller, see OMAP_MMC_MAX_SLOTS. This unnecessary indirection leads to confusion in the omap_hsmmc driver. For example the card_detect callback is not installed by platform code but from the driver probe function. So it should be a field of omap_hsmmc_host. But since it is declared under the platform slot while the drivers struct omap_hsmmc_host has no slot abstraction, this looks like a bug, especially when not familiar that this driver only supports 1 slot anyway. Either we should add a slot abstraction to omap_hsmmc_host or remove it from the platform data struct. Removed since slot multiplexing is an un-implemented feature Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused get_context_loss_count callbackAndreas Fenkart
trigger of this callback has been removed in 0a82e06e6183 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove never read power_saving field in omap2_hsmmc_infoAndreas Fenkart
these fields are never read, probably an unimplemented feature or superseded by pm_runtime Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-14 21:11:12 +0000