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2019-06-24ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250Krzysztof Kozlowski
Add nodes for GPU (Mali 400) to Exynos3250. This is still limited and not tested: 1. No dynamic voltage and frequency scaling, 2. Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24dt-bindings: gpu: mali: Add Samsung compatibles for Midgard and UtgardKrzysztof Kozlowski
Add vendor compatibles for specific implementation of Mali Utgard (Exynos3250, Exynos4-family) and Midgard (Exynos5433, Exynos7). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24arm64: dts: exynos: Add GPU/Mali T760 node to Exynos7Krzysztof Kozlowski
Add nodes for GPU (Mali T760) to Exynos7. Current support for Exynos7 misses a lot, including proper clocks, power domains, frequency and voltage scaling and cooling. However this still can provide basic GPU description. Not tested on HW. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24arm64: dts: exynos: Add GPU/Mali T760 node to Exynos5433Krzysztof Kozlowski
Add nodes for GPU (Mali T760) to Exynos5433. Missing element is the cooling device. Not tested on HW. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Use proper regulator for eMMC memory on Arndale OctaKrzysztof Kozlowski
The eMMC memory is supplied by LDO18 (PVDD_EMMC_1V8) and buck10 (PVDD_EMMCF_2V8), not by LDO10. The LDO10 (PVDD_PRE_1V8) supplies instead VDDP_MMC pin of eMMC host interface and it is already marked as always on. This change only properly models the hardware and reflects in usage of regulators. There is no functional change because: 1. LDO18 cannot be turned off (e.g. by lack of consumers) because in off mode it is controlled by LDO18EN pin, which is pulled up by always-on regulator LDO2 (PVDD_APIO_1V8). 2. LDO10 is marked as always on so removing its consumer will not have effect. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Odroid XU3/XU4/HC1 ↵Krzysztof Kozlowski
family Add the PMIC regulator suspend configuration to entire Odroid XU3/XU4/HC1 family of boards to reduce power usage during suspend. The configuration is based on vendor (Hardkernel) reference kernel with additional buck9 suspend configuration (for USB hub suspend and proper reset). Energy consumption measurements from Marek Szyprowski during suspend to RAM: - all at 5 V power supply, - before: next-20190620, - after: next-20190620 + this patch + suspend configuration for s2mps11 regulator driver, Board | before [mA] | after [mA] | Odroid HC1 | 120 | 7-10 | Odroid XU4, sdcard | 88 | 6-9 | Odroid XU4, eMMC | 100 | 6-9 | Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
2019-06-24ARM: dts: exynos: Add regulator suspend configuration to Arndale Octa boardKrzysztof Kozlowski
Add the PMIC regulator suspend configuration to Arndale Octa board to reduce power usage during suspend and keep necessary regulators on. The configuration is based on vendor (Insignal) reference kernel and the board datasheet. Comparing to vendor kernel, additionally turn off in suspend all regulators controlled by external pin (LDO3, LDO7, LDO18 and buck10). This is purely for hardware description because board does not support Suspend to RAM and the S2MPS11 driver does not support "regulator-on-in-suspend" property. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: exynos: Disable unused buck10 regulator on Odroid HC1 boardKrzysztof Kozlowski
The eMMC memory on Odroid XU3/XU4 boards is supplied by two regulators LDO18 and buck10 (and LDO13 for the host interface). However the Odroid HC1 board does not have eMMC connector so this regulator does not have to be always on. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-24ARM: dts: imx7ulp-evk: enable USBOTG1 supportPeter Chen
Enable USBOTG1 support for evk board, it is dual-role function port. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx7ulp: add imx7ulp USBOTG1 supportPeter Chen
Add imx7ulp USBOTG1 support. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM SupportMichael Grzeschik
The patch adds the following interfaces according the SMARC Spec 1.1 [1] and provided schematics: - SMARC SPI0/1 Note: Since Kontron still uses silicon revisions below 1.3 they have add a spi-nor to implement Workaround #1 of erratum ERR006282. - SMARC SDIO - SMARC LCD - SMARC HDMI - SMARC Management pins Note: Kontron don't route all of these pins to the i.MX6, some are routed to the SoM CPLD. - SMARC GPIO - SMARC CSI Camera Note: As specified in [1] the data lanes are shared to cover the csi and the parallel case. The case depends on the baseboard so muxing the data lanes is not part of this patch. - SMARC I2S - SMARC Watchdog Note: The watchdog output pin is routed to the CPLD and the SMARC header. The CPLD performs a reset after a 30s timeout so we need to enable the watchdog per default. - SMARC module eeprom Due to the lack of hardware not all of these interfaces are tesetd. [1] https://sget.org/standards/smarc Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: pxa300-raumfeld-speaker-one: add channel output mapping for STA320Daniel Mack
These settings are needed to make the hardware operable. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-common: fix comments in gpio_keys pinctrl nodeDaniel Mack
Careless oversight. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: add pinctrl for charger pinsDaniel Mack
The PEN2 line needs to be pulled up for the charger to enter high-current mode. Do this with a static pull on the GPIO. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa: raumfeld-controller: fix 'dock detect' GPIO keyDaniel Mack
The dock detection input key is active low. Also add a pinmux for it. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24ARM: pxa3xx: dts: Add defines for pinctrl-single,bias-pull{up,down}Daniel Mack
This allows users of the pinctrl driver to specify either pinctrl-single,bias-pullup = MPF_PULL_UP; or pinctrl-single,bias-pulldown = MPF_PULL_DOWN; To activate the pull bits in the MFP registers. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2019-06-24arm64: dts: librem5: enable the SNVS power keyAngus Ainslie (Purism)
Enable the snvs power key. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: librem5: Limit the USB to 5VAngus Ainslie (Purism)
The charge controller can handle 14V but the PTC on the devkit can only handle 6V so limit the negotiated voltage to 5V. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: added ddr performance monitor nodesFrank Li
Add ddr performance monitor Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort LSIO subsystem devicesShawn Guo
We prefer to sort device nodes under simple bus in order of unit address. Let's sort the devices under lsio_subsys properly. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort alias alphabeticallyShawn Guo
We prefer to sort alias entries alphabetically, so let's move serial0 to the right place. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: Add lsio_mu13 nodeDaniel Baluta
lsio_mu13 node is used to communicate with DSP. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i modulePriit Laes
SMARC-sAMX6i is a SMARC (Smart Mobility Architecture) compliant module. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-23arm64: dts: imx8mm-evk: Enable audio codec wm8524Daniel Baluta
i.MX8MM has one wm8524 audio codec connected with SAI3 digital audio interface. This patch uses simple-card machine driver in order to enable wm8524 codec. We need to set: * SAI3 pinctrl configuration * codec reset gpio pinctrl configuration * clock hierarchy * codec node * simple-card configuration Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-22ARM: dts: BCM5301X: Fix most DTC W=1 warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: NSP: Fix the bulk of W=1 DTC warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: BCM63xx: Fix DTC W=1 warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: BCM53573: Fix DTC W=1 warningsFlorian Fainelli
Fix the the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property warnings. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: bcm-mobile: Fix most DTC W=1 warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: Cygnus: Fix most DTC W=1 warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: Fix BCM7445 DTC warningsFlorian Fainelli
Fixes a number of unit_address_vs_reg warnings: DTC arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb arch/arm/boot/dts/bcm7445.dtsi:66.6-225.4: Warning (unit_address_vs_reg): /rdb: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445.dtsi:227.21-298.4: Warning (unit_address_vs_reg): /memory_controllers: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445-bcm97445svmb.dts:9.9-14.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name arch/arm/boot/dts/bcm7445.dtsi:255.10-275.5: Warning (simple_bus_reg): /memory_controllers/memc@1: simple-bus unit address format error, expected "80000" arch/arm/boot/dts/bcm7445.dtsi:277.10-297.5: Warning (simple_bus_reg): /memory_controllers/memc@2: simple-bus unit address format error, expected "100000" Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22Merge tag 'tags/bcm2835-dt-next-2019-06-01' into devicetree/nextFlorian Fainelli
This pull requests enables DMA support for the main SPI controller on all Raspberry Pis. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: bcm283x: Enable DMA support for SPI controllerLukas Wunner
Without this, the driver for the BCM2835 SPI controller uses interrupt mode instead of DMA mode, incurring a significant performance penalty. The Foundation's device tree has had these attributes for years, but for some reason they were never upstreamed. They were originally contributed by Noralf Trønnes and Martin Sperl: https://github.com/raspberrypi/linux/commit/25f3e064afc8 https://github.com/raspberrypi/linux/commit/e0edb52b47e6 The DREQ numbers 6 and 7 are documented in section 4.2.1.3 of: https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Noralf Trønnes <noralf@tronnes.org>
2019-06-21ARM: dts: exynos: Fix language typo and indentationKrzysztof Kozlowski
Correct language typo and wrong indentation. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-21arm64: dts: mt8183: add efuse and Mediatek Chip id node to readMichael Mei
support for reading chip ID and efuse Signed-off-by: Michael Mei <michael.mei@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-06-21arm64: dts: mt8183: add spi nodeErin Lo
Add spi DTS node to the mt8183 and mt8183-evb. Signed-off-by: Mengqi Zhang <Mengqi.Zhang@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-06-21arm64: dts: mt8183: Add auxadc device nodeZhiyong Tao
Add auxadc device node for MT8183 Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-06-21arm64: dts: mt8183: add pinctrl device nodeZhiyong Tao
The commit adds pinctrl device node for mt8183 Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-06-21arm64: dts: mt8183: add capacity-dmips-mhzHsin-Yi, Wang
Pinned the frequency to the max and run dhrystone to get the value. little cpu: 11071 (max freq: 1989000) big cpu: 15293 (max freq: 1989000) 11071 : 15293 ~= 741 : 1024 Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-06-21ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boardsChristophe Roullier
On disco and eval board, Tx and Rx delay are applied (pull-up of 4.7k put on VDD) so which correspond to RGMII-ID mode with internal RX and TX delays provided by the PHY, the MAC should not add the RX or TX delays in this case Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157AManivannan Sadhasivam
Add devicetree support for Avenger96 board based on STM32MP157A MPU from ST Micro. This board is one of the 96Boards Consumer Edition board from Arrow Electronics and has the following features: SoC: STM32MP157AAC PMIC: STPMIC1A RAM: 1024 Mbyte @ 533MHz Storage: eMMC v4.51: 8 Gbyte microSD Socket: UHS-1 v3.01 Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac Bluetooth®v4.2 (BR/EDR/BLE) USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 LED: 4x User LED, 1x WiFi LED, 1x BT LED More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21dt-bindings: arm: stm32: Document Avenger96 devicetree bindingManivannan Sadhasivam
This commit documents Avenger96 devicetree binding based on STM32MP157 SoC. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schemaManivannan Sadhasivam
This commit converts STM32 SoC bindings to DT schema using jsonschema. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157Manivannan Sadhasivam
Add missing pinctrl definitions for STM32MP157 MPU. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: add sai id registers to stm32mp157cOlivier Moysan
Add identification registers to address range of SAI DT parent node, for stm32mp157c. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1Yannick Fertré
This patch adds a new property (power-supply) to panel rm68200 (raydium) on stm32mp157c-ev1. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-06-21arm64: tegra: Enable PCIe slots in P2972-0000 boardVidya Sagar
Enable PCIe controller nodes to enable respective PCIe slots on P2972-0000 board. Following is the ownership of slots by different PCIe controllers. Controller-0 : M.2 Key-M slot Controller-1 : On-board Marvell eSATA controller Controller-3 : M.2 Key-E slot Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DTVidya Sagar
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. The Tegra194 SoC contains six PCIe controllers and twenty P2U instances grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us) and NVIDIA High Speed (NVHS-8 P2Us) respectively. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21arm64: tegra: Add PEX DPD states as pinctrl propertiesManikanta Maddireddy
Add PEX deep power down states as pinctrl properties to set in PCIe driver. In Tegra210, BIAS pads are not in power down mode when clamps are applied. To set the pads in DPD, pass the PEX DPD states as pinctrl properties to PCIe driver. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-21arm64: tegra: Enable ACONNECT, ADMA and AGICSameer Pujar
Enable ACONNECT, ADMA and AGIC devices on Jetson TX2 and Jetson AGX Xavier. Verified driver probe path and devices get registered fine. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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