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Follow the model we use in the client. Make the sequence arguments
part of the regular RPC arguments. None of the callbacks that are
soon to be implemented expect results that need to be passed back
to the caller, so we don't define a separate RPC results structure.
For session validation, the cb_sequence decoding will use a pointer
to the sequence arguments that are part of the RPC argument.
Signed-off-by: Ricardo Labiaga <Ricardo.Labiaga@netapp.com>
[define struct nfsd4_cb_sequence here]
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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Keep the xprt used for create_session in cl_cb_xprt.
Mark cl_callback.cb_minorversion = 1 and remember
the client provided cl_callback.cb_prog rpc program number.
Use it to probe the callback path.
Use the client's network address to initialize as the
callback's address as expected by the xprt creation
routines.
Define xdr sizes and code nfs4_cb_compound header to be able
to send a null callback rpc.
Signed-off-by: Andy Adamson<andros@netapp.com>
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
Signed-off-by: Ricardo Labiaga <Ricardo.Labiaga@netapp.com>
[get callback minorversion from fore channel's]
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
[nfsd41: change bc_sock to bc_xprt]
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
[pulled definition for cl_cb_xprt]
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
[nfsd41: set up backchannel's cb_addr]
[moved rpc_create_args init to "nfsd: modify nfsd4.1 backchannel to use new xprt class"]
Signed-off-by: Benny Halevy <bhalevy@panasas.com>
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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Callbacks are always made using the machine's identity, so we can use a
single auth_generic credential shared among callbacks to all clients and
let the rpc code take care of the rest.
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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The failure here is pretty unlikely, but we should handle it anyway.
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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Otherwise, the upcall is going to be synchronous, which may not be what the
caller wants...
Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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On setting up the callback to the client, we attempt to use the same
authentication flavor the client did. We find an rpc cred to use by
calling rpcauth_lookup_credcache(), which assumes that the given
authentication flavor has a credentials cache. However, this is not
required to be true--in particular, auth_null does not use one.
Instead, we should call the auth's lookup_cred() method.
Without this, a client attempting to mount using nfsv4 and auth_null
triggers a null dereference.
Cc: stable@kernel.org
Signed-off-by: J. Bruce Fields <bfields@citi.umich.edu>
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[airlied:- adapted slightly in naming]
Signed-off-by: Yang Zhao <yang@yangman.ca>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Many years ago when this driver was written, it had a use, but these
days it's nothing but trouble and distributions should not enable it
in any situation.
Pretty much every console device a sparc machine could see has a
bonafide real driver, making the PROM console hack unnecessary.
If any new device shows up, we should write a driver instead of
depending upon this crutch to save us. We've been able to take care
of this even when no chip documentation exists (sunxvr500, sunxvr2500)
so there are no excuses.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The good definition of CLOCK_TICK_RATE for coldfires has been lost in the
merge of m68k and m68knommu include files. Restore it. Culprit :
commit ebafc17468d58bd903c886175ca84a4edc69ae1d
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ethernet pins on the 532x ColdFire CPU family are multi-function
pins. We need to enable them as ethernet pins when using the FEC
ethernet driver.
Bug report, and older patch, from timothee@manaud.net.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The improved interrupt support for ColdFire CPU cores means we no
longer need all the interrupt setup and ack hacks to support the NE2000
driver on ColdFire platforms. Remove all that code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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There is really no limit to the addresses which can be used by the
in*() and out*() family of IO space calls in m68k non-MMU environments.
So don't impose an artificial address limit, allow the full 32bit range.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Now that the ColdFire 5272 has full interrupt controller functionality
we can remove all the interrupt masking and acking code from the FEC
ethernet driver.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire 5272 CPU has a very different interrupt controller than
any of the other ColdFire parts. It needs its own controller code to
correctly setup and ack interrupts.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire 5249 CPU has a second (compleletly different) interrupt
controller. It is the only ColdFire CPU that has this type. It controlls
GPIO interrupts amongst a number of interrupts from other internal
peripherals. Add support code for it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The recent changes to the old ColdFire interrupt controller code means
we no longer need to manually unmask the timer interrupt. That is now
done in the interrupt controller code proper.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The older simple ColdFire interrupt controller has no one-to-one mapping
of interrupt numbers to bits in the interrupt mask register. Create a
mapping array that each ColdFire CPU type can populate with its available
interrupts and the bits that each use in the interrupt mask register.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The newer ColdFire 532x family of CPU's uses the old timer, but has a
newer interrupt controller. It doesn't need the special timer setup
that was required when using the older interrupt controller. Remove the
dead timer irq and level setting code, and define the hard coded vector.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire "timers" clock setup can be simplified. There is really no
need for the flexible per-platform setup code. The clock interrupt can be
hard defined per CPU platform (in CPU include files). This makes the
actual timer code simpler.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The external interrupts used on the old Coldfire parts with the old style
interrupt controller can be properly mask/unmasked in the interrupt
handling code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Each of the ColdFire CPU platform code that used the old style interrupt
controller had its own copy of the mcf_autovector() function. They are all
the same, remove them all and create a single function in the common
coldfire/intc.c code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Create an mcfintc.h include file with the definitions for the old style
ColdFire interrupt controller. They are only needed on CPU's that use
this old controller - so isolate them on their own.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire intc-simr interrupt controller should mask off all
interrupt sources at init time. Doing it here instead of separately
in each platform setup.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With fully implemented interrupt controller code we don't need to do
the custom interrupt setup for the timer device of the ColdFire 532x.
Remove that code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With proper interrupt controller code in place there is no need for
devices like the timers to have custom interrupt masking code.
Remove it (and the defines that go along with it).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The new code for the interrupt controller in the ColdFire 520x takes
care of all the interrupt controller setup. No manual config of the
level registers (ICR) is required by the platform device setup code.
So remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Each different m68knommu CPU interrupt controller type has its own
interrupt controller data structures now. Remove the old, and now not
used, common irq structs and init code from here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Define the interrupt controller structures along with the interrupt
controller code for the 68360 CPU. This brings the interrupt setup
and control into one place for this CPU family.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Define the interrupt controller structures along with the interrupt
controller code for the 68328 CPU family. This brings the interrupt
setup and control into one place for this CPU family.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple
interrupt controller. Use common setup code for them. This addition
means that all ColdFire CPU's now have some specific type of interrupt
controller code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With the common intc-simr interrupt controller code in place the ColdFire
532x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire 532x family of parts uses 2 of the same INTC interrupt
controlers used in the ColdFire 520x family. So modify the code to
support both parts. The extra code for the second INTC controler in
the case of the 520x is easily optimized away to nothing.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With the common intc-2 interrupt controller code in place the ColdFire
523x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With the common intc-2 interrupt controller code in place the ColdFire
528x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Create general interrupt controller code for the many ColdFire version 2
cores that use the two region INTC interrupt controller. This includes the
523x family, 5270, 5271, 5274, 5275, and the 528x families.
This code does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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With general interrupt controller code in place we don't need specific
unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Create general interrupt controller code for the ColdFire 520x family,
that does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.
Within the ColdFire family there is a variety of different interrupt
controllers in use. Some are used on multiple parts, some on only one.
There is quite some differences in some varients, so much so that
common code for all ColdFire parts would be impossible.
This commit introduces code to support one of the newer interrupt
controllers in the ColdFire 5208 and 5207 parts. It has very simple
mask and unmask operations, so is one of the easiest to support.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Change C99 style comments to traditional K&R style.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The non-mmu version of dma.h contains a lot of ColdFire specific DMA
support, but also all of the base m68k support. So use the non-mmu
version of dma.h for all.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The mmu and non-mmu versions of checksum.h are mostly the same,
merge them.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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It is reasonably strait forward to merge the mmu and non-mmu versions
of irq.h. Most of the defines and structs are not needed on non-mmu.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The mmu and non-mmu versions of processor.h have a lot of common code.
This is a strait forward merge. start_thread() could be improved, but
that is not quite as strait forward, leaving for a follow on change.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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We sometimes lock IB then the ring and sometimes the ring then
the IB. This is mostly due to the IB locking not being well defined
about what data in the structs it actually locks. Define what I
believe is the correct behaviour and gets rid of the lock dep ordering
warning.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This fixes my monitor with broken EDID so it at least get 800x600.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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