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2012-01-20ARM: mach-tegra: properly disable CPU idle callNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-01-20ARM: mach-s3c64xx: use standard arch_idle() implementationNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20ARM: mach-w90x900: properly disable CPU idle callNicolas Pitre
Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-shark: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-ixp4xx: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-ixp23xx: properly disable CPU idle callNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-msm: hook special idle handlers to arm_pm_idleNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: David Brown <davidb@codeaurora.org>
2012-01-20ARM: plat-mxc: hook special idle handlers to arm_pm_idleNicolas Pitre
... and remove redundant include of <mach/system.h>. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: s3c24xx: move special idle code to out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-h720x: move special idle code out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-gemini: move special idle code out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-ebsa110: move special idle code out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-clps711x: move special idle code out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-at91: move special idle code out of lineNicolas Pitre
... and hook it to arm_pm_idle. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2012-01-20ARM: mach-exynos: use standard arch_idle()Nicolas Pitre
This is equivalent and more similar to existing architectures. Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20ARM: mach-s5p64x0: move idle handler from pm_idle to arm_pm_idleNicolas Pitre
Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20ARM: mach-s5pc100: use standard arch_idle()Nicolas Pitre
This is equivalent and more similar to existing architectures. Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20ARM: mach-s5pv210: use standard arch_idle()Nicolas Pitre
This is equivalent and more similar to existing architectures. Signed-off-by: Nicolas Pitre <nico@linaro.org>
2012-01-20ARM: OMAP: convert idle handlers from pm_idle to arm_pm_idleNicolas Pitre
Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2012-01-20ARM: clean up idle handlersNicolas Pitre
Let's factor out the need_resched() check instead of having it duplicated in every pm_idle implementations to avoid inconsistencies (omap2_pm_idle is missing it already). The forceful re-enablement of IRQs after pm_idle has returned can go. The warning certainly doesn't trigger for existing users. To get rid of the pm_idle calling convention oddity, let's introduce arm_pm_idle() allowing for the local_irq_enable() to be factored out from SOC specific implementations. The default pm_idle function becomes a wrapper for arm_pm_idle and it takes care of enabling IRQs closer to where they are initially disabled. And finally move the comment explaining the reason for that turning off of IRQs to a more proper location. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com>
2012-01-20ARM: OMAP1: Fix pm_idle during suspendNicolas Pitre
Commit 9ccdac3662dbf3c75e8f8851a214bdf7d365a4bd ([ARM] idle: clean up pm_idle calling, obey hlt_counter) removed a check for NULL pm_idle. Replace the NULL assignment in the OMAP1 code with disable_hlt() to be in sync with the core code and restore the intended behavior. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
2012-01-20tcp: fix undo after RTO for CUBICNeal Cardwell
This patch fixes CUBIC so that cwnd reductions made during RTOs can be undone (just as they already can be undone when using the default/Reno behavior). When undoing cwnd reductions, BIC-derived congestion control modules were restoring the cwnd from last_max_cwnd. There were two problems with using last_max_cwnd to restore a cwnd during undo: (a) last_max_cwnd was set to 0 on state transitions into TCP_CA_Loss (by calling the module's reset() functions), so cwnd reductions from RTOs could not be undone. (b) when fast_covergence is enabled (which it is by default) last_max_cwnd does not actually hold the value of snd_cwnd before the loss; instead, it holds a scaled-down version of snd_cwnd. This patch makes the following changes: (1) upon undo, revert snd_cwnd to ca->loss_cwnd, which is already, as the existing comment notes, the "congestion window at last loss" (2) stop forgetting ca->loss_cwnd on TCP_CA_Loss events (3) use ca->last_max_cwnd to check if we're in slow start Signed-off-by: Neal Cardwell <ncardwell@google.com> Acked-by: Stephen Hemminger <shemminger@vyatta.com> Acked-by: Sangtae Ha <sangtae.ha@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20tcp: fix undo after RTO for BICNeal Cardwell
This patch fixes BIC so that cwnd reductions made during RTOs can be undone (just as they already can be undone when using the default/Reno behavior). When undoing cwnd reductions, BIC-derived congestion control modules were restoring the cwnd from last_max_cwnd. There were two problems with using last_max_cwnd to restore a cwnd during undo: (a) last_max_cwnd was set to 0 on state transitions into TCP_CA_Loss (by calling the module's reset() functions), so cwnd reductions from RTOs could not be undone. (b) when fast_covergence is enabled (which it is by default) last_max_cwnd does not actually hold the value of snd_cwnd before the loss; instead, it holds a scaled-down version of snd_cwnd. This patch makes the following changes: (1) upon undo, revert snd_cwnd to ca->loss_cwnd, which is already, as the existing comment notes, the "congestion window at last loss" (2) stop forgetting ca->loss_cwnd on TCP_CA_Loss events (3) use ca->last_max_cwnd to check if we're in slow start Signed-off-by: Neal Cardwell <ncardwell@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20enic: fix compile when CONFIG_PCI_IOV is not enabledRoopa Prabhu
reverting back change that access enic->num_vfs outside CONFIG_PCI_IOV Reported-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Roopa Prabhu <roprabhu@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-01-20ASoC: mxs: Fix mxs-saif timeoutFabio Estevam
On a mx28evk board the following errors happens on mxs-sgtl5000 probe: [ 0.660000] saif0_clk_set_rate: divider writing timeout [ 0.670000] mxs-sgtl5000: probe of mxs-sgtl5000.0 failed with error -110 [ 0.670000] ALSA device list: [ 0.680000] No soundcards found. This timeout happens because clk_set_rate will result in writing to the DIV bits of register HW_CLKCTRL_SAIF0 with the saif clock gated (CLKGATE bit set to one). MX28 Reference states the following about CLKGATE: "The DIV field can change ONLY when this clock gate bit field is low." So call clk_prepare_enable prior to clk_set_rate to fix this problem. After this change the mxs-saif driver can be correctly probed and audio is functional. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20Revert "drm/i915: Work around gen7 BLT ring synchronization issues."Keith Packard
This reverts commit 42ff6572e5a4a7414330a4ca91f0335da67deca9. New forcewake voodoo makes this no longer necessary. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
2012-01-20MFD: mcp-core: fix complaints from the genirq layerRussell King
The genirq layer complains if an interrupt handler returns with interrupts enabled. The UCB1x00 handler does just this, because ucb1x00_enable() calls mcp_enable(), which uses spin_lock_irq() rather than spin_lock_irqsave(). Convert this, and the divisor setting functions to use spin_lock_irqsave(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-20Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp ↵Russell King
bus." This reverts commit 5dd7bf59e0e8563265b3e5b33276099ef628fcc7. Conflicts: scripts/mod/file2alias.c This change is wrong on many levels. First and foremost, it causes a regression. On boot on Assabet, which this patch gives a codec id of 'ucb1x00', it gives: ucb1x00 ID not found: 1005 0x1005 is a valid ID for the UCB1300 device. Secondly, this patch is way over the top in terms of complexity. The only device which has been seen to be connected with this MCP code is the UCB1x00 (UCB1200, UCB1300 etc) devices, and they all use the same driver. Adding a match table, requiring the codec string to match the hardware ID read out of the ID register, etc is completely over the top when we can just read the hardware ID register.
2012-01-20Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."Russell King
This reverts commit af9081ae64b941d32239b947882cd59ba855c5db. This revert is necessary to revert 5dd7bf59e0e8563265b3e5b33276099ef628fcc7.
2012-01-20hwmon: (f71805f) Fix clamping of temperature limitsJean Delvare
Properly clamp temperature limits set by the user. Without this fix, attempts to write temperature limits above the maximum supported by the chip (255 degrees Celsius) would arbitrarily and unexpectedly result in the limit being set to 0 degree Celsius. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: stable@vger.kernel.org Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
2012-01-20pinctrl: fix pinconf_pins_show iterationStephen Warren
Commit 706e852 "pinctrl: correct a offset while enumerating pins" modified the variable used by pinconf_pin_show()'s for loop, but didn't update the for loop test expression. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20MAINTAINERS: Add dma-buf sharing framework maintainerSumit Semwal
Adding maintainer info for dma-buf buffer sharing framework; some mailing lists interested in this work are also added. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Dave Airlie <airlied@redhat.com>
2012-01-20ARM: at91: Fix at91sam9g45 and at91cap9 resetJean-Christophe PLAGNIOL-VILLARD
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting. On those SoC the SDRAM/DDRAM controller is different. So, the assembly code ends up being not cleanly combined with previous at91sam9_alt_restart function. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: make rstc soc independentJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: introduce AT91_SAM9_ALT_RESET to select the at91sam9 alternative ↵Jean-Christophe PLAGNIOL-VILLARD
reset Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.hJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: fix cap9 ddrsdr registerJean-Christophe PLAGNIOL-VILLARD
fix AT91_DDRSDRC_MODE it's 3bit add missing AT91_DDRSDRC_NR_14, AT91_DDRSDRC_DBW (16 and 32 bits support) Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM/USB: at91/ohci-at91: rename vbus_pin_inverted to vbus_pin_active_lowJean-Christophe PLAGNIOL-VILLARD
Allows to configure independently the vbus_pin associated with each port. Matches usual naming scheme. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Cc: linux-usb@vger.kernel.org
2012-01-20USB: at91: fix clk_get error handlingJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Cc: linux-usb@vger.kernel.org
2012-01-20ARM: at91: removal of CAP9 SoC familyNicolas Ferre
Atmel CAP9 family is not maintained well and products may be difficult to find now. It will allow to save workforce and remove LOC during current cleanup process. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-01-20ARM: at91: fix at91rm9200 soc subtype handlingNicolas Ferre
Currently setting it to PQFP changes subtype to BGA as subtypes are swapped in at91rm9200_set_type(). Wrong subtype causes GPIO bank D not to work at all. After this fix, subtype is still set as unknown. But board code should fill it in with proper value. Another information is thus printed. Bug discovery and first implementation made by Veli-Pekka Peltola. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org>
2012-01-20ASoC: Disable register synchronisation for low frequency WM8996 SYSCLKMark Brown
With a low frequency SYSCLK and a fast I2C clock register synchronisation may occasionally take too long to take effect, causing I/O issues. Disable synchronisation in order to avoid any issues. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
2012-01-20ASoC: Don't go through cache when applying WM5100 rev A updatesMark Brown
These are all to either uncached registers or fixes to register defaults, in the former case the cache won't do anything and in the latter case we're fixing things so the cache sync will do the right thing. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
2012-01-20ASoC: Mark WM5100 register map cache only when going into BIAS_OFFMark Brown
Writing to the registers won't work if we do actually manage to hit a fully powered off state. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
2012-01-20ASoC: tlv320aic32x4: always enable analouge blockWolfram Sang
Register LDOCTLEN must always be initialized to clear the analog power control bit, otherwise the analog block will stay deactivated. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20ASoC: tlv320aic32x4: always enable dividersWolfram Sang
Dividers (such as MDAC) are always needed, independent of the codec being I2S master or slave. Needed on a custom board where the codec has to be slave. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20ASoC: sgtl5000: Fix wrong register name in restoreZeng Zhaoming
Correct SGTL5000_CHIP_CLK_CTRL to SGTL5000_CHIP_REF_CTRL in sgtl5000_restore_regs(), and add comment to explain the restore order. Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Zeng Zhaoming <zengzm.kernel@gmail.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20regmap: Reset cache status when reinitialsing the cacheMark Brown
When we reinitialise the cache make sure that we reset the cache access flags, ensuring that the reinitialised cache is in the default state which is what callers would and do expect given the function name. This is particularly likely to cause issues in systems where there was no cache previously as those systems have cache bypass enabled, as for the wm8994 driver where this was noticed. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-01-20mach-ux500: no MMC_CAP_SD_HIGHSPEED on SnowballPhilippe Langlais
MMC_CAP_SD_HIGHSPEED is not supported on Snowball board resulting on initialization errors. Cc: stable@kernel.org Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Fredrik Soderstedt <fredrik.soderstedt@stericsson.com> Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20mach-ux500: enable ARM errata 764369Srinidhi KASAGAR
This applies ARM errata 764369 for all ux500 platforms. Cc: stable@kernel.org Signed-off-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>