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2025-07-04drm/msm: Add _NO_SHARE flagRob Clark
Buffers that are not shared between contexts can share a single resv object. This way drm_gpuvm will not track them as external objects, and submit-time validating overhead will be O(1) for all N non-shared BOs, instead of O(n). Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661497/
2025-07-04drm/msm: Mark VM as unusable on GPU hangsRob Clark
If userspace has opted-in to VM_BIND, then GPU hangs and VM_BIND errors will mark the VM as unusable. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661499/
2025-07-04drm/msm: Add opt-in for VM_BINDRob Clark
Add a SET_PARAM for userspace to request to manage to the VM itself, instead of getting a kernel managed VM. In order to transition to a userspace managed VM, this param must be set before any mappings are created. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661494/
2025-07-04drm/msm: Lazily create context VMRob Clark
In the next commit, a way for userspace to opt-in to userspace managed VM is added. For this to work, we need to defer creation of the VM until it is needed. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661490/
2025-07-04drm/msm: Drop queued submits on lastclose()Rob Clark
If we haven't written the submit into the ringbuffer yet, then drop it. The submit still retires through the normal path, to preserve fence signalling order, but we can skip the IB's to userspace cmdstream. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661489/
2025-07-04drm/msm: Rename msm_gem_vma_purge() -> _unmap()Rob Clark
This is a more descriptive name. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661487/
2025-07-04drm/msm: Add PRR supportRob Clark
Add PRR (Partial Resident Region) is a bypass address which make GPU writes go to /dev/null and reads return zero. This is used to implement vulkan sparse residency. To support PRR/NULL mappings, we allocate a page to reserve a physical address which we know will not be used as part of a GEM object, and configure the SMMU to use this address for PRR/NULL mappings. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661486/
2025-07-04drm/msm: Add mmu support for non-zero offsetRob Clark
Only needs to be supported for iopgtables mmu, the other cases are either only used for kernel managed mappings (where offset is always zero) or devices which do not support sparse bindings. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661501/
2025-07-04drm/msm: Split out helper to get iommu prot flagsRob Clark
We'll re-use this in the vm_bind path. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661484/
2025-07-04drm/msm: Use drm_gpuvm types moreRob Clark
Most of the driver code doesn't need to reach in to msm specific fields, so just use the drm_gpuvm/drm_gpuva types directly. This should hopefully improve commonality with other drivers and make the code easier to understand. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661483/
2025-07-04drm/msm: Convert vm lockingRob Clark
Convert to using the gpuvm's r_obj for serializing access to the VM. This way we can use the drm_exec helper for dealing with deadlock detection and backoff. This will let us deal with upcoming locking order conflicts with the VM_BIND implmentation (ie. in some scenarious we need to acquire the obj lock first, for ex. to iterate all the VMs an obj is bound in, and in other scenarious we need to acquire the VM lock first). Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661478/
2025-07-04drm/msm: drm_gpuvm conversionRob Clark
Now that we've realigned deletion and allocation, switch over to using drm_gpuvm/drm_gpuva. This allows us to support multiple VMAs per BO per VM, to allow mapping different parts of a single BO at different virtual addresses, which is a key requirement for sparse/VM_BIND. This prepares us for using drm_gpuvm to translate a batch of MAP/ MAP_NULL/UNMAP operations from userspace into a sequence of map/remap/ unmap steps for updating the page tables. Since, unlike our prior vm/vma setup, with drm_gpuvm the vm_bo holds a reference to the GEM object. To prevent reference loops causing us to leak all GEM objects, we implicitly tear down the mapping when the GEM handle is close or when the obj is unpinned. Which means the submit needs to also hold a reference to the vm_bo, to prevent the VMA from being torn down while the submit is in-flight. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661479/
2025-07-04drm/msm: Refcount framebuffer pinsRob Clark
We were already keeping a refcount of # of prepares (pins), to clear the iova array. Use that to avoid unpinning the iova until the last cleanup (unpin). This way, when msm_gem_unpin_iova() actually tears down the mapping, we won't have problems if the fb is being scanned out on another display (for example). Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661477/
2025-07-04drm/msm: Stop passing vm to msm_framebufferRob Clark
The fb only deals with kms->vm, so make that explicit. This will start letting us refcount the # of times the fb is pinned, so we can only unpin the vma after last user of the fb is done. Having a single reference count really only works if there is only a single vm. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661476/
2025-07-04drm/msm: Don't close VMAs on purgeRob Clark
Previously we'd also tear down the VMA, making the address space available again. But with drm_gpuvm conversion, this would require holding the locks of all VMs the GEM object is mapped in. Which is problematic for the shrinker. Instead just let the VMA hang around until the GEM object is freed. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661472/
2025-07-04drm/msm: Collapse vma close and deleteRob Clark
This fits better drm_gpuvm/drm_gpuva. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661470/
2025-07-04drm/msm: Collapse vma allocation and initializationRob Clark
Now that we've dropped vram carveout support, we can collapse vma allocation and initialization. This better matches how things work with drm_gpuvm. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661471/
2025-07-04drm/msm: Remove vram carveout supportRob Clark
It is standing in the way of drm_gpuvm / VM_BIND support. Not to mention frequently broken and rarely tested. And I think only needed for a 10yr old not quite upstream SoC (msm8974). Maybe we can add support back in later, but I'm doubtful. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661467/
2025-07-04drm/msm: Rename msm_gem_address_space -> msm_gem_vmRob Clark
Re-aligning naming to better match drm_gpuvm terminology will make things less confusing at the end of the drm_gpuvm conversion. This is just rename churn, no functional change. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661466/
2025-07-04drm/msm: Improve msm_context commentsRob Clark
Just some tidying up. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661461/
2025-07-04drm/msm: Rename msm_file_private -> msm_contextRob Clark
This is a more descriptive name. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661459/
2025-07-04drm/gem: Add ww_acquire_ctx support to drm_gem_lru_scan()Rob Clark
If the callback is going to have to attempt to grab more locks, it is useful to have an ww_acquire_ctx to avoid locking order problems. Why not use the drm_exec helper instead? Mainly because (a) where ww_acquire_init() is called is awkward, and (b) we don't really need to retry after backoff, we can just move on to the next object. Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661463/
2025-07-04drm/gpuvm: Add locking helpersRob Clark
For UNMAP/REMAP steps we could be needing to lock objects that are not explicitly listed in the VM_BIND ioctl in order to tear-down unmapped VAs. These helpers handle locking/preparing the needed objects. Note that these functions do not strictly require the VM changes to be applied before the next drm_gpuvm_sm_map_lock()/_unmap_lock() call. In the case that VM changes from an earlier drm_gpuvm_sm_map()/_unmap() call result in a differing sequence of steps when the VM changes are actually applied, it will be the same set of GEM objects involved, so the locking is still correct. v2: Rename to drm_gpuvm_sm_*_exec_locked() [Danilo] v3: Expand comments to show expected usage, and explain how the usage is safe in the case of overlapping driver VM_BIND ops. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Acked-by: Danilo Krummrich <dakr@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/661458/
2025-07-04drm/gpuvm: Fix doc commentsRob Clark
Correctly summerize drm_gpuvm_sm_map/unmap, and fix the parameter order and names. Just something I noticed in passing. v2: Don't rename the arg names in prototypes to match function declarations [Danilo] Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Danilo Krummrich <dakr@kernel.org> Tested-by: Antonino Maniscalco <antomani103@gmail.com> Reviewed-by: Antonino Maniscalco <antomani103@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/661456/
2025-07-04drm/msm: Add error handling for krealloc in metadata setupYuan Chen
Function msm_ioctl_gem_info_set_metadata() now checks for krealloc failure and returns -ENOMEM, avoiding potential NULL pointer dereference. Explicitly avoids __GFP_NOFAIL due to deadlock risks and allocation constraints. Signed-off-by: Yuan Chen <chenyuan@kylinos.cn> Patchwork: https://patchwork.freedesktop.org/patch/661235/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04drm/msm/adreno: Add Adreno X1-45 supportAkhil P Oommen
Add support for Adreno X1-45 GPU present Snapdragon X1P42100 series of compute chipsets. This GPU is a smaller version of X1-85 GPU with lower core count and smaller internal memories. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> # x1-26-100 Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/660217/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04dt-bindings: opp: adreno: Update regex of OPP entryAkhil P Oommen
In some cases, an OPP may have multiple variants to describe the differences in the resources between SKUs. As an example, we may want to vote different peak bandwidths in different SKUs for the same frequency and the OPP node names can have an additional integer suffix to denote this difference like below: opp-666000000-0 { opp-hz = /bits/ 64 <666000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; opp-peak-kBps = <8171875>; qcom,opp-acd-level = <0xa82d5ffd>; opp-supported-hw = <0xf>; }; /* Only applicable for SKUs which has 666Mhz as Fmax */ opp-666000000-1 { opp-hz = /bits/ 64 <666000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; opp-peak-kBps = <16500000>; qcom,opp-acd-level = <0xa82d5ffd>; opp-supported-hw = <0x10>; }; Update the regex to allow this usecase. Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> # x1-26-100 Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/660213/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04dt-bindings: power: qcom,rpmpd: add Turbo L5 cornerAkhil P Oommen
Update the RPMH level definitions to include TURBO_L5 corner. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/661840/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04drm/msm/adreno: Add speedbin support for X1-85Akhil P Oommen
Add the speedbin table to the X1-85's entry in the catalogue to enable SKU detection. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/661837/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-07-04drm/ci: Uprev igtRob Clark
Pull in igt updates that are a dependency for VM_BIND, and will reduce msm_mapping flakes. Skip msm_mapping@memptrs on sc7180 (the test should be checking for preemption support, and skipping if it is not supported). Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/77 Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/662524/
2025-07-04drm/msm/dp: add linux/io.h header to fix build errorsRandy Dunlap
Add <linux/io.h> header to pull in readl/writel and friends. This eliminates the following build errors: drivers/gpu/drm/msm/dp/dp_panel.c: In function 'msm_dp_read_link': drivers/gpu/drm/msm/dp/dp_panel.c:33:16: error: implicit declaration of function 'readl_relaxed' [-Wimplicit-function-declaration] 33 | return readl_relaxed(panel->link_base + offset); drivers/gpu/drm/msm/dp/dp_panel.c: In function 'msm_dp_write_link': drivers/gpu/drm/msm/dp/dp_panel.c:43:9: error: implicit declaration of function 'writel' [-Wimplicit-function-declaration] 43 | writel(data, panel->link_base + offset); Fixes: 603fc0fc30bf ("drm/msm/dp: drop the msm_dp_catalog module") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Cc: Dmitry Baryshkov <lumag@kernel.org> Cc: Rob Clark <robin.clark@oss.qualcomm.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/659442/ Link: https://lore.kernel.org/r/20250617185611.2965223-1-rdunlap@infradead.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/mdss: Add support for SM8750Krzysztof Kozlowski
Add support for the Qualcomm SM8750 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659625/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-13-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement LM crossbar for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with new LM crossbar that requires each pipe rectangle to be programmed separately in blend stage. Implement support for this along with a new CTL_LAYER_ACTIVE register and setting the blend stage in layer mixer code. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659632/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-12-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with new CTL_PIPE_ACTIVE register for selective activation of pipes, which replaces earlier dpu_hw_ctl_setup_blendstage() code path for newer devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659630/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-11-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPUKrzysztof Kozlowski
v12.0 DPU on SM8750 comes with 10-bit color alpha. Add register differences and new implementations of setup_alpha_out(), setup_border_color() and setup_blend_config(). Notable changes in v6: Correct fg_alpha shift on new DPU, pointed out by Abel Vesas. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659629/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-10-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Consistently use u32 instead of uint32_tKrzysztof Kozlowski
Linux coding style asks to use kernel types like u32 instead of uint32_t and code already has it in other places, so unify the remaining pieces. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659623/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-9-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Add support for SM8750Krzysztof Kozlowski
Add DPU version v12.0 support for the Qualcomm SM8750 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659622/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-8-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dsi: Add support for SM8750Krzysztof Kozlowski
Add support for DSI on Qualcomm SM8750 SoC with notable difference: DSI PHY PLLs, the parents of pixel and byte clocks, cannot be used as parents before DSI PHY is configured, the PLLs are prepared and their initial rate is set. Therefore assigned-clock-parents are not working here and driver is responsible for reparenting clocks with proper procedure: see dsi_clk_init_6g_v2_9(). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659619/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-7-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dsi/phy: Add support for SM8750Krzysztof Kozlowski
Add support for DSI PHY v7.0 on Qualcomm SM8750 SoC which comes with an incompatible hardware interface change: ICODE_ACCUM_STATUS_LOW and ALOG_OBSV_BUS_STATUS_1 registers - their offsets were just switched. Currently these registers are not used in the driver, so the easiest is to document both but keep them commented out to avoid conflict. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659616/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-6-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750Krzysztof Kozlowski
Add MDSS/MDP display subsystem for Qualcomm SM8750 SoC, next generation with two revisions up of the IP block comparing to SM8650. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659614/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-5-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04dt-bindings: display/msm: qcom,sm8650-dpu: Add SM8750Krzysztof Kozlowski
Add DPU for Qualcomm SM8750 SoC which has several differences, new blocks and changes in registers, making it incompatible with SM8650. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659612/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-4-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04dt-bindings: display/msm: dp-controller: Add SM8750Krzysztof Kozlowski
Add DisplayPort controller for Qualcomm SM8750 SoC which so far looks fully compatible with earlier SM8650 variant - both are of version v1.5.1 of the IP block. Datasheet also mentions that both support 4x MST for DPTX0 and 2x MST for DPTX1. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659611/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-3-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04dt-bindings: display/msm: dsi-controller-main: Add SM8750Krzysztof Kozlowski
Add DSI controller for Qualcomm SM8750 SoC which is quite different from previous (SM8650) generation. It does not allow the display clock controller clocks like "byte" and "pixel" to be reparented to DSI PHY PLLs while the DSI PHY PLL is not configured (not prepared, rate not set). Therefore assigned-clock-parents are not working here and driver is responsible for reparenting clocks with proper procedure. These clocks are now inputs to the DSI controller device. Except that SM8750 DSI comes with several differences, new blocks and changes in registers, making it incompatible with SM8650. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659609/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-2-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04dt-bindings: display/msm: dsi-phy-7nm: Add SM8750Krzysztof Kozlowski
Add DSI PHY v7.0 for Qualcomm SM8750 SoC which is quite different from previous (SM8650) generation. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/659615/ Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-1-a591c609743d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dpu: Fill in min_prefill_lines for SC8180XKonrad Dybcio
Based on the downstream release, predictably same value as for SM8150. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Fixes: f3af2d6ee9ab ("drm/msm/dpu: Add SC8180x to hw catalog") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/657794/ Link: https://lore.kernel.org/r/20250610-topic-dpu_8180_mpl-v1-1-f480cd22f11c@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-07-04drm/msm/dp: drop the msm_dp_catalog moduleDmitry Baryshkov
Now as the msm_dp_catalog module became nearly empty, drop it, accessing registers directly from the corresponding submodules. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/654332/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-11-2f0ec3ec000d@oss.qualcomm.com
2025-07-04drm/msm/dp: move interrupt handling to dp_ctrlDmitry Baryshkov
It makes it easier to keep all interrupts-related code in dp_ctrl submodule. Move all functions to dp_ctrl.c. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/654330/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-10-2f0ec3ec000d@oss.qualcomm.com
2025-07-04drm/msm/dp: move more AUX functions to dp_aux.cDmitry Baryshkov
Move several misnamed functions accessing AUX bus to dp_aux.c, further cleaning up dp_catalog submodule. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/654333/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-9-2f0ec3ec000d@oss.qualcomm.com
2025-07-04drm/msm/dp: move/inline ctrl register functionsDmitry Baryshkov
Move CTRL-related functions to dp_ctrl.c, inlining one line wrappers during this process. The enable/disable functions have been split to the enable/disable or enter/exit pairs. The IRQ and HPD related functions are left in dp_catalog.c, pending later cleanup. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/654328/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-8-2f0ec3ec000d@oss.qualcomm.com
2025-07-04drm/msm/dp: move/inline audio related functionsDmitry Baryshkov
Move audio-related functions to dp_audio.c, following up the cleanup done by the rest of the submodules. Inline functions with simple register access patterns. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/654325/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-7-2f0ec3ec000d@oss.qualcomm.com
generated by cgit (git 2.34.1) at 2025-09-08 06:50:09 +0000