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2019-04-08ARM: OMAP2+: Drop gpio platform data for omap4Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for omap4Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for omap4Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: pocketbeagle: Replaced register offsets with definesChristina Quast
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: boneblack-wireless: Replaced register offsets with definesChristina Quast
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: boneblack-common: Replaced register offsets with definesChristina Quast
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: bone-common: Replaced register offsets with definesChristina Quast
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am33xx: Added AM33XX_PADCONF macroChristina Quast
AM33XX_PADCONF takes three instead of two parameters, to make future changes to #pinctrl-cells easier. For old boards which are not mainlined, we left the AM33XX_IOPAD macro. Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am33xx: Added macros for numeric pinmux addressesChristina Quast
The values are extraced from the "AM335x SitaraTM Processors Technical Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the file autogenerated by TI PinMux. Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08arm64: dts: hi3660: Fixup unofficial dma-min-chan to dma-channel-maskJohn Stultz
A undocumented and unimplemented binding got into the hi3660 dtsi, and this switches that binding to the now documented one. Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add hisi asp dma deviceYoulin Wang
Add asp-dma device to hi3660 dts Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Youlin Wang <wwx575822@notesmail.huawei.com> Signed-off-by: Tanglei Han <hantanglei@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add dma to uart nodesJohn Stultz
Try to add DMA support to the uart nodes following the assignments made in the dts from the victoria vendor kernel here: https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hikey970: Add SD and WiFi supportManivannan Sadhasivam
Add SD and WiFi support for HiKey970 board based on HI3670 SoC. Due to the absence of the PMIC driver, fixed regulators are sourced to make the driver working. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hi3670: Add MMC controller supportManivannan Sadhasivam
Add MMC controller support for HiSilicon HI3670 SoC reusing the HI3660 Designware MMC driver. There are 2 DWMMC controllers present in this SoC: 1. DWMMC1 is used for SD card (SD) 2. DWMMC2 is used for WiFi (SDIO) Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08dt-bindings: mmc: Add HI3670 MMC controller bindingManivannan Sadhasivam
HI3670 SoC is architecturally same as the HI3660 SoC. Hence, the same K3 specific designware driver is reused for HI3670 SoC and the binding is documented with fallback approach for compatible property. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hi3670: Add reset controller supportManivannan Sadhasivam
Add reset controller support for HiSilicon HI3670 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08dt-bindings: reset: Add HI3670 reset controller bindingManivannan Sadhasivam
HI3670 SoC is architecturally same as the HI3660 SoC. Hence, the same driver is reused for HI3670 SoC and the binding is documented here which uses the fallback approach. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08ARM: dts: sunxi: Improve A33 NAND transfers by using DMAMiquel Raynal
In the current state, A33 NAND controllers use PIO during transfers. Throughput can be increased thanks to the use of DMA (mostly during reads, because of the ECC pipelining feature). Besides the usual addition of DMA DT properties, because the A33 NAND DMA handling is different than for older SoCs, we must also update the compatible which has recently been introduced for this purpose. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-05Documentation: bus: ti-sysc: fix spelling mistakes "multipe" and "interconnet"Colin Ian King
There is are a couple of spelling mistakes in the Documentation. Fix them. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05bus: ti-sysc: Detect DMIC for debuggingTony Lindgren
Detect DMIC to see what we have connected if config DEBUG is enabled. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren
In preparation of dropping interconnect target module platform data in favor of devicetree based data, we must pass swsup idle quirks to the platform data functions. For now, let's only tag the UART modules with the SWSUP_SIDLE_ACT quirk. The other modules will get tagged with swsup quirks as we drop the platform data and test the changes. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05bus: ti-sysc: Pass clockactivity quirk to platform functionsTony Lindgren
We already have the clockactivity quirk set for some modules like i2c, timers and smartreflex. But we're not passing it to the platform functions yet. Let's start doing that in preparation of dropping interconnect target module platform data in favor of device tree based data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGADinh Nguyen
Add the initial device tree files for Intel's Agilex SoCFPGA platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-04-05ARM: dts: sun8i: tbs-a711: Enable UART2 (for NEO-6M GPS module)Ondrej Jirman
TBS A711 tablet contains u-blox NEO-6M module connected to UART2. Enable UART2 to gain access to the module from userspace. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-05arm64: dts: allwinner: h6: Add device node for SIDYangtao Li
The device tree binding already lists compatible strings for H6 SoC, so add a device node for it. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-05ARM: dts: aspeed: Add RTC nodeJoel Stanley
The ASPEED ast2400 and ast2500 both contain an on board RTC device. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed: witherspoon: Update BMC partitioningEdward A. James
Add simplified partitions for BMC and alternate flash. Include these by default in Witherspoon. Signed-off-by: Edward A. James <eajames@us.ibm.com> Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed: cmm: enable iio-hwmon-adcTao Ren
Bind aspeed ADC channels 0-7 to "iio-hwmon" driver so the data of these voltage sensing channels can be accessed by "lm_sensors". Channels 8-15 are not used on CMM BMC. Signed-off-by: Tao Ren <taoren@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed: tiogapass: Enable VUARTVijay Khemka
Enabling vuart for Facebook tiogapass Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed-g5: Add video engineEddie James
Add a node to describe the video engine on the AST2500. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed: Enable the GFX IPJoel Stanley
The GFX controller is the internal graphics device used by the SoC (opposed to the one connected via the PCIe device and used by the host). This configures it with a framebuffer region and adds it to the command line so kernel boot messages appear on the display. Enabled for Romulus, Witherspoon, and the ASPEED AST2500 EVB. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed-g5: Add resets and clocks to GFX nodeJoel Stanley
The ast2500 has a reset for the CRT device that must be deasserted before it can be used. Similarly it has a clock gate for a clock called D1CLK that must be set to running. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05ARM: dts: aspeed: witherspoon: Enable vhubEddie James
Enable the virtual USB hub. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-04ARM: dts: sunxi: Remove useless pinctrl nodesMaxime Ripard
We have for the H3 boards some kind of cargo cult apparently, where we would have a pinctrl node even for GPIOs without any particular settings. This is pretty much useless, so let's remove them. Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-04ARM: dts: sunxi: Remove pinctrl groups setting biasMaxime Ripard
So far we've enabled pull-up and pull-down resistors on GPIOs using a pinctrl node. Now that the GPIO binding allows for a flag to declare this, let's switch to it. This brings us closer to removing all the GPIO pinctrl nodes, which will in turn allow us to switch the pinctrl strict mode on. Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-04ARM: dts: aspeed: palmetto: Fix flash_memory regionLei YU
The flash_memory region was incorrect and exceeds AST2400's RAM range. Fix it by putting it before coldfire region, and aligned with 32MiB. Signed-off-by: Lei YU <mine260309@gmail.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-04ARM: dts: aspeed: ast2500: Update flash layoutJoel Stanley
Move to the openbmc-flash-layout.dtsi file. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-03bus: ti-sysc: Add quirk handling for external optional functional clockTony Lindgren
We cannot access mcpdm registers at all unless there is an optional pdmclk configured. As this is currently only needed for mcpdm, let's check for mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules too, we can add more flags to the quirks table for this. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Add support for early quirks based on register addressTony Lindgren
At least mcpdm needs an optional external clock enabled to function and this clock typically comes from the PMIC. We can detect mcpdm based on the interconnect target module address and set a quirk flag early. To do this, let's initialize the clocks a bit later and add a new function for sysc_init_early_quirks(). Note that we cannot yet enable the early quirks for mcpdm until the optional external clocks are handled in the in the following patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Move rstctrl reset to happen laterTony Lindgren
We can do the rsstctrl a bit later, but need to deassert rstctrl reset before the clocks are enabled if asserted. Let's only init restctrl in sysc_init_resets() and do the reset later on just before we enable the device clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Manage clocks for the interconnect target module in all casesTony Lindgren
We are currently not managing interconnect target module clocks in the for legacy platform data based case. This causes a problem for using the platform data based functions when dropping the platform data for the interconnect target module configuration. To avoid a situation where we need to populate the main and optional clocks also for the platform data based functions, let's just manage the clocks directly in ti-sysc driver. This means that until the interconnect target module confugration platform data is dropped our use count for clk_enable() will be 2 instead of 1. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Allocate mdata as needed and do platform data based init laterTony Lindgren
The platform data based init functions typically reset the interconnect target module configure the registers. As we may need the interconnect target module specific quirks configured based on the revision register, we want to move the platform data based init to happen later. Let's allocate mdata as needed so it's available for sysc_legacy_init() that we call with module clocks enabled from sysc_init_module(). Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Enable all clocks directly during init to read revisionTony Lindgren
The first thing we want to do is just read the module revision register to be able to configure the module specific quirks and configure the module registers. As the interconnect target module may not yet be properly configured and may need a reset first, we don't want to use pm_runtime_get() at this point. To read the revision register, let's just enable the all the clocks for the interconnect target module during init even if the optional clocks are not needed. That way we can read the revision register to configure the quirks needed for PM runtime. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-02ARM: dts: sunxi: Remove useless address and size cellsMaxime Ripard
The NAND chips in our DTs have address and size cells, even though they don't have any child nodes. Remove them. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-02ARM: dts: sunxi: Conform to DT spec for NAND controllerMaxime Ripard
The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-01bus: ti-sysc: Add separate functions for handling clocksTony Lindgren
At least McPDM module depends on an external optional clock to be usable. To make handling of the McPDM clock easier in the following patches, let's add separate functions for handling the main clocks and the optional clocks. Let's also add error handling to shut down already enabled clocks while at it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-01bus: ti-sysc: Move legacy platform data idling into separate functionsTony Lindgren
Let's move the legacy idle and enable into separate functions to simplify PM runtime functions a bit. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-01bus: ti-sysc: Make functions staticTony Lindgren
We can make sysc_write() and sysc_child_pm_domain static as noted by sparse. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-01bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-initTony Lindgren
We have ti,no-idle in use in addition to ti,no-idle-on-init but we're missing handling for it in the ti-sysc interconnect target module driver. Let's also group the idle defines together and update the binding documentation for it. Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-01bus: ti-sysc: Fix sysc_unprepare() when no clocks have been allocatedTony Lindgren
If we return early before ddata->clocks have been allocated we will get a NULL pointer dereference in sysc_unprepare(). Let's fix this by returning early when no clocks are allocated. Fixes: 0eecc636e5a2 ("bus: ti-sysc: Add minimal TI sysc interconnect target driver") Signed-off-by: Tony Lindgren <tony@atomide.com>