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2021-12-22software node: fix wrong node passed to find nargs_propClément Léger
nargs_prop refers to a property located in the reference that is found within the nargs property. Use the correct reference node in call to property_entry_read_int_array() to retrieve the correct nargs value. Fixes: b06184acf751 ("software node: Add software_node_get_reference_args()") Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Daniel Scally <djrscally@gmail.com> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22Merge tag 'asoc-fix-v5.16-rc6' of ↵Takashi Iwai
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v5.16 This is a relatively large set of driver specific changes so it may make sense to hold off to v5.17, though picking some over might be good. It's a combination of new device IDs and fixes for various driver specific things which are all small and of the usual "really bad if you're running into them" level, especially the Tegra ones.
2021-12-22Merge tag 'aspeed-5.17-devicetree' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt ASPEED device tree updates for 5.17 - New machines: * TYAN S8036 AST2500 BMC * Facebook Bletchley AST2600 BMC * Yadro VEGMAN series of AST2500 BMC for x86 servers - LPC clock additions, to fix long standing missed irq on boot issue - Secure boot controller description for AST2600 - Alternate chip flash layout, used by Bytedance's G220A - Various additions to Rainier, Everest, S7106 * tag 'aspeed-5.17-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: aspeed: add device tree for YADRO VEGMAN BMC dt-bindings: vendor-prefixes: add YADRO ARM: dts: aspeed: mtjade: Add uefi partition ARM: dts: aspeed: mtjade: Add I2C buses for NVMe devices ARM: dts: aspeed: tyan-s7106: Update nct7802 config Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank type enumerationYazen Ghannam
AMD systems currently lay out MCA bank types such that the type of bank number "i" is either the same across all CPUs or is Reserved/Read-as-Zero. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS CS 3 SMU RAZ Future AMD systems will lay out MCA bank types such that the type of bank number "i" may be different across CPUs. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS NBIO 3 SMU RAZ Change the structures that cache MCA bank types to be per-CPU and update smca_get_bank_type() to handle this change. Move some SMCA-specific structures to amd.c from mce.h, since they no longer need to be global. Break out the "count" for bank types from struct smca_hwid, since this should provide a per-CPU count rather than a system-wide count. Apply the "const" qualifier to the struct smca_hwid_mcatypes array. The values in this array should not change at runtime. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211216162905.4132657-3-yazen.ghannam@amd.com
2021-12-22x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank typesYazen Ghannam
Add HWID and McaType values for new SMCA bank types, and add their error descriptions to edac_mce_amd. The "PHY" bank types all have the same error descriptions, and the NBIF and SHUB bank types have the same error descriptions. So reuse the same arrays where appropriate. [ bp: Remove useless comments over hwid types. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211216162905.4132657-2-yazen.ghannam@amd.com
2021-12-22Merge tag 'arm-soc/for-5.17/maintainers' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/soc This pull request contains MAINTAINERS file sections updates for Broadcom SoCs for v5.17, please pull the following: - Rafal updates the BCM5301X and BCM53573 SoCs sections to list Florian as second mainainer * tag 'arm-soc/for-5.17/maintainers' of https://github.com/Broadcom/stblinux: MAINTAINERS: Add Florian as BCM5301X and BCM53573 maintainer
2021-12-22Merge tag 'arm-soc/for-5.17/drivers' of https://github.com/Broadcom/stblinux ↵Arnd Bergmann
into arm/dt This pull request contains Broadcom SoCs drivers changes for v5.17, please pull the following changes: - Wan adds a missing of_node_put() in the power management driver for MIPS SoCs. * tag 'arm-soc/for-5.17/drivers' of https://github.com/Broadcom/stblinux: soc: bcm: brcmstb: Add of_node_put() in pm-mips Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22Merge tag 'arm-soc/for-5.17/devicetree-arm64' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.17, please pull the following: - Rafal adds and documents the Netgear RAXE500 Wireless router based on the BCM4908 SoC. * tag 'arm-soc/for-5.17/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500 dt-bindings: arm: bcm: document Netgear RAXE500 binding Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22Merge tag 'arm-soc/for-5.17/devicetree' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SocS Device Tree changes for v5.17, please pull the following: - Matthew enables the QCA8337 switch of the Merak MX65 to have the appropriate PLL properties for it to be enabled and set the SGMII transmit clock to falling edge. - Arinc removes unnecessary properties of the GPIO keyboard Device Tree node, adds the external Realtek RTM8365MB switch on the Ausus RT-AC88U, including fixing the RX delay on the Realtek switch side and enabling flow control on the Broadcom internal switch port connecting to the Realtek switch. - Christian updates the Meraki MR32 Device Tree node to make use of the hardware I2C controller instead of bitbanging - Rafal updates the BCM5310X Device Tree files to have the CRU node not generate warnings, updates the USB 2.0 PHY to use the non-deprecated binding - Uwe adds GPIO offset to the gpio names properties for readability - Stefan updates the BCM2835 VCHIQ Device Tree binding to YAML - Florian fixes the iProc PCIe Device Tree nodes in Cygnus, Hurricane 2 and Northstar Plus to be compliant with the iProc PCIe YAML binding (merged in RobH's tree) as well as the SATA controller node unit name. * tag 'arm-soc/for-5.17/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: correct RX delay and enable flow control on Asus RT-AC88U ARM: dts: NSP: Rename SATA unit name ARM: dts: NSP: Fixed iProc PCIe MSI sub-node ARM: dts: HR2: Fixed iProc PCIe MSI sub-node ARM: dts: Cygnus: Update PCIe PHY node unit name(s) ARM: dts: Cygnus: Fixed iProc PCIe controller properties dt-bindings: soc: bcm: Convert brcm,bcm2835-vchiq to json-schema ARM: dts: bcm2711-rpi-4-b: Add gpio offsets to line name array ARM: dts: BCM5301X: use non-deprecated USB 2.0 PHY binding ARM: dts: BCM5301X: update CRU block description ARM: BCM53016: MR32: convert to Broadcom iProc I2C Driver ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U ARM: dts: BCM5301X: remove unnecessary address & size cells from Asus RT-AC88U ARM: dts: NSP: MX65: add qca8k falling-edge, PLL properties
2021-12-22Merge tag 'qcom-arm64-for-5.17-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DeviceTree updates for v5.17 This introduces initial support for the brand new Snapdragon 8 Gen 1, aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses, TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and USB currently supported. SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are described as thermal zones. OnePlus devices gains msm-id and board-id, to facilitate a single firmware image for the multiple devices. On SM8350 the Sony Xperia 1 III and 5 III, as well as initial description of Microsoft's Surface Duo 2 are introduced. On the platform side, LLCC, QUP nodes, redistributor stride and all the low-speed QUPs are added MSM8996 gained various regulator fixes, and adsp firmware name to faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained touchkey controller definition. On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and regulator definitions, USB, eMMC and SD-card and a simple-framebuffer description. MSM8916 has the mmc aliases corrected, to stop the storage devices to move around and the RPM sleep stats memory is described. Support for the Samsung J5 2015 smartphone is introduced. SM6350 validation errors are fixed and and description of the audio, compute and modem remoteprocs are added. A couple new revisions of the SC7180 based Google devices are added. The SC7280 platform gains venus and a few fixes. The CRD development device is introduced, with the EC, touchscreen and touchpad. On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based on CPU frequency, are added. As is TX, RX macros and SoundWire blocks and used to enable audio on the SM8350 MTP. * tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits) arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes arm64: dts: qcom: sm8450: add cpufreq support arm64: dts: qcom: sm8450: Add rpmhpd node arm64: dts: qcom: sm8450-qrd: enable ufs nodes arm64: dts: qcom: sm8450: add ufs nodes arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes arm64: dts: qcom: Add base SM8450 QRD DTS arm64: dts: qcom: sm8450: add smmu nodes arm64: dts: qcom: sm8450: Add reserved memory nodes arm64: dts: qcom: sm8450: Add tlmm nodes arm64: dts: qcom: Add base SM8450 DTSI arm64: dts: qcom: ipq6018: Fix gpio-ranges property arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node arm64: qcom: dts: drop legacy property #stream-id-cells Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer" ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22arm64: errata: Fix exec handling in erratum 1418040 workaroundD Scott Phillips
The erratum 1418040 workaround enables CNTVCT_EL1 access trapping in EL0 when executing compat threads. The workaround is applied when switching between tasks, but the need for the workaround could also change at an exec(), when a non-compat task execs a compat binary or vice versa. Apply the workaround in arch_setup_new_exec(). This leaves a small window of time between SET_PERSONALITY and arch_setup_new_exec where preemption could occur and confuse the old workaround logic that compares TIF_32BIT between prev and next. Instead, we can just read cntkctl to make sure it's in the state that the next task needs. I measured cntkctl read time to be about the same as a mov from a general-purpose register on N1. Update the workaround logic to examine the current value of cntkctl instead of the previous task's compat state. Fixes: d49f7d7376d0 ("arm64: Move handling of erratum 1418040 into C code") Cc: <stable@vger.kernel.org> # 5.9.x Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211220234114.3926-1-scott@os.amperecomputing.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCXBjorn Andersson
The SM6125_VDDCX constant is introduced through a separate branch and is not available in the dts branch. Temporarily replace the constant with it's value to avoid the build breakage. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-12-22arm64: Unhash early pointer print plus improve commentGuilherme G. Piccoli
When facing a really early issue on DT parsing we have currently a message that shows both the physical and virtual address of the FDT. The printk pointer modifier for the virtual address shows a hashed address there unless the user provides "no_hash_pointers" parameter in the command-line. The situation in which this message shows-up is a bit more serious though: the boot process is broken, nothing can be done (even an oops is too much for this early stage) so we have this message as a last resort in order to help debug bootloader issues, for example. Hence, we hereby change that to "%px" in order to make debugging easy, there's not much information leak risk in such early boot failure. Also, we tried to improve a bit the commenting on that function, given that if kernel fails there, it just hangs forever in a cpu_relax() loop. The reason we cannot BUG/panic is that is too early to do so; thanks to Mark Brown for pointing that on IRC and thanks Robin Murphy for the good pointer hash discussion in the mailing-list. Cc: Mark Brown <broonie@kernel.org> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20211221155230.1532850-1-gpiccoli@igalia.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22x86/mm: Prevent early boot triple-faults with instrumentationBorislav Petkov
Commit in Fixes added a global TLB flush on the early boot path, after the kernel switches off of the trampoline page table. Compiler profiling options enabled with GCOV_PROFILE add additional measurement code on clang which needs to be initialized prior to use. The global flush in x86_64_start_kernel() happens before those initializations can happen, leading to accessing invalid memory. GCOV_PROFILE builds with gcc are still ok so this is clang-specific. The second issue this fixes is with KASAN: for a similar reason, kasan_early_init() needs to have happened before KASAN-instrumented functions are called. Therefore, reorder the flush to happen after the KASAN early init and prevent the compilers from adding profiling instrumentation to native_write_cr4(). Fixes: f154f290855b ("x86/mm/64: Flush global TLB on boot and AP bringup") Reported-by: "J. Bruce Fields" <bfields@fieldses.org> Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Carel Si <beibei.si@intel.com> Tested-by: "J. Bruce Fields" <bfields@fieldses.org> Link: https://lore.kernel.org/r/20211209144141.GC25654@xsang-OptiPlex-9020
2021-12-22asm-generic: introduce io_stop_wc() and add implementation for ARM64Xiongfeng Wang
For memory accesses with write-combining attributes (e.g. those returned by ioremap_wc()), the CPU may wait for prior accesses to be merged with subsequent ones. But in some situation, such wait is bad for the performance. We introduce io_stop_wc() to prevent the merging of write-combining memory accesses before this macro with those after it. We add implementation for ARM64 using DGH instruction and provide NOP implementation for other architectures. Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Suggested-by: Will Deacon <will@kernel.org> Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20211221035556.60346-1-wangxiongfeng2@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22net: ks8851: Check for error irqJiasheng Jiang
Because platform_get_irq() could fail and return error irq. Therefore, it might be better to check it if order to avoid the use of error irq. Fixes: 797047f875b5 ("net: ks8851: Implement Parallel bus operations") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-22drivers: net: smc911x: Check for error irqJiasheng Jiang
Because platform_get_irq() could fail and return error irq. Therefore, it might be better to check it if order to avoid the use of error irq. Fixes: ae150435b59e ("smsc: Move the SMC (SMSC) drivers") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-22fjes: Check for error irqJiasheng Jiang
I find that platform_get_irq() will not always succeed. It will return error irq in case of the failure. Therefore, it might be better to check it if order to avoid the use of error irq. Fixes: 658d439b2292 ("fjes: Introduce FUJITSU Extended Socket Network Device driver") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-22parisc: remove ARCH_DEFCONFIGMasahiro Yamada
Commit 2a86f6612164 ("kbuild: use KBUILD_DEFCONFIG as the fallback for DEFCONFIG_LIST") removed ARCH_DEFCONFIG because it does not make much sense. In the same development cycle, Commit ededa081ed20 ("parisc: Fix defconfig selection") added ARCH_DEFCONFIG for parisc. Please use KBUILD_DEFCONFIG in arch/*/Makefile for defconfig selection. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Helge Deller <deller@gmx.de> Signed-off-by: Helge Deller <deller@gmx.de>
2021-12-22Bluetooth: btintel: Add missing quirks and msft ext for legacy bootloaderTedd Ho-Jeong An
This patch add missing HCI quirks and MSFT extension for legacy bootloader when it is running in the operational firmware. Signed-off-by: Tedd Ho-Jeong An <tedd.an@intel.com> Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2021-12-22drm/i915: Require the vm mutex for i915_vma_bind()Thomas Hellström
Protect updates of struct i915_vma flags and async binding / unbinding with the vm::mutex. This means that i915_vma_bind() needs to assert vm::mutex held. In order to make that possible drop the caching of kmap_atomic() maps around i915_vma_bind(). An alternative would be to use kmap_local() but since we block cpu unplugging during sleeps inside kmap_local() sections this may have unwanted side-effects. Particularly since we might wait for gpu while holding the vm mutex. This change may theoretically increase execbuf cpu-usage on snb, but at least on non-highmem systems that increase should be very small. Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211221200050.436316-5-thomas.hellstrom@linux.intel.com
2021-12-22drm/i915: Break out the i915_deps utilityThomas Hellström
Since it's starting to be used outside the i915 TTM move code, move it to a separate set of files. v2: - Update the documentation. v4: - Rebase. Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211221200050.436316-4-thomas.hellstrom@linux.intel.com
2021-12-22drm/i915: remove questionable fence optimization during copyChristian König
First of all as discussed multiple times now kernel copies *must* always wait for all fences in a BO before actually doing the copy. This is mandatory. Additional to that drop the handling when there can't be a shared slot allocated on the source BO and just properly return an error code. Otherwise this code path would only be tested under out of memory conditions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211221200050.436316-3-thomas.hellstrom@linux.intel.com Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2021-12-22drm/i915: Avoid using the i915_fence_array when collecting dependenciesThomas Hellström
Since the gt migration code was using only a single fence for dependencies, these were collected in a dma_fence_array. However, it turns out that it's illegal to use some dma_fences in a dma_fence_array, in particular other dma_fence_arrays and dma_fence_chains, and this causes trouble for us moving forward. Have the gt migration code instead take a const struct i915_deps for dependencies. This means we can skip the dma_fence_array creation and instead pass the struct i915_deps instead to circumvent the problem. v2: - Make the prev_deps() function static. (kernel test robot <lkp@intel.com>) - Update the struct i915_deps kerneldoc. v4: - Rebase. Fixes: 5652df829b3c ("drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous") Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211221200050.436316-2-thomas.hellstrom@linux.intel.com
2021-12-22ath11k: add support of firmware logging for WCN6855Cheng Wang
Host enables WMI firmware logging feature via QMI message. Host receives firmware logging messages on WMI_DIAG_EVENTID, then sends logging messages to user space via event tracing infrastructure. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Signed-off-by: Cheng Wang <quic_chengwan@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20211220121053.357087-1-quic_chengwan@quicinc.com
2021-12-22ath11k: Fix napi related hangBen Greear
Similar to the same bug in ath10k, a napi disable w/out it being enabled will hang forever. I believe I saw this while trying rmmod after driver had some failure on startup. Fix it by keeping state on whether napi is enabled or not. And, remove un-used napi pointer in ath11k driver base struct. Signed-off-by: Ben Greear <greearb@candelatech.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20200903195254.29379-1-greearb@candelatech.com
2021-12-22ath10k: replace strlcpy with strscpyJason Wang
The strlcpy should not be used because it doesn't limit the source length. So that it will lead some potential bugs. But the strscpy doesn't require reading memory from the src string beyond the specified "count" bytes, and since the return value is easier to error-check than strlcpy()'s. In addition, the implementation is robust to the string changing out from underneath it, unlike the current strlcpy() implementation. Thus, replace strlcpy with strscpy. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20211221070931.725720-1-wangborong@cdjrlc.com
2021-12-21net/mlx5e: Take packet_merge params directly from the RX res structTariq Toukan
As packet_merge params structure is saved on the RX resources structure, there is no need to pass it separately. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Allocate per-channel stats dynamically at first usageLama Kayal
Make stats allocation per-channel dynamic on demand, at channel open operation. Previously the stats array was pre-allocated for the maximum possible number of channels. Here we defer the per-channel stats instance allocation upon its first usage, so that it's allocated only if really needed. Allocating stats on demand helps maintain a more memory-efficient code, as we're saving memory when the used number of channels is smaller than the maximum. The stats memory instances are still freed in mlx5e_priv_arrays_free(), so that they are persistent to channels' closure. Memory size allocated for struct mlx5e_channel_stats is 3648 bytes. If maximum number of channel stands for 64, the total memory space allocated for stats is 3648x64 = 228K bytes. In scenarios where the number of channels in use is significantly smaller than maximum number, the memory saved can be remarkable. Signed-off-by: Lama Kayal <lkayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Use dynamic per-channel allocations in statsTariq Toukan
Make stats array an array of pointer. This patch comes in to prepare for the next patch where allocations of the stats are to be performed dynamically on first usage. Signed-off-by: Lama Kayal <lkayal@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Allow profile-specific limitation on max num of channelsTariq Toukan
Let SF/VF representor's netdev use profile-specific limitation on max_nch to reduce its memory and HW resources consumption. This is particularly important for environments with limited memory and high number of SFs. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Vu Pham <vuhuong@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Save memory by using dynamic allocation in netdev privTariq Toukan
Many arrays in priv are statically allocated with a pre-defined maximum (for num channels, num TCs, etc...), that is in some cases significantly larger than the actual maximum. Examples: - The more VFs are supported, the less MSIX vectors each of them could have. This limits the max_nch for each. - Systems with limited number of cores or MSIX (< 64). - Netdev profiles that do not support: QoS (DCB / HTB), PTP TX port timestamping. Here we save some amount of memory by moving several structures and arrays to follow the actual maximum instead. This patch also prepares the code for even more savings to follow. For example, on a system where the maximum num of channel is 8, the channels stats structs alone go down from 3648*64 = 228 KB to 3648*8 = 28.5 KB per interface. This is important for environments with high number of VFs/SFs or limited memory. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Add profile indications for PTP and QOS HTB featuresTariq Toukan
Let the profile indicate support of the PTP and HTB (QOS) features. This unifies the logic that calculates the number of netdev queues needed for the features, and allows simplification of mlx5e_create_netdev(), which no longer requires number of rx/tx queues as parameters. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5e: Use bitmap field for profile featuresTariq Toukan
Use a features bitmap field in mlx5e_profile to declare profile support state of the different features. Let it replace the existing rx_ptp_support boolean. It will be extended to cover more features in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Remove the repeated declarationShaokun Zhang
Function 'mlx5_esw_vport_match_metadata_supported' and 'mlx5_esw_offloads_vport_metadata_set' are declared twice, so remove the repeated declaration and blank line. Cc: Saeed Mahameed <saeedm@nvidia.com> Cc: Leon Romanovsky <leon@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure max_macs generic paramShay Drory
Currently, max_macs is taking 70Kbytes of memory per function. This size is not needed in all use cases, and is critical with large scale. Hence, allow user to configure the number of max_macs. For example, to reduce the number of max_macs to 1, execute:: $ devlink dev param set pci/0000:00:0b.0 name max_macs value 1 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21devlink: Clarifies max_macs generic devlink paramShay Drory
The generic param max_macs documentation isn't clear. Replace it with a more descriptive documentation Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure event_eq_size paramShay Drory
Event EQ is an EQ which received the notification of almost all the events generated by the NIC. Currently, each event EQ is taking 512KB of memory. This size is not needed in most use cases, and is critical with large scale. Hence, allow user to configure the size of the event EQ. For example to reduce event EQ size to 64, execute:: $ devlink dev param set pci/0000:00:0b.0 name event_eq_size value 64 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21devlink: Add new "event_eq_size" generic device paramShay Drory
Add new device generic parameter to determine the size of the asynchronous control events EQ. For example, to reduce event EQ size to 64, execute: $ devlink dev param set pci/0000:06:00.0 \ name event_eq_size value 64 cmode driverinit $ devlink dev reload pci/0000:06:00.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21net/mlx5: Let user configure io_eq_size paramShay Drory
Currently, each I/O EQ is taking 128KB of memory. This size is not needed in all use cases, and is critical with large scale. Hence, allow user to configure the size of I/O EQs. For example, to reduce I/O EQ size to 64, execute: $ devlink dev param set pci/0000:00:0b.0 name io_eq_size value 64 \ cmode driverinit $ devlink dev reload pci/0000:00:0b.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-21devlink: Add new "io_eq_size" generic device paramShay Drory
Add new device generic parameter to determine the size of the I/O completion EQs. For example, to reduce I/O EQ size to 64, execute: $ devlink dev param set pci/0000:06:00.0 \ name io_eq_size value 64 cmode driverinit $ devlink dev reload pci/0000:06:00.0 Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-12-22drm/exynos: drop the use of label from exynos_dsi_register_te_irqInki Dae
Dropped the use of 'out' label from exynos_dsi_register_te_irq function because the label isn't needed. This patch returns an error in each error case directly not going to 'out' label. With this patch build warning[1] is also fixed, which was reported by kernel test robot <lkp@intel.com> [1] https://www.spinics.net/lists/dri-devel/msg323803.html Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: remove useless type conversionBernard Zhao
This change is to cleanup the code a bit. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: Implement mmap as GEM object functionThomas Zimmermann
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective exynos functions are being removed. The file_operations structure exynos_drm_driver_fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Fixed merge conflict. Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-22drm/exynos: Replace legacy gpio interface for gpiod interfaceMaíra Canal
Considering the current transition of the GPIO subsystem, remove all dependencies of the legacy GPIO interface (linux/gpio.h and linux /of_gpio.h) and replace it with the descriptor-based GPIO approach. Signed-off-by: Maíra Canal <maira.canal@usp.br> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-12-21Merge branch '1GbE' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-12-21 This series contains updates to igc, igb, igbvf, and fm10k drivers. Sasha removes unused defines and enum values from igc driver. Jason Wang removes a variable whose value never changes and, instead, returns the value directly for igb. Karen adjusts a reset message from warning to info for igbvf. Xiang wangx removes a repeated word for fm10k. * '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: fm10k: Fix syntax errors in comments igbvf: Refactor trace igb: remove never changed variable `ret_val' igc: Remove obsolete define igc: Remove obsolete mask igc: Remove obsolete nvm type igc: Remove unused phy type igc: Remove unused _I_PHY_ID define ==================== Link: https://lore.kernel.org/r/20211221180200.3176851-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21net: phy: micrel: Adding interrupt support for Link up/Link down in LAN8814 ↵Divya Koppera
Quad phy This patch add support for Link up or Link down interrupt support in LAN8814 Quad phy Signed-off-by: Divya Koppera <Divya.Koppera@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20211221112217.9502-1-Divya.Koppera@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21bonding: fix ad_actor_system option setting to defaultFernando Fernandez Mancera
When 802.3ad bond mode is configured the ad_actor_system option is set to "00:00:00:00:00:00". But when trying to set the all-zeroes MAC as actors' system address it was failing with EINVAL. An all-zeroes ethernet address is valid, only multicast addresses are not valid values. Fixes: 171a42c38c6e ("bonding: add netlink support for sys prio, actor sys mac, and port key") Signed-off-by: Fernando Fernandez Mancera <ffmancera@riseup.net> Acked-by: Jay Vosburgh <jay.vosburgh@canonical.com> Link: https://lore.kernel.org/r/20211221111345.2462-1-ffmancera@riseup.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-21bpftool: Enable line buffering for stdoutPaul Chaignon
The output of bpftool prog tracelog is currently buffered, which is inconvenient when piping the output into other commands. A simple tracelog | grep will typically not display anything. This patch fixes it by enabling line buffering on stdout for the whole bpftool binary. Fixes: 30da46b5dc3a ("tools: bpftool: add a command to dump the trace pipe") Signed-off-by: Quentin Monnet <quentin@isovalent.com> Signed-off-by: Paul Chaignon <paul@isovalent.com> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Yonghong Song <yhs@fb.com> Link: https://lore.kernel.org/bpf/20211220214528.GA11706@Mem
2021-12-21bpf: Use struct_size() helperXiu Jianfeng
In an effort to avoid open-coded arithmetic in the kernel, use the struct_size() helper instead of open-coded calculation. Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Yonghong Song <yhs@fb.com> Link: https://github.com/KSPP/linux/issues/160 Link: https://lore.kernel.org/bpf/20211220113048.2859-1-xiujianfeng@huawei.com