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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig update for 5.17:
- Enable pinctrl and clock drivers for i.MX8 ULP SoC.
- A couple of patches from Adam Ford to enable Camera driver support
for Beacon EmbeddedWorks i.MX8MM development kit.
- Enable drivers for devices found on TQMa8MxML-MBa8Mx board.
- Enable RTC_DRV_RV3029C2 driver support for DHCOM devices.
* tag 'imx-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Enable for DHCOM devices required RTC_DRV_RV3029C2
arm64: defconfig: enable drivers for booting i.MX8ULP
arm64: defconfig: enable drivers for TQ TQMa8MxML-MBa8Mx
arm64: defconfig: Enable OV5640
arm64: defconfig: Enable VIDEO_IMX_MEDIA
Link: https://lore.kernel.org/r/20211218071427.26745-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Call drop_pages with the gem object lock held, instead of the other
way around. This will allow us to drop the vma bindings with the
gem object lock held.
We plan to require the object lock for unpinning in the future,
and this is an easy target.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211216142749.1966107-3-maarten.lankhorst@linux.intel.com
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When reworking the code to move the eviction fence to the object,
the best code is removed code.
Remove some functions that are unused, and change the function definition
if it's only used in 1 place.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
[mlankhorst: Remove new use of i915_active_has_exclusive]
Link: https://patchwork.freedesktop.org/patch/msgid/20211216142749.1966107-2-maarten.lankhorst@linux.intel.com
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig
AT91 defconfig #1 for 5.17:
- Sama7: addition of QSPI SPI-NOR and the QSPI controller for this
product
- Addition of the crypto algorithms that are fallbacks for HW engines
* tag 'at91-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: configs: at91: Enable crypto software implementations
ARM: configs: at91: sama7: Enable SPI NOR and QSPI controller
Link: https://lore.kernel.org/r/20211217165850.29694-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig
ARM: tegra: Default configuration changes for v5.17-rc1
These patches enable various drivers used by new and existing boards in
both the Tegra default configuration and the multi-v7 configuration.
* tag 'tegra-for-5.17-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver
ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver
ARM: tegra_defconfig: Enable S/PDIF driver
ARM: config: multi v7: Enable display drivers used by Tegra devices
ARM: tegra_defconfig: Enable drivers wanted by Acer Chromebooks and ASUS tablets
Link: https://lore.kernel.org/r/20211217162253.1801077-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
of USI node.
* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
dt-bindings: arm: samsung: document jackpotlte board binding
dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
dt-bindings: soc: samsung: Add Exynos USI bindings
arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7
Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.17
1. Fix Bluetooth GPIO on GT-I9100.
2. Minor improvements and dtschema fixes.
* tag 'samsung-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
ARM: dts: exynos: Use interrupt for BCM4330 host wakeup in I9100
ARM: dts: exynos: Fix BCM4330 Bluetooth reset polarity in I9100
Link: https://lore.kernel.org/r/20211220115530.30961-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
- add device tree for Fairphone 1 (mt6589)
* tag 'v5.16-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: dts: mt6589: Add device tree for Fairphone 1
Link: https://lore.kernel.org/r/9ea1efa3-492b-7204-58f8-5253cd5b05f9@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
mt8183:
- add Acer Chromebook 314
- evb: add node to read thermisor from AUXIN0
- add several sku's for Lenovo IdeaPad Flex 3 Chromebook and ASUS Chromebook Detachable CM3
- update sensor mapping of the board temperature sensor
- add some coresight nodes for CPU debugging
- USB Type C connector description to all Chromebooks
mt8192, mt8516:
- smaller i2c related fixes
mt8173:
- enable backlight enable pin to all Chromebooks
mt7986[a,b]:
- add basic support
* tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
arm64: dts: mediatek: add pinctrl support for mt7986b
arm64: dts: mediatek: add pinctrl support for mt7986a
arm64: dts: mt8183: kukui: Add Type C node
arm64: dts: mediatek: add basic mt7986 support
dt-bindings: arm64: dts: mediatek: Add mt7986 series
arm64: dts: mt8183: support coresight-cpu-debug for mt8183
arm64: dts: mediatek: mt8173-elm: Add backlight enable pin config
arm64: dts: mediatek: mt8173-elm: Move pwm pinctrl to pwm0 node
arm64: dts: mt8183-kukui: Update Tboard sensor mapping table
arm64: dts: mediatek: mt8173: Add gce-client-reg to display od/ufo
dt-bindings: arm64: dts: mediatek: Add sku22 for mt8183 kakadu board
dt-bindings: arm64: dts: mediatek: Add more SKUs for mt8183 fennel board
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-cozmo
arm64: dts: mt8183: Add kakadu sku22
arm64: dts: mt8183: Add more fennel SKUs
arm64: dts: mt8183: Add kukui-jacuzzi-cozmo board
arm64: dts: mt8183: jacuzzi: remove unused ddc-i2c-bus
arm64: dts: mediatek: mt8183-evb: Add node for thermistor
arm64: dts: mediatek: mt8516: remove 2 invalid i2c clocks
arm64: dts: mediatek: mt8192: fix i2c node names
...
Link: https://lore.kernel.org/r/0d05e8b6-c56f-bad7-00c1-44682cedb38f@suse.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.
* tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
arm64: dts: imx8mp-evk: configure multiple queues on eqos
arm64: dts: ls1028a-qds: add overlays for various serdes protocols
arm64: dts: ls1028a-qds: enable lpuart1
arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus
arm64: dts: ls1028a-rdb: enable pwm0
arm64: dts: ls1028a: add flextimer based pwm nodes
arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source
arm64: dts: ls1028a: Add PCIe EP nodes
arm64: dts: lx2162a-qds: add interrupt line for RTC node
arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes
arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes
arm64: dts: lx2160a-qds: Add mdio mux nodes
arm64: dts: lx2160a: add optee-tz node
arm64: dts: lx2160a-rdb: Add Inphi PHY node
arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl
arm64: dts: nitrogen8-som: correct network PHY reset
arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property
arm64: dts: imx8ulp: add power domain entry for usdhc
...
Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.17:
- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board,
JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ
SystemMaster.
- Update SPBA bus node name to match binding schema.
- A series from Christoph Niedermaier to update imx6qdl-dhcom board
around Ethernet and USB support.
- A series from Giulio Benetti to clean up undocumented/unused fixed
clock compatibles.
- A series from Laurent Pinchart to update i.MX7 MIPI_CSI support.
- A couple of changes from Russell to update phy-mode for
vf610-zii-dev-rev-b board.
- Add Wacom digitizer support for imx7d-remarkable2 device.
* tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits)
ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
ARM: dts: imx6qdl: phytec: Add support for optional PEB-AV-02 LCD adapter
ARM: dts: imx6qdl: phytec: Add support for optional PEB-EVAL-01 board
ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer
ARM: dts: imx7d-remarkable2: add wacom digitizer device
ARM: dts: imx6ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster
ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0
ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
ARM: dts: imx6qdl: drop "fsl,imx-ckih1"
ARM: dts: imx6qdl: drop "fsl,imx-ckil"
ARM: dts: imx6qdl: drop "fsl,imx-osc"
ARM: dts: imx53: drop "fsl,imx-ckih2"
ARM: dts: imx53: drop "fsl,imx-ckih1"
ARM: dts: imx53: drop "fsl,imx-ckil"
ARM: dts: imx53: drop "fsl,imx-osc"
ARM: dts: imx51: drop "fsl,imx-ckih2"
ARM: dts: imx51: drop "fsl,imx-ckih1"
ARM: dts: imx51: drop "fsl,imx-ckil"
ARM: dts: imx51: drop "fsl,imx-osc"
ARM: dts: imx50: drop "fsl,imx-ckih2"
...
Link: https://lore.kernel.org/r/20211218071427.26745-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX dt-bindings update for 5.17:
- New bindings for i.MX SPBA bus and i.MX8MN DISP blk-ctrl.
- New vendor prefix for BSH Hausgeraete GmbH and JOZ BV.
- New compatibles for various i.MX6 and i.MX8 boards.
- Add optional 'fsl,continuous-burst-clk' property support for imx-weim
binding.
* tag 'imx-bindings-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl
dt-bindings: arm: fsl: Add BSH SMM-M2 IMX6ULZ SystemMaster board
dt-bindings: arm: fsl: Add iMX8MN BSH SMM S2 boards
dt-bindings: Add vendor prefix for BSH Hausgeraete GmbH
dt-bindings: soc: imx: Add binding doc for spba bus
dt-bindings: bus: imx-weim: add words about continuous bclk
dt-bindings: arm: fsl: add TQMa8Mx boards
dt-bindings: arm: fsl: add TQMa8MxNL boards
dt-bindings: arm: fsl: add TQMa8MxML boards
dt-bindings: arm: fsl: Add binding for imx8ulp evk
dt-bindings: arm: fsl: Add Y Soft IOTA Crux/Crux+ boards
dt-bindings: arm: fsl: add TQ-Systems boards based on i.MX6Q/QP/DL
dt-bindings: arm: fsl: add JOZ Access Point
dt-bindings: vendor-prefixes: Add an entry for JOZ BV
Link: https://lore.kernel.org/r/20211218071427.26745-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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"spidev" is not a real device, but a Linux implementation detail. It has
never been documented either. The kernel has WARNed on the use of it for
over 6 years. Time to remove its usage from the tree.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211217221232.3664417-1-robh@kernel.org'
Reviwed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt for 5.17 (part 1)
Add generic compatible to UART nodes on Armada 38x
* tag 'mvebu-dt-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada-38x: Add generic compatible to UART nodes
Link: https://lore.kernel.org/r/875yrnm8uq.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.17 (part 1)
Enable more network hardware and gpios on CN9130-CRB
Add new clock node needed by comphy on armada-37xx
* tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
arm64: dts: marvell: cn9130: add GPIO and SPI aliases
arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node
arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree
arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
Link: https://lore.kernel.org/r/878rwjm8vj.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt
Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms:
- J721s2 SoC, SoM and Common Processor Board support
* New features:
- CAN support on AM64 EVM and SK
- TimeSync Router on AM64
* Fixes:
- Correct d-cache-sets info on J7200
- Fix L2 cache-sets value for J721e/J7200/AM64
- Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
- Disable McASP on IoT2050 board to fix dtbs_check warnings
* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
arch: arm64: ti: Add support J721S2 Common Processor Board
arm64: dts: ti: Add initial support for J721S2 System on Module
arm64: dts: ti: Add initial support for J721S2 SoC
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
dt-bindings: arm: ti: Add bindings for J721s2 SoC
arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
arm64: dts: ti: k3-am64-main: Add support for MCAN
arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
arm64: dts: ti: k3-j721e: Add support for MCAN nodes
arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
arm64: dts: ti: k3-am64-main: add timesync router node
arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
arm64: dts: ti: k3-j721e: Fix the L2 cache sets
arm64: dts: ti: k3-j7200: Fix the L2 cache sets
arm64: dts: ti: k3-am642: Fix the L2 cache sets
arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
arm64: dts: ti: k3-j721e: correct cache-sets info
Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.17-rc1
The vast majority of this contains various updates and cleanups to the
Tegra device trees that will eventually help validate all of them using
the dt-schema infrastructure.
Another notable chunk of this contains additional Tegra234 support as
well as support for the new Jetson AGX Orin Developer Kit.
* tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (47 commits)
arm64: tegra: Add host1x hotflush reset on Tegra210
arm64: tegra: Hook up MMC and BPMP to memory controller
arm64: tegra: Add memory controller on Tegra234
arm64: tegra: Add EMC general interrupt on Tegra194
arm64: tegra: Update SDMMC4 speeds for Tegra194
arm64: tegra: Add dma-coherent for Tegra194 VIC
arm64: tegra: Rename Ethernet PHY nodes
arm64: tegra: Remove unused only-1-8-v properties
arm64: tegra: Sort Tegra210 XUSB clocks correctly
arm64: tegra: Add missing TSEC properties on Tegra210
arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: smaug: Remove extra PLL power supplies for XUSB
arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: Rename GPIO hog nodes to match schema
arm64: tegra: Remove unsupported regulator properties
arm64: tegra: Rename TCU node to "serial"
arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clock
arm64: tegra: Drop unused properties for Tegra194 PCIe
arm64: tegra: Fix Tegra194 HSP compatible string
arm64: tegra: Drop unsupported nvidia,lpdr property
...
Link: https://lore.kernel.org/r/20211217162253.1801077-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra-
related DT bindings and additions for new SoC and board support.
* tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
media: dt: bindings: tegra-vde: Document OPP and power domain
media: dt: bindings: tegra-vde: Convert to schema
dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
dt-bindings: host1x: Document OPP and power domain properties
dt-bindings: clock: tegra-car: Document new clock sub-nodes
dt-bindings: ARM: tegra: Document Pegatron Chagall
dt-bindings: ARM: tegra: Document ASUS Transformers
dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
dt-bindings: serial: Document Tegra234 TCU
dt-bindings: serial: tegra-tcu: Convert to json-schema
dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
dt-bindings: firmware: tegra: Convert to json-schema
dt-bindings: tegra: pmc: Convert to json-schema
dt-bindings: serial: 8250: Document Tegra234 UART
dt-bindings: mmc: tegra: Document Tegra234 SDHCI
dt-bindings: fuse: tegra: Document Tegra234 FUSE
dt-bindings: fuse: tegra: Convert to json-schema
dt-bindings: rtc: tegra: Document Tegra234 RTC
dt-bindings: rtc: tegra: Convert to json-schema
dt-bindings: mailbox: tegra: Document Tegra234 HSP
...
Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: keep SoC driver bindings together
soc: samsung: Add USI driver
dt-bindings: soc: samsung: Add Exynos USI bindings
soc: samsung: exynos-pmu: Add Exynos850 support
dt-bindings: samsung: pmu: Document Exynos850
soc: samsung: exynos-chipid: add Exynos7885 SoC support
soc: samsung: exynos-chipid: describe which SoCs go with compatibles
Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
i.MX8MN display related domain support.
- Add optional continuous burst clock support for imx-weim bus driver.
- Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
MIX domain.
* tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
bus: imx-weim: optionally enable continuous burst clock
soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
soc: imx: gpcv2: Synchronously suspend MIX domains
Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers
AT91 SoC #1 for 5.17:
- one low priority fix about of_node_put() missing in PM code
* tag 'at91-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: pm: Add of_node_put() before goto
Link: https://lore.kernel.org/r/20211217164134.28566-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
When a trap 7 (Instruction access rights) occurs, this means the CPU
couldn't execute an instruction due to missing execute permissions on
the memory region. In this case it seems the CPU didn't even fetched
the instruction from memory and thus did not store it in the cr19 (IIR)
register before calling the trap handler. So, the trap handler will find
some random old stale value in cr19.
This patch simply overwrites the stale IIR value with a constant magic
"bad food" value (0xbaadf00d), in the hope people don't start to try to
understand the various random IIR values in trap 7 dumps.
Noticed-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.17-rc1
This set of changes contains some preparatory work that is shared by
several branches and trees to support DVFS via power domains.
There's also a bit of cleanup and improvements to reboot on chips that
use PSCI.
* tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Rename core power domain
soc/tegra: pmc: Rename 3d power domains
soc/tegra: regulators: Prepare for suspend
soc/tegra: fuse: Use resource-managed helpers
soc/tegra: fuse: Reset hardware
soc/tegra: pmc: Add reboot notifier
soc/tegra: Don't print error message when OPPs not available
Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Add a selftest to attempt to enter L2 with invalid guests state by
exiting to userspace via I/O from L2, and then using KVM_SET_SREGS to set
invalid guest state (marking TR unusable is arbitrary chosen for its
relative simplicity).
This is a regression test for a bug introduced by commit c8607e4a086f
("KVM: x86: nVMX: don't fail nested VM entry on invalid guest state if
!from_vmentry"), which incorrectly set vmx->fail=true when L2 had invalid
guest state and ultimately triggered a WARN due to nested_vmx_vmexit()
seeing vmx->fail==true while attempting to synthesize a nested VM-Exit.
The is also a functional test to verify that KVM sythesizes TRIPLE_FAULT
for L2, which is somewhat arbitrary behavior, instead of emulating L2.
KVM should never emulate L2 due to invalid guest state, as it's
architecturally impossible for L1 to run an L2 guest with invalid state
as nested VM-Enter should always fail, i.e. L1 needs to do the emulation.
Stuffing state via KVM ioctl() is a non-architctural, out-of-band case,
hence the TRIPLE_FAULT being rather arbitrary.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211207193006.120997-5-seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Update the documentation for kvm-intel's emulate_invalid_guest_state to
rectify the description of KVM's default behavior, and to document that
the behavior and thus parameter only applies to L1.
Fixes: a27685c33acc ("KVM: VMX: Emulate invalid guest state by default")
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211207193006.120997-4-seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Synthesize a triple fault if L2 guest state is invalid at the time of
VM-Enter, which can happen if L1 modifies SMRAM or if userspace stuffs
guest state via ioctls(), e.g. KVM_SET_SREGS. KVM should never emulate
invalid guest state, since from L1's perspective, it's architecturally
impossible for L2 to have invalid state while L2 is running in hardware.
E.g. attempts to set CR0 or CR4 to unsupported values will either VM-Exit
or #GP.
Modifying vCPU state via RSM+SMRAM and ioctl() are the only paths that
can trigger this scenario, as nested VM-Enter correctly rejects any
attempt to enter L2 with invalid state.
RSM is a straightforward case as (a) KVM follows AMD's SMRAM layout and
behavior, and (b) Intel's SDM states that loading reserved CR0/CR4 bits
via RSM results in shutdown, i.e. there is precedent for KVM's behavior.
Following AMD's SMRAM layout is important as AMD's layout saves/restores
the descriptor cache information, including CS.RPL and SS.RPL, and also
defines all the fields relevant to invalid guest state as read-only, i.e.
so long as the vCPU had valid state before the SMI, which is guaranteed
for L2, RSM will generate valid state unless SMRAM was modified. Intel's
layout saves/restores only the selector, which means that scenarios where
the selector and cached RPL don't match, e.g. conforming code segments,
would yield invalid guest state. Intel CPUs fudge around this issued by
stuffing SS.RPL and CS.RPL on RSM. Per Intel's SDM on the "Default
Treatment of RSM", paraphrasing for brevity:
IF internal storage indicates that the [CPU was post-VMXON]
THEN
enter VMX operation (root or non-root);
restore VMX-critical state as defined in Section 34.14.1;
set to their fixed values any bits in CR0 and CR4 whose values must
be fixed in VMX operation [unless coming from an unrestricted guest];
IF RFLAGS.VM = 0 AND (in VMX root operation OR the
“unrestricted guest” VM-execution control is 0)
THEN
CS.RPL := SS.DPL;
SS.RPL := SS.DPL;
FI;
restore current VMCS pointer;
FI;
Note that Intel CPUs also overwrite the fixed CR0/CR4 bits, whereas KVM
will sythesize TRIPLE_FAULT in this scenario. KVM's behavior is allowed
as both Intel and AMD define CR0/CR4 SMRAM fields as read-only, i.e. the
only way for CR0 and/or CR4 to have illegal values is if they were
modified by the L1 SMM handler, and Intel's SDM "SMRAM State Save Map"
section states "modifying these registers will result in unpredictable
behavior".
KVM's ioctl() behavior is less straightforward. Because KVM allows
ioctls() to be executed in any order, rejecting an ioctl() if it would
result in invalid L2 guest state is not an option as KVM cannot know if
a future ioctl() would resolve the invalid state, e.g. KVM_SET_SREGS, or
drop the vCPU out of L2, e.g. KVM_SET_NESTED_STATE. Ideally, KVM would
reject KVM_RUN if L2 contained invalid guest state, but that carries the
risk of a false positive, e.g. if RSM loaded invalid guest state and KVM
exited to userspace. Setting a flag/request to detect such a scenario is
undesirable because (a) it's extremely unlikely to add value to KVM as a
whole, and (b) KVM would need to consider ioctl() interactions with such
a flag, e.g. if userspace migrated the vCPU while the flag were set.
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211207193006.120997-3-seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Revert a relatively recent change that set vmx->fail if the vCPU is in L2
and emulation_required is true, as that behavior is completely bogus.
Setting vmx->fail and synthesizing a VM-Exit is contradictory and wrong:
(a) it's impossible to have both a VM-Fail and VM-Exit
(b) vmcs.EXIT_REASON is not modified on VM-Fail
(c) emulation_required refers to guest state and guest state checks are
always VM-Exits, not VM-Fails.
For KVM specifically, emulation_required is handled before nested exits
in __vmx_handle_exit(), thus setting vmx->fail has no immediate effect,
i.e. KVM calls into handle_invalid_guest_state() and vmx->fail is ignored.
Setting vmx->fail can ultimately result in a WARN in nested_vmx_vmexit()
firing when tearing down the VM as KVM never expects vmx->fail to be set
when L2 is active, KVM always reflects those errors into L1.
------------[ cut here ]------------
WARNING: CPU: 0 PID: 21158 at arch/x86/kvm/vmx/nested.c:4548
nested_vmx_vmexit+0x16bd/0x17e0
arch/x86/kvm/vmx/nested.c:4547
Modules linked in:
CPU: 0 PID: 21158 Comm: syz-executor.1 Not tainted 5.16.0-rc3-syzkaller #0
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:nested_vmx_vmexit+0x16bd/0x17e0 arch/x86/kvm/vmx/nested.c:4547
Code: <0f> 0b e9 2e f8 ff ff e8 57 b3 5d 00 0f 0b e9 00 f1 ff ff 89 e9 80
Call Trace:
vmx_leave_nested arch/x86/kvm/vmx/nested.c:6220 [inline]
nested_vmx_free_vcpu+0x83/0xc0 arch/x86/kvm/vmx/nested.c:330
vmx_free_vcpu+0x11f/0x2a0 arch/x86/kvm/vmx/vmx.c:6799
kvm_arch_vcpu_destroy+0x6b/0x240 arch/x86/kvm/x86.c:10989
kvm_vcpu_destroy+0x29/0x90 arch/x86/kvm/../../../virt/kvm/kvm_main.c:441
kvm_free_vcpus arch/x86/kvm/x86.c:11426 [inline]
kvm_arch_destroy_vm+0x3ef/0x6b0 arch/x86/kvm/x86.c:11545
kvm_destroy_vm arch/x86/kvm/../../../virt/kvm/kvm_main.c:1189 [inline]
kvm_put_kvm+0x751/0xe40 arch/x86/kvm/../../../virt/kvm/kvm_main.c:1220
kvm_vcpu_release+0x53/0x60 arch/x86/kvm/../../../virt/kvm/kvm_main.c:3489
__fput+0x3fc/0x870 fs/file_table.c:280
task_work_run+0x146/0x1c0 kernel/task_work.c:164
exit_task_work include/linux/task_work.h:32 [inline]
do_exit+0x705/0x24f0 kernel/exit.c:832
do_group_exit+0x168/0x2d0 kernel/exit.c:929
get_signal+0x1740/0x2120 kernel/signal.c:2852
arch_do_signal_or_restart+0x9c/0x730 arch/x86/kernel/signal.c:868
handle_signal_work kernel/entry/common.c:148 [inline]
exit_to_user_mode_loop kernel/entry/common.c:172 [inline]
exit_to_user_mode_prepare+0x191/0x220 kernel/entry/common.c:207
__syscall_exit_to_user_mode_work kernel/entry/common.c:289 [inline]
syscall_exit_to_user_mode+0x2e/0x70 kernel/entry/common.c:300
do_syscall_64+0x53/0xd0 arch/x86/entry/common.c:86
entry_SYSCALL_64_after_hwframe+0x44/0xae
Fixes: c8607e4a086f ("KVM: x86: nVMX: don't fail nested VM entry on invalid guest state if !from_vmentry")
Reported-by: syzbot+f1d2136db9c80d4733e8@syzkaller.appspotmail.com
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211207193006.120997-2-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Attempting to compile on a non-x86 architecture fails with
include/kvm_util.h: In function ‘vm_compute_max_gfn’:
include/kvm_util.h:79:21: error: dereferencing pointer to incomplete type ‘struct kvm_vm’
return ((1ULL << vm->pa_bits) >> vm->page_shift) - 1;
^~
This is because the declaration of struct kvm_vm is in
lib/kvm_util_internal.h as an effort to make it private to
the test lib code. We can still provide arch specific functions,
though, by making the generic function symbols weak. Do that to
fix the compile error.
Fixes: c8cc43c1eae2 ("selftests: KVM: avoid failures due to reserved HyperTransport region")
Cc: stable@vger.kernel.org
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-Id: <20211214151842.848314-1-drjones@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
The kvm_run struct's if_flag is a part of the userspace/kernel API. The
SEV-ES patches failed to set this flag because it's no longer needed by
QEMU (according to the comment in the source code). However, other
hypervisors may make use of this flag. Therefore, set the flag for
guests with encrypted registers (i.e., with guest_state_protected set).
Fixes: f1c6366e3043 ("KVM: SVM: Add required changes to support intercepts under SEV-ES")
Signed-off-by: Marc Orr <marcorr@google.com>
Message-Id: <20211209155257.128747-1-marcorr@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
|
|
After dropping mmu_lock in the TDP MMU, restart the iterator during
tdp_iter_next() and do not advance the iterator. Advancing the iterator
results in skipping the top-level SPTE and all its children, which is
fatal if any of the skipped SPTEs were not visited before yielding.
When zapping all SPTEs, i.e. when min_level == root_level, restarting the
iter and then invoking tdp_iter_next() is always fatal if the current gfn
has as a valid SPTE, as advancing the iterator results in try_step_side()
skipping the current gfn, which wasn't visited before yielding.
Sprinkle WARNs on iter->yielded being true in various helpers that are
often used in conjunction with yielding, and tag the helper with
__must_check to reduce the probabily of improper usage.
Failing to zap a top-level SPTE manifests in one of two ways. If a valid
SPTE is skipped by both kvm_tdp_mmu_zap_all() and kvm_tdp_mmu_put_root(),
the shadow page will be leaked and KVM will WARN accordingly.
WARNING: CPU: 1 PID: 3509 at arch/x86/kvm/mmu/tdp_mmu.c:46 [kvm]
RIP: 0010:kvm_mmu_uninit_tdp_mmu+0x3e/0x50 [kvm]
Call Trace:
<TASK>
kvm_arch_destroy_vm+0x130/0x1b0 [kvm]
kvm_destroy_vm+0x162/0x2a0 [kvm]
kvm_vcpu_release+0x34/0x60 [kvm]
__fput+0x82/0x240
task_work_run+0x5c/0x90
do_exit+0x364/0xa10
? futex_unqueue+0x38/0x60
do_group_exit+0x33/0xa0
get_signal+0x155/0x850
arch_do_signal_or_restart+0xed/0x750
exit_to_user_mode_prepare+0xc5/0x120
syscall_exit_to_user_mode+0x1d/0x40
do_syscall_64+0x48/0xc0
entry_SYSCALL_64_after_hwframe+0x44/0xae
If kvm_tdp_mmu_zap_all() skips a gfn/SPTE but that SPTE is then zapped by
kvm_tdp_mmu_put_root(), KVM triggers a use-after-free in the form of
marking a struct page as dirty/accessed after it has been put back on the
free list. This directly triggers a WARN due to encountering a page with
page_count() == 0, but it can also lead to data corruption and additional
errors in the kernel.
WARNING: CPU: 7 PID: 1995658 at arch/x86/kvm/../../../virt/kvm/kvm_main.c:171
RIP: 0010:kvm_is_zone_device_pfn.part.0+0x9e/0xd0 [kvm]
Call Trace:
<TASK>
kvm_set_pfn_dirty+0x120/0x1d0 [kvm]
__handle_changed_spte+0x92e/0xca0 [kvm]
__handle_changed_spte+0x63c/0xca0 [kvm]
__handle_changed_spte+0x63c/0xca0 [kvm]
__handle_changed_spte+0x63c/0xca0 [kvm]
zap_gfn_range+0x549/0x620 [kvm]
kvm_tdp_mmu_put_root+0x1b6/0x270 [kvm]
mmu_free_root_page+0x219/0x2c0 [kvm]
kvm_mmu_free_roots+0x1b4/0x4e0 [kvm]
kvm_mmu_unload+0x1c/0xa0 [kvm]
kvm_arch_destroy_vm+0x1f2/0x5c0 [kvm]
kvm_put_kvm+0x3b1/0x8b0 [kvm]
kvm_vcpu_release+0x4e/0x70 [kvm]
__fput+0x1f7/0x8c0
task_work_run+0xf8/0x1a0
do_exit+0x97b/0x2230
do_group_exit+0xda/0x2a0
get_signal+0x3be/0x1e50
arch_do_signal_or_restart+0x244/0x17f0
exit_to_user_mode_prepare+0xcb/0x120
syscall_exit_to_user_mode+0x1d/0x40
do_syscall_64+0x4d/0x90
entry_SYSCALL_64_after_hwframe+0x44/0xae
Note, the underlying bug existed even before commit 1af4a96025b3 ("KVM:
x86/mmu: Yield in TDU MMU iter even if no SPTES changed") moved calls to
tdp_mmu_iter_cond_resched() to the beginning of loops, as KVM could still
incorrectly advance past a top-level entry when yielding on a lower-level
entry. But with respect to leaking shadow pages, the bug was introduced
by yielding before processing the current gfn.
Alternatively, tdp_mmu_iter_cond_resched() could simply fall through, or
callers could jump to their "retry" label. The downside of that approach
is that tdp_mmu_iter_cond_resched() _must_ be called before anything else
in the loop, and there's no easy way to enfornce that requirement.
Ideally, KVM would handling the cond_resched() fully within the iterator
macro (the code is actually quite clean) and avoid this entire class of
bugs, but that is extremely difficult do while also supporting yielding
after tdp_mmu_set_spte_atomic() fails. Yielding after failing to set a
SPTE is very desirable as the "owner" of the REMOVED_SPTE isn't strictly
bounded, e.g. if it's zapping a high-level shadow page, the REMOVED_SPTE
may block operations on the SPTE for a significant amount of time.
Fixes: faaf05b00aec ("kvm: x86/mmu: Support zapping SPTEs in the TDP MMU")
Fixes: 1af4a96025b3 ("KVM: x86/mmu: Yield in TDU MMU iter even if no SPTES changed")
Reported-by: Ignat Korchagin <ignat@cloudflare.com>
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211214033528.123268-1-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
We need to include linux/io-64-nonatomic-lo-hi.h or readq/writeq won't
be defined when compiling on 32bit architectures:
On i386:
../drivers/reset/reset-starfive-jh7100.c: In function ‘jh7100_reset_update’:
../drivers/reset/reset-starfive-jh7100.c:81:10: error: implicit declaration of function ‘readq’; did you mean ‘readl’? [-Werror=implicit-function-declaration]
value = readq(reg_assert);
^~~~~
../drivers/reset/reset-starfive-jh7100.c:86:2: error: implicit declaration of function ‘writeq’; did you mean ‘writel’? [-Werror=implicit-function-declaration]
writeq(value, reg_assert);
^~~~~~
On m68k:
drivers/reset/reset-starfive-jh7100.c:81:17: error: implicit declaration of function 'readq'; did you mean 'readb'? [-Werror=implicit-function-declaration]
drivers/reset/reset-starfive-jh7100.c:86:9: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[3]: *** [scripts/Makefile.build:289: drivers/reset/reset-starfive-jh7100.o] Error 1
make[2]: *** [scripts/Makefile.build:572: drivers/reset] Error 2
make[1]: *** [Makefile:1969: drivers] Error 2
make: *** [Makefile:226: __sub-make] Error 2
Fixes: 0be3a1595bf8 ("reset: starfive-jh7100: Add StarFive JH7100 reset driver")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20211220121800.760846-1-kernel@esmil.dk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Previously assigned whole guc_id structure (list, spin lock) which is
incorrect, only assign the guc_id.id.
Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211214170500.28569-3-matthew.brost@intel.com
(cherry picked from commit 939d8e9c87e704fd5437e2c8b80929591fe540eb)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
|
|
s/ce/cn/ when grabbing guc_state.lock before calling
clr_context_registered.
Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211214170500.28569-2-matthew.brost@intel.com
(cherry picked from commit b25db8c782ad7ae80d4cea2a09c222f4f8980bb9)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
drivers: Changes for v5.17-rc1
This is an assortment of driver patches that rely on some of the changes
in the for-5.17/soc branch. These have all been acked by the respective
maintainers and go through the Tegra tree to more easily handle the
build dependency.
* tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
media: staging: tegra-vde: Support generic power domain
spi: tegra20-slink: Add OPP support
mtd: rawnand: tegra: Add runtime PM and OPP support
mmc: sdhci-tegra: Add runtime PM and OPP support
pwm: tegra: Add runtime PM and OPP support
bus: tegra-gmi: Add runtime PM and OPP support
usb: chipidea: tegra: Add runtime PM and OPP support
soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()
soc/tegra: Enable runtime PM during OPP state-syncing
Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers
SoC: Keystone driver update for v5.17
* k3-socinfo: Add entry for J721S2 SoC family
* Misc fixups for tisci, pruss, knav_dma
* tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
soc: ti: k3-socinfo: Add entry for J721S2 SoC family
firmware: ti_sci: rm: remove unneeded semicolon
soc: ti: pruss: fix referenced node in error message
Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This ioctl() implicitly assumed that the socket was already bound to
a valid local socket name, i.e. Phonet object. If the socket was not
bound, two separate problems would occur:
1) We'd send an pipe enablement request with an invalid source object.
2) Later socket calls could BUG on the socket unexpectedly being
connected yet not bound to a valid object.
Reported-by: syzbot+2dc91e7fc3dea88b1e8a@syzkaller.appspotmail.com
Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The DPNI object should get its own header, like the rest of the objects.
Fixes: 60b91319a349 ("staging: fsl-mc: Convert documentation to rst format")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Horatiu Vultur says:
====================
net: lan966x: Add switchdev and vlan support
This patch series extends lan966x with switchdev and vlan support.
The first patches just adds new registers and extend the MAC table to
handle the interrupts when a new address is learn/forget.
v7->v8:
- remove extra mac learn when the port leaves the bridge
- replace memcpy with ether_addr_copy
- change the order of operations in lan966x_switch_driver_init/exit
- refactor lan966x_port_bridge_flags
v6->v7:
- fix build issues when compiling as a module
v5->v6:
- fix issues with the singletones, they were not really singletons
- simplify the case where lan966x ports are added to bridges with foreign
ports
- drop the cases NETDEV_PRE_UP and NETDEV_DOWN
- fix the change of MAC address
- drop the callbacks .ndo_set_features, .ndo_vlan_rx_add_vid,
.ndo_vlan_rx_kill_vid
- remove duplicate code when port was added in a vlan, the MAC entries
will be added by the fdb
v4->v5:
- make the notifier_block from lan966x to be singletones
- use switchdev_handle_port_obj_add and switchdev_handle_fdb_event_to_device
when getting callbacks in the lan966x
- merge the two vlan patches in a single one
v3->v4:
- split the last patch in multiple patches
- replace spin_lock_irqsave/restore with spin_lock/spin_unlock
- remove lan966x_port_change_rx_flags because it was copying all the frames to
the CPU instead of removing all RX filters.
- implement SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS
- remove calls to __dev_mc_unsync/sync as they are not needed
- replace 0/1 with false/true
- make sure that the lan966x ports are not added to bridges that have other
interfaces except lan966x
- and allow the lan966x ports to be part of only the same bridge.
v2->v3:
- separate the PVID used when the port is in host mode or vlan unaware
- fix issue when the port was leaving the bridge
v1->v2:
- when allocating entries for the mac table use kzalloc instead of
devm_kzalloc
- also use GFP_KERNEL instead of GFP_ATOMIC, because is never called
in atomic context
- when deleting an mac table entry, the order of operations was wrong
- if ana irq is enabled make sure it gets disabled when the driver is
removed
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
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Extend lan966x driver with fdb support by implementing the switchdev
calls SWITCHDEV_FDB_ADD_TO_DEVICE and SWITCHDEV_FDB_DEL_TO_DEVICE.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Currently allow a port to be part or not of the multicast flooding mask.
By implementing the switchdev calls SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS
and SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Extend the driver to support vlan filtering by implementing the
switchdev calls SWITCHDEV_OBJ_ID_PORT_VLAN,
SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds basic support to offload in the HW the forwarding of the
frames. The driver registers to the switchdev callbacks and implements
the callbacks for attributes SWITCHDEV_ATTR_ID_PORT_STP_STATE and
SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME.
It is not allowed to add a lan966x port to a bridge that contains a
different interface than lan966x.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The function lan966x_port_change_rx_flags() was used only when
IFF_PROMISC flag was set. In that case it was setting to copy all the
frames to the CPU instead of removing any RX filters. Therefore remove
it.
Fixes: d28d6d2e37d10d ("net: lan966x: add port module support")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for adding/removing mac entries in the SW list
of entries and in the HW table. This is used by the bridge
functionality.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for handling the interrupts generated by the
analyzer. Currently, only the MAC table generates these interrupts.
The MAC table will generate an interrupt whenever it learns or forgets
an entry in the table. It is the SW responsibility figure out which
entries were added/removed.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Extend dt-bindings for lan966x with analyzer interrupt.
This interrupt can be generated for example when the HW learn/forgets
an entry in the MAC table.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds the registers that will be used to enable switchdev and
vlan functionality in the HW.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.16, round 3:
- Fix imx6qdl-wandboard Ethernet support by adding 'qca,clk-out-frequency'
property.
- Fix scl-gpios property typo in LX2160A device tree.
* tag 'imx-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: lx2160a: fix scl-gpios property name
ARM: dts: imx6qdl-wandboard: Fix Ethernet support
soc: imx: Register SoC device only on i.MX boards
soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset
ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name
arm64: dts: imx8mq: remove interconnect property from lcdif
arm64: dts: ten64: remove redundant interrupt declaration for gpio-keys
arm64: dts: lx2160abluebox3: update RGMII delays for sja1105 switch
ARM: dts: ls1021a-tsn: update RGMII delays for sja1105 switch
ARM: dts: imx6qp-prtwd3: update RGMII delays for sja1105 switch
Link: https://lore.kernel.org/r/20211218052003.GA25102@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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We need to hold the local->mtx to release the channel context,
as even encoded by the lockdep_assert_held() there. Fix it.
Cc: stable@vger.kernel.org
Fixes: 295b02c4be74 ("mac80211: Add FILS discovery support")
Reported-and-tested-by: syzbot+11c342e5e30e9539cabd@syzkaller.appspotmail.com
Link: https://lore.kernel.org/r/20211220090836.cee3d59a1915.I36bba9b79dc2ff4d57c3c7aa30dff9a003fe8c5c@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel says:
====================
mlxsw: devlink health reporter extensions
This patchset extends the devlink health reporter registered by mlxsw to
report new health events and their related parameters. These are meant
to aid in debugging hardware and firmware issues.
Patches #1-#2 are preparations.
Patch #3 adds the definitions of the new events and parameters.
Patch #4 extends the health reporter to report the new events and
parameters.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
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