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2021-08-06ARM: dts: am335x-phycore: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR, PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-pepper: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Gumstix Pepper to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-pdu001: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-myirtech: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch MYIR MYC-AM335X/MYD-AM335X to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-moxa-uc: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Moxa am335x-moxa-uc-210x/8100 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Johnson Chen <johnsonch.chen@moxa.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-lxm: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch NovaTech OrionLXm to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-igep0033: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch am335x-igep0033 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-cm-t335: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch CompuLab CM-T335 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-chiliboard: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch AM335x Chiliboard to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-nano: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Newflow AM335x NanoBone to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-baltos: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch OnRISC Baltos and NetCom/Cam boards to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Yegor Yefremov <yegorslists@googlemail.com> Cc: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-05dt-bindings: mediatek: Add optional mediatek,gce-events propertyHsin-Yi Wang
This property is used by gce clients. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210622030741.2120393-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mt8183: add mediatek,gce-events in mutexHsin-Yi Wang
mediatek,gce-events is read by mutex node. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210622030741.2120393-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mediatek: mt8173: Add domain supply for mfg_asyncBilal Wasim
da9211 regulator needs to be enabled before enabling the mfg_async power domain. Otherwise the subdomain is not enabled and causes failure in imgtec gpu driver boot. Add the "domain-supply" property to the "mfg_async" node in DT. Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210701114012.RESEND.3.I9e27871bb700c807a564957302b292e9935dae0b@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mt8173: elm: Use aliases to mmc nodesHsin-Yi Wang
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"), a way to specify fixed index numbers was provided. This patch use aliases to mmc nodes so the partition name for eMMC and SD card will be consistent across boots. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210728040710.2891955-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mt8183: kukui: Use aliases to mmc nodesHsin-Yi Wang
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"), a way to specify fixed index numbers was provided. This patch use aliases to mmc nodes so the partition name for eMMC and SD card will be consistent across boots. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210728040710.2891955-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: qcom: sm8250: assign DSI clock source parentsDmitry Baryshkov
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-6-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-mtp: assign DSI clock source parentsDmitry Baryshkov
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845: assign DSI clock source parentsDmitry Baryshkov
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: assign DSI clock source parentsDmitry Baryshkov
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280-idp: Add device tree files for IDP2Rajendra Nayak
Move all the common device tree bits for both sc7280 IDPs into a sc7280-idp.dtsi and create 2 different dts files (sc7280-idp.dts and sc7280-idp2.dts) in order to manage differences across the IDP SKU1 and SKU2 Boards. PMR735A is present on IDP board only and is not present on IDP2. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/1628082199-17002-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05dt-bindings: arm: qcom: Document qcom,sc7280-idp2 boardRajendra Nayak
Document the qcom,sc7280-idp2 board based off sc7280 SoC, The board is also known as piglin in the Chrome OS builds, so document the google,piglin compatible as well. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1628082199-17002-2-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: fix IPA interconnectsAlex Elder
There should only be two interconnects defined for IPA on the QUalcomm SM8350 SoC. The names should also match those specified by the IPA Device Tree binding. Fixes: f11d3e7da32e ("arm64: dts: qcom: sm8350: add IPA information") Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-5-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: define ipa_fw_mem nodeAlex Elder
Define the reserved memory space used for IPA firmware for the Qualcomm SC7180 SoC. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-4-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: enable IPA for sc7280-idpAlex Elder
Enable IPA for the SC7280 IDP, with the modem performing early initialization. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-3-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: add IPA informationAlex Elder
Add IPA-related nodes and definitions to "sc7280.dtsi", including the reserved memory area used for AP-based IPA firmware loading. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-2-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180-trogdor: Move panel under the bridge chipDouglas Anderson
Putting the panel under the bridge chip (under the aux-bus node) allows the panel driver to get access to the DP AUX bus, enabling all sorts of fabulous new features. While we're at this, get rid of a level of hierarchy for the panel node. It doesn't need "ports / port" and can just have a "port" child. For Linux, this patch has a hard requirement on the patches adding DP AUX bus support to the ti-sn65dsi86 bridge chip driver. See the patch ("drm/bridge: ti-sn65dsi86: Add support for the DP AUX bus"). Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210611101711.v10.11.Ibdb7735fb1844561b902252215a69526a14f9abd@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add PRNG nodeRobert Marko
PRNG insinde of IPQ8074 is already supported, so simply add the node for it. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-2-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add crypto nodesRobert Marko
IPQ8074 uses Qualcom QCE crypto engine v5.1 which is already supported. So simply add nodes for its DMA and QCE itself. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: add qupv3_id_1/i2c13 nodesJonathan Marek
Add the qupv3_id_1 node and the i2c13 child node used for i2c devices connected to gpio0/gpio1. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20210513181309.12491-2-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq6018: Add pcie supportSelvam Sathappan Periakaruppan
ipq6018 has 1 pcie gen3 port. This patch adds the support for the same. The GICv2m reg property value is a guess based on similar SoCs description in downstream Codeaurora kernel. It appears to work. Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> [baruch: adjust #address-cells/#size-cells; drop unsupported property; increase parf registers size] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/0f733656666fa6adaa8e196419ebcfd04677d173.1620203062.git.baruch@tkos.co.il Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: pm8150b: Add DTS node for PMIC VBUS boosterWesley Cheng
Add the required DTS node for the USB VBUS output regulator, which is available on PM8150B. This will provide the VBUS source to connected peripherals. Cc: Rob Herring <robh@kernel.org> Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20210427130712.2005456-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8150: add SPI nodesFelipe Balbi
Add missing SPI nodes for SM8150. Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210416103225.1872145-1-balbi@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8916: Enable CoreSight STM componentGeorgi Djakov
Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916, which can benefit the CoreSight development on DB410c. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20210321124212.4253-1-leo.yan@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Add qfprom nodeRajendra Nayak
Add the qfprom node and its properties for the sc7280 SoC. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1627627573-32454-5-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Fixup the cpufreq nodeSibi Sankar
Fixup the register regions used by the cpufreq node on SC7280 SoC to support per core L3 DCVS. Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq6018: correct TCSR block areaBaruch Siach
According to Bjorn Andersson[1], &tcsr_q6 base is 0x01937000 with size 0x21000. Adjust qcom,halt-regs offsets (add 0xe000) to match the new syscon base. Also, rename to just &tcsr as Kathiravan T suggested. [1] https://lore.kernel.org/r/YLgO0Aj1d4w9EcPv@yoga Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/889aae1b88f120cb6281919d27164a959fbe69d0.1626948070.git.baruch@tkos.co.il Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180-trogdor: Add lpass dai link for HDMIV Sujith Kumar Reddy
Add dai link in sc7180-trogdor.dtsi for supporting audio over DP Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210721080549.28822-3-srivasam@qti.qualcomm.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: Update lpass cpu node for audio over dpV Sujith Kumar Reddy
Updaate lpass dts node with HDMI reg, interrupt and iommu for supporting audio over dp. Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210721080549.28822-2-srivasam@qti.qualcomm.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-oneplus: add ipa firmware namesCaleb Connolly
Add the correct patch to the ipa firmware now that custom paths are supported. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Link: https://lore.kernel.org/r/20210720153125.43389-6-caleb@connolly.tech Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-oneplus-common: enable debug UARTCaleb Connolly
A labelled diagram showing the location of the Rx and Tx testpoints for the OnePlus 6 is available on the postmarketOS wiki: https://wiki.postmarketos.org/wiki/Serial_debugging:Cable_schematics The device uses 1.8v UART at a baud rate of 115200, bootloader output is also available here. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Link: https://lore.kernel.org/r/20210720153125.43389-3-caleb@connolly.tech Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: Rename GENI serial engine DT nodeRobert Foss
In order to conform with downstream and upstream for previous generations of this hardware, rename dt-node 'qupv3_id_1' to 'qupv3_id_0'. Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://lore.kernel.org/r/20210803125756.93824-1-robert.foss@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Remove pm8350 and pmr735b for sc7280-idpsatya priya
Remove pm8350 and pmr735b die temp nodes as these pmics are not present on this board. Correct the tabbing for pmk8350_vadc node. Fixes: fbd5a1d22607 ("arm64: dts: qcom: sc7280: Add ADC channel nodes for PMIC temperatures to sc7280-idp") Signed-off-by: satya priya <skakit@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627995852-24505-1-git-send-email-skakit@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Add interconnect properties for USBSandeep Maheswaram
Add interconnect properties in USB DT nodes for sc7280. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627880576-22391-1-git-send-email-sanm@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 targetDmitry Baryshkov
Remove the bus clock from the mdss device node, in order to facilitate bus band width scaling on sm8250 target. The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, and since mdp device node already has the bus clock, remove the clock from the mdss device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210803101657.1072358-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845: move bus clock to mdp node for sdm845 targetDmitry Baryshkov
Move the bus clock to mdp device node,in order to facilitate bus band width scaling on sdm845 target. The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, move the clock node to mdp device from where the votes are requested. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210803101657.1072358-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: Add wakeup-parent to tlmmBjorn Andersson
Now that TLMM has the wakeup table, specify the Power Domain Controller to be the wakeup-parent of TLMM. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312034218.3324410-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180:: modified qfprom CORR size as per RAW sizeRavi Kumar Bokka
modified QFPROM controller CORRECTED region size as per RAW region size Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1613582792-5225-1-git-send-email-rbokka@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8250: Fix epss_l3 unit addressGeorgi Djakov
The unit address of the epss_l3 node is incorrect and does not match the address of its "reg" property. Let's fix it. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20210211193637.9737-1-georgi.djakov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-29 00:17:36 +0000