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2015-10-27of/fdt: fix error checking for earlycon addressMasahiro Yamada
fdt_translate_address() returns OF_BAD_ADDR on error. It is defined as a u64 value, so the variable "addr" should be defined as u64 as well. Fixes: fb11ffe74c79 ("of/fdt: add FDT serial scanning for earlycon") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Rob Herring <robh@kernel.org>
2015-10-27perf tools: Search for more options when passing args to -hArnaldo Carvalho de Melo
Recently 'perf <tool> -h' was made aware of arguments and would show just the help for the arguments specified, but that required a strict form, i.e.: $ perf -h --tui worked, but: $ perf -h tui didn't. Make it support both cases and also look at the option help when neither matches, so that he following examples works: $ perf report -h interface Usage: perf report [<options>] --gtk Use the GTK2 interface --stdio Use the stdio interface --tui Use the TUI interface $ perf report -h stack Usage: perf report [<options>] -g, --call-graph <print_type,threshold[,print_limit],order, sort_key[,branch]> Display call graph (stack chain/backtrace): print_type: call graph printing style (graph|flat|fractal|none) threshold: minimum call graph inclusion threshold (<percent>) print_limit: maximum number of call graph entry (<number>) order: call graph order (caller|callee) sort_key: call graph sort key (function|address) branch: include last branch info to call graph (branch) Default: graph,0.5,caller,function --max-stack <n> Set the maximum stack depth when parsing the callchain, anything beyond the specified depth will be ignored. Default: 127 $ Suggested-by: Ingo Molnar <mingo@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: Brendan Gregg <brendan.d.gregg@gmail.com> Cc: Chandler Carruth <chandlerc@gmail.com> Cc: David Ahern <dsahern@gmail.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@google.com> Cc: Wang Nan <wangnan0@huawei.com> Link: http://lkml.kernel.org/n/tip-xzqvamzqv3cv0p6w3inhols3@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-10-27clk: qcom: msm8960: Fix dsi1/2 halt bitsStephen Boyd
The halt bits for these clocks seem wrong. I get the following warning while booting on an msm8960-cdp: WARNING: CPU: 0 PID: 1 at drivers/clk/qcom/clk-branch.c:97 clk_branch_toggle+0xd0/0x138() dsi1_clk status stuck at 'on' Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.3.0-rc3-00113-g5532cfb567fe #110 Hardware name: Qualcomm (Flattened Device Tree) [<c0216984>] (unwind_backtrace) from [<c02138f8>] (show_stack+0x10/0x14) [<c02138f8>] (show_stack) from [<c04a525c>] (dump_stack+0x70/0xbc) [<c04a525c>] (dump_stack) from [<c0223c70>] (warn_slowpath_common+0x78/0xb4) [<c0223c70>] (warn_slowpath_common) from [<c0223d40>] (warn_slowpath_fmt+0x30/0x40) [<c0223d40>] (warn_slowpath_fmt) from [<c05fc2dc>] (clk_branch_toggle+0xd0/0x138) [<c05fc2dc>] (clk_branch_toggle) from [<c05f3f3c>] (clk_disable_unused_subtree+0x98/0x1b0) [<c05f3f3c>] (clk_disable_unused_subtree) from [<c05f3ec4>] (clk_disable_unused_subtree+0x20/0x1b0) [<c05f3ec4>] (clk_disable_unused_subtree) from [<c05f5474>] (clk_disable_unused+0x58/0xd8) [<c05f5474>] (clk_disable_unused) from [<c0209710>] (do_one_initcall+0xac/0x1ec) [<c0209710>] (do_one_initcall) from [<c0991db4>] (kernel_init_freeable+0x11c/0x1e8) [<c0991db4>] (kernel_init_freeable) from [<c0727ae0>] (kernel_init+0x8/0xec) [<c0727ae0>] (kernel_init) from [<c0210238>] (ret_from_fork+0x14/0x3c) Fix the status bits and the errors go away. Fixes: 5532cfb567fe ("clk: qcom: mmcc-8960: Add DSI related clocks") Acked-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-27perf stat: Cache aggregated map entries in extra cpumapJiri Olsa
Currently any time we need to access socket or core id for given cpu, we access the sysfs topology file. Adding a cpus_aggr_map cpu_map to cache those entries. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Kan Liang <kan.liang@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1445784728-21732-3-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-10-27perf cpu_map: Add cpu_map__empty_new functionJiri Olsa
Adding cpu_map__empty_new interface to create empty cpumap with given size. The cpumap entries are initialized with -1. It'll be used for caching cpu_map in following patches. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Kan Liang <kan.liang@intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1445784728-21732-2-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-10-27perf evsel: Move id_offset out of struct perf_evsel union memberJiri Olsa
Because the 'perf stat record' patches will use the id_offset member together with the priv pointer. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Kan Liang <kan.liang@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1445784728-21732-29-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-10-27Merge tag 'efi-next' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi into core/efi Pull EFI fix from Matt Fleming: - Fix a kernel panic by not passing EFI virtual mapping addresses to __pa() in the x86 pageattr code. Since these virtual addreses are not part of the direct mapping or kernel text mapping, passing them to __pa() will trigger a BUG_ON() when CONFIG_DEBUG_VIRTUAL is enabled. (Sai Praneeth Prakhya) Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-10-27pinctrl: at91: add missing of_node_putJulia Lawall
for_each_child_of_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: tegra-xusb: Correct lane mux optionsJon Hunter
The description of the XUSB_PADCTL_USB3_PAD_MUX_0 register in the Tegra124 documentation implies that all functions (pcie, usb3 and sata) can be muxed onto to all lanes (pcie lanes 0-4 and sata lane 0). However, it has been confirmed that this is not the case and the mux'ing options much more limited. Unfortunately, the public documentation has not been updated to reflect this and so detail the actual mux'ing options here by function: Function: Lanes: pcie1 x2: pcie3, pcie4 pcie1 x4: pcie1, pcie2, pcie3, pcie4 pcie2 x1 (option1): pcie0 pcie2 x1 (option2): pcie2 usb3 port 0: pcie0 usb3 port 1 (option 1): pcie1 usb3 port 1 (option 2): sata0 sata: sata0 Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27gpio: zynq: Document interrupt-controller DT bindingSoren Brinkmann
HW and driver support the GPIO as interrupt-controller. Document that in the DT binding. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27mailbox: Off by one in mbox_test_message_read()Dan Carpenter
We need to leave space for the NUL char. Fixes: 8ea4484d0c2b ('mailbox: Add generic mechanism for testing Mailbox Controllers') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
2015-10-27gpio: xilinx: Drop architecture dependenciesSoren Brinkmann
The driver does not have any real architecture dependencies. To avoid listing each architecture that might use this driver on some FPGA-enabled platform, drop these dependencies. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27ALSA: hda - Disable 64bit address for Creative HDA controllersTakashi Iwai
We've had many reports that some Creative sound cards with CA0132 don't work well. Some reported that it starts working after reloading the module, while some reported it starts working when a 32bit kernel is used. All these facts seem implying that the chip fails to communicate when the buffer is located in 64bit address. This patch addresses these issues by just adding AZX_DCAPS_NO_64BIT flag to the corresponding PCI entries. I casually had a chance to test an SB Recon3D board, and indeed this seems helping. Although this hasn't been tested on all Creative devices, it's safer to assume that this restriction applies to the rest of them, too. So the flag is applied to all Creative entries. Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-10-27pinctrl: intel: Add Intel Broxton pin controller supportMika Westerberg
This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO controller is based on the same hardware design that is already used in Intel Sunrisepoint so we leverage the core driver here. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOsMika Westerberg
Reserved for ACPI actually means that in such case the GPIO hardware will not update the interrupt status register (GPI_IS) even if the pin is configured to trigger an interrupt. It will update GPI_GPE_STS instead and does not trigger an interrupt. Allow using such pins as GPIOs, only prevent their usage as interrupts. We also rename function intel_pad_reserved_for_acpi() to be intel_pad_acpi_mode() which reflects the actual meaning better. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27perf tools: Introduce usage_with_options_msg()Namhyung Kim
Now usage_with_options() setup a pager before printing message so normal printf() or pr_err() will not be shown. The usage_with_options_msg() can be used to print some help message before usage strings. Signed-off-by: Namhyung Kim <namhyung@kernel.org> Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1445701767-12731-4-git-send-email-namhyung@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-10-27pinctrl: intel: Add support for multiple GPIO chips sharing the interruptMika Westerberg
On Intel Broxton the GPIO hardware consists of several chips that all share the parent interrupt. It is not possible to handle this by setting chained handler for each chip (as they will overwrite each other). To overcome this we need to request the interrupt using devm_request_irq() and pass IRQF_SHARED with the flags. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27gpio: generic: Revert to old error handling in bgpio_mapGuenter Roeck
Returning an error instead of NULL in bgpio_map if platform_get_resource_byname does not find a resource was introduced with commit cf3f2a2c8bae ("gpio: generic: improve error handling in bgpio_map"). This results in several qemu runtime failures with default and non-default configurations, if attempts are made to boot from mmcblk0. Examples for failures with multi_v7_defconfig are Machine: vexpress-a9 dtb: vexpress-v2p-ca9 Machine: vexpress-a15 dtb: vexpress-v2p-ca15-tc1 Crash: VFS: Cannot open root device "mmcblk0" or unknown-block(0,0): error -6 Please append a correct "root=" boot option; here are the available partitions: Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) Looking into the code, always returning an error if bgpio_map fails does not appear to make much sense, since the code in bgpio_setup_io specifically supports some of the resources to be NULL. Fixes: cf3f2a2c8bae ("gpio: generic: improve error handling in bgpio_map") Cc: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27drivers/pinctrl: Add the concept of an "init" stateDouglas Anderson
For pinctrl the "default" state is applied to pins before the driver's probe function is called. This is normally a sensible thing to do, but in some cases can cause problems. That's because the pins will change state before the driver is given a chance to program how those pins should behave. As an example you might have a regulator that is controlled by a PWM (output high = high voltage, output low = low voltage). The firmware might leave this pin as driven high. If we allow the driver core to reconfigure this pin as a PWM pin before the PWM's probe function runs then you might end up running at too low of a voltage while we probe. Let's introudce a new "init" state. If this is defined we'll set pinctrl to this state before probe and then "default" after probe (unless the driver explicitly changed states already). An alternative idea that was thought of was to use the pre-existing "sleep" or "idle" states and add a boolean property that we should start in that mode. This was not done because the "init" state is needed for correctness and those other states are only present (and only transitioned in to and out of) when (optional) power management is enabled. Changes in v3: - Moved declarations to pinctrl/devinfo.h - Fixed author/SoB Changes in v2: - Added comment to pinctrl_init_done() as per Linus W. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27gpio: add a real time compliance notesGrygorii Strashko
Put in a compliance checklist. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27Revert "gpio: add a real time compliance checklist"Linus Walleij
This reverts commit 677b2ff4afd9996eabefc9472c701211b4b49e87.
2015-10-27mmc: pwrseq: Use highest priority for eMMC restart handlerJavier Martinez Canillas
The pwrseq_emmc driver does a eMMC card reset before a system reboot to allow broken or limited ROM boot-loaders (that don't have an eMMC reset logic) to be able to read the second stage from the eMMC. But this has to be called before a system reboot handler and while most of them use the priority 128, there are other restart handlers (such as the syscon-reboot one) that use a higher priority. So, use the highest priority to make sure that the eMMC hw is reset before a system reboot. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27pinctrl: uniphier: set input-enable before pin-muxingMasahiro Yamada
While IECTRL is disabled, input signals are pulled-down internally. If pin-muxing is set up first, glitch signals (Low to High transition) might be input to hardware blocks. Bad case scenario: [1] The hardware block is already running before pinctrl is handled. (the reset is de-asserted by default or by a firmware, for example) [2] The pin-muxing is set up. The input signals to hardware block are pulled-down by the chip-internal biasing. [3] The pins are input-enabled. The signals from the board reach the hardware block. Actually, one invalid character is input to the UART blocks for such SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the power on reset. To avoid such problems, pins should be input-enabled before muxing. Fixes: 6e9088920258 ("pinctrl: UniPhier: add UniPhier pinctrl core support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27gpio: Add GPIO support for the ACCES 104-IDIO-16William Breathitt Gray
The ACCES 104-IDIO-16 family of PC/104 utility boards feature 16 optically isolated inputs and 16 optically isolated FET solid state outputs. This driver provides GPIO support for these 32 channels of digital I/O. Change-of-State detection interrupts are not supported. GPIO 0-15 correspond to digital outputs 0-15, while GPIO 16-31 correspond to digital inputs 0-15. The base port address for the device may be set via the idio_16_base module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: cygnus: Add new compatible string for gpio controller driverPramod Kumar
This new compatible string, "brcm,iproc-gpio", should be used for all new iproc-based future SoCs. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driverPramod Kumar
Remove gpio to pinctrl pin mapping code from driver and address this through standard property "gpio-ranges". Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27pinctrl: cygnus: Optional DT property to support pin mappingsPramod Kumar
If GPIO controller's pins are muxed, pin-controller subsystem need to be intimated by defining mapping between gpio and pinmux controller. This patch adds required properties to define this mapping via DT. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27mmc: mediatek: add HS400 supportChaotian Jing
add HS400 mode and tune support Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: mmc: extend the mmc_send_tuning()Chaotian Jing
The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() to determine the opcode by bus width, assume eMMC was running at HS200, 4bit mode, then the mmc_send_tuning() will overwrite the opcode from CMD21 to CMD19, then got error. in addition, extend an argument of "cmd_error" to allow getting if there was cmd error when tune response. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> [Ulf: Rebased patch] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: mediatek: add implement of ops->hw_reset()Chaotian Jing
add implement of ops->hw_reset() for eMMC Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: mediatek: fix got GPD checksum error interrupt when data transferChaotian Jing
Even if we only use one gpd, we need alloc 2 gpd and make the gpd->next pointer to the second gpd, or may get gpd checksum error, this was checked by hardware Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: mediatek: change the argument "ddr" to "timing"Chaotian Jing
use the ios->timing directly is better It can reflect current timing and do settings by timing Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: mediatek: make cmd_ints_mask to constChaotian Jing
cmd_ints_mask and data_ints_mask are constant value, so make it to const Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: dt-bindings: update Mediatek MMC bindingsChaotian Jing
Add 400Mhz clock source for HS400 mode Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27mmc: core: Add DT bindings for eMMC hardware reset supportChaotian Jing
Sometime only need set MMC_CAP_HW_RESET for one of MMC hosts, So set it in device tree is better. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27backlight: pm8941-wled: Fix ptr_ret.cocci warningskbuild test robot
drivers/video/backlight/pm8941-wled.c:404:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-27bluetooth: 6lowpan: fix NOHZ: local_softirq_pendingAlexander Aring
Jukka reported about the following warning: "NOHZ: local_softirq_pending 08" I remember this warning and we had a similar issue when using workqueues and calling netif_rx. See commit 5ff3fec ("mac802154: fix NOHZ local_softirq_pending 08 warning"). This warning occurs when calling "netif_rx" inside the wrong context (non softirq context). The net core api offers "netif_rx_ni" to call netif_rx inside the correct softirq context. Reported-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Signed-off-by: Alexander Aring <alex.aring@gmail.com> Acked-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2015-10-27staging/rdma/hfi1: Update driver version string to 0.9-294Jubin John
Signed-off-by: Jubin John <jubin.john@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: add additional rc tracesMike Marciniszyn
Add additional rc traces to aid in debugging rc retry logic. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Add unit # to verbs txreq cache nameJubin John
The name used to create the verbs txreq cache was not qualified with the unit number. This causes a panic when destroying the cache on a dual HFI systems. Create a unique name with the unit number with this patch Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Jubin John <jubin.john@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Load SBus firmware once per ASICEaswar Hariharan
Using fw_sbus_load to control SBus firmware load doesn't scale across multiple HFI1 cards in a single system. This patch ensures that the SBus firmware is loaded once per ASIC. Reviewed-by: Dean Luick <dean.luick@intel.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Easwar Hariharan <easwar.hariharan@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Thread the receive interrupt.Dean Luick
When under heavy load, the receive interrupt handler can run too long with IRQs disabled. Add a mixed-mode threading scheme. Initially process packets in the handler for quick responses (latency). If there are too many packets to process move to a thread to continue (bandwidth). Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Add irqsaves in the packet processing pathDean Luick
In preparation for threading the receive interrupt, add irqsaves in the packet processing path. When the receive interrupt is threaded, the packet processing path is no longer guaranteed to have IRQs disabled. Add irqsaves where needed on several locks in the packet processing path. Anything that did not have an obvious, "close" irqsave in its caller is a candidate. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Increase SDMA descriptor queue sizeIgnacio Hernandez
A value of 2048 increased PSM performance while not impacting verbs performance. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Reviewed-by: Mitko Haralanov <mitko.haralanov@intel.com> Signed-off-by: Ignacio Hernandez <ignacio.hernandez@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27staging/rdma/hfi1: Allow tuning of SDMA interrupt rateMitko Haralanov
The SDMA engines were configured to generate progress interrupts every time they processed N/2 descriptors (where N is the size of the descriptor queue). This interval was too infrequent, leading to degraded performance. This commit adds a module parameter, as well as a recommended default, which allows for the tuning of the interrupt frequency. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Mitko Haralanov <mitko.haralanov@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27s390/cio: move ccw_device_stlck functionsSebastian Ott
device_ops.c should only contain functions that are called by ccw device drivers. Move the cio internal functions that handle unconditional reserve + release to device_pgid.c Acked-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-10-27s390/cio: move ccw_device_call_handlerSebastian Ott
device_ops.c should only contain functions that are called by ccw device drivers. Move the cio internal function ccw_device_call_handler to device_fsm.c where it's used. Remove some useless comments while at it. Acked-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-10-27s390/topology: reduce per_cpu() invocationsHeiko Carstens
Each per_cpu() invocation generates extra code. Since there are a lot of similiar calls in the topology code we can avoid a lot of them. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-10-27s390/nmi: reduce size of percpu variableHeiko Carstens
Change the flag fields within struct mcck_struct to simple bit fields to reduce the size of the structure which is used as percpu variable. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-10-27s390/nmi: fix terminologyHeiko Carstens
According to the architecture registers are validated and not revalidated. So change comments and functions names to match. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
generated by cgit (git 2.34.1) at 2025-09-19 00:39:38 +0000