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2024-09-13ASoC: tas2781: Add Calibration Kcontrols for ChromebookShenghao Ding
Add calibration related kcontrol for speaker impedance calibration and speaker leakage check for Chromebook. Signed-off-by: Shenghao Ding <shenghao-ding@ti.com> Link: https://patch.msgid.link/20240911232739.1509-1-shenghao-ding@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13AMD SoundWire machine driver code refactorMark Brown
Merge series from Vijendar Mukunda <Vijendar.Mukunda@amd.com>: This patch series moves common Soundwire endpoint parsing and dai creation logic to common placeholder from Intel generic SoundWire machine driver code to make it generic. AMD SoundWire machine driver code is refactored to use these functions for SoundWire endpoint parsing and dai creation logic. Link: https://github.com/thesofproject/linux/pull/5171
2024-09-13Merge tag 'nvme-6.12-2024-09-13' of git://git.infradead.org/nvme into ↵Jens Axboe
for-6.12/block Pull NVMe fixes from Keith: "nvme fixes for Linux 6.12 - A syntax cleanup (Shen) - Fix a Kconfig linking error (Arnd) - New queue-depth quirk (Keith)" * tag 'nvme-6.12-2024-09-13' of git://git.infradead.org/nvme: nvme-pci: qdepth 1 quirk nvme-tcp: fix link failure for TCP auth nvme: Convert comma to semicolon
2024-09-13nvme-pci: qdepth 1 quirkKeith Busch
Another device has been reported to be unreliable if we have more than one outstanding command. In this new case, data corruption may occur. Since we have two devices now needing this quirky behavior, make a generic quirk flag. The same Apple quirk is clearly not "temporary", so update the comment while moving it. Link: https://lore.kernel.org/linux-nvme/191d810a4e3.fcc6066c765804.973611676137075390@collabora.com/ Reported-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Christoph Hellwig hch@lst.de> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-09-13ASoC: amd: acp: refactor SoundWire machine driver codeVijendar Mukunda
Refactor Soundwire machine driver code by using common SoundWire endpoint parsing helper functions. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20240913090631.1834543-6-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13ASoC: sdw_utils/intel: move soundwire endpoint parsing helper functionsVijendar Mukunda
Move SoundWire endpoint parsing helper functions to common place holder. These functions will be used by other platform machine driver code. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20240913090631.1834543-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13ASoC: sdw_util/intel: move soundwire endpoint and dai link structuresVijendar Mukunda
Move Soundwire endpoint and dai link structures from Intel generic machine driver code to common place holder(soc_sdw_utils.h). These structures will be used in other platform SoundWire machine driver code. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20240913090631.1834543-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13ASoC: intel: sof_sdw: rename soundwire parsing helper functionsVijendar Mukunda
Rename SoundWire parsing helper functions with 'asoc_sdw' tag to make it generic. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20240913090631.1834543-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13ASoC: intel: sof_sdw: rename soundwire endpoint and dailink structuresVijendar Mukunda
Rename SoundWire endpoint and dai link structures with asoc tag to make it generic. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://patch.msgid.link/20240913090631.1834543-2-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13xtensa: Emulate one-byte cmpxchgPaul E. McKenney
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on xtensa. [ paulmck: Apply kernel test robot feedback. ] [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] [ Apply Geert Uytterhoeven feedback. ] Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Tested-by: Yujie Liu <yujie.liu@intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
2024-09-13sh: Emulate one-byte cmpxchgPaul E. McKenney
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on sh. [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] [ paulmck: Apply feedback from Naresh Kamboju. ] [ Apply Geert Uytterhoeven feedback. ] Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Palmer Dabbelt <palmer@rivosinc.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: <linux-sh@vger.kernel.org> Acked-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
2024-09-13ARC: Emulate one-byte cmpxchgPaul E. McKenney
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on arc. [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] [ paulmck: Apply feedback from Naresh Kamboju. ] [ paulmck: Apply kernel test robot feedback. ] [ paulmck: Apply feedback from Vineet Gupta. ] Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Palmer Dabbelt <palmer@rivosinc.com> Cc: <linux-snps-arc@lists.infradead.org> Acked-by: Vineet Gupta <vgupta@kernel.org>
2024-09-13ASoC: atmel: mchp-pdmc: Retain Non-Runtime ControlsCodrin Ciubotariu
Avoid removing these controls, as doing so can cause issues if the stream is initiated from another control. Ensure these controls remain intact when the stream is started or finished. Instead of removing them, return an -EBUSY error code to indicate that the controller is busy, especially when the audio filter and the SINC filter are in use. [andrei.simion@microchip.com: Reword the commit title and the commit message. Replace spinlock and busy variable with atomic_t busy_stream.] Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://patch.msgid.link/20240913120621.79088-1-andrei.simion@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13regulator: update some comments ([gs]et_voltage_vsel vs [gs]et_voltage_sel)André Draszik
Some comments here are referring to a non-existent regulator_ops::get_voltage_vsel() where ::get_voltage_sel() is meant, and similar for ::set_voltage_vsel() / ::set_voltage_sel(). Update the comments. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20240913-regulator-typos-v1-1-92781c93f638@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13regulator: max8973: Use irq_get_trigger_type() helperJinjie Ruan
Use irq_get_trigger_type() to replace irq_get_irq_data() and then irqd_get_trigger_type(), if the irq data is NULL it will return 0. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Link: https://patch.msgid.link/20240913013503.3754712-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-13pinctrl: pinctrl-cy8c95x0: Fix regcachePatrick Rudolph
The size of the mux stride was off by one, which could result in invalid pin configuration on the device side or invalid state readings on the software side. While on it also update the code and: - Increase the mux stride size to 16 - Align the virtual muxed regmap range to 16 - Start the regmap window at the selector - Mark reserved registers as not-readable Fixes: 8670de9fae49 ("pinctrl: cy8c95x0: Use regmap ranges") Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reported-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/20240902072859.583490-1-patrick.rudolph@9elements.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-09-13Merge tag 'intel-pinctrl-v6.11-1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v6.11-1 This includes a new ACPI ID that is added to the Intel Meteor Lake driver to support recent Intel Arrow Lake hardware. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-09-13ALSA: hda/realtek: Add support for Galaxy Book2 Pro (NP950XEE)Joshua Grisham
Adds support for GB2Pro Arc variant (NP950XEE) based on successful test and information provided by Github user drewdrew0 [1]. [1]: https://github.com/thesofproject/linux/issues/4055#issuecomment-2346890020 Signed-off-by: Joshua Grisham <josh@joshuagrisham.com> Link: https://patch.msgid.link/20240913080055.10807-1-josh@joshuagrisham.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-09-13crypto: n2 - Set err to EINVAL if snprintf fails for hmacHerbert Xu
Return EINVAL if the snprintf check fails when constructing the algorithm names. Fixes: 8c20982caca4 ("crypto: n2 - Silence gcc format-truncation false positive warnings") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202409090726.TP0WfY7p-lkp@intel.com/ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13crypto: camm/qi - Use ERR_CAST() to return error-valued pointerChen Yufan
Instead of directly casting and returning (void *) pointer, use ERR_CAST to explicitly return an error-valued pointer. This makes the error handling more explicit and improves code clarity. Signed-off-by: Chen Yufan <chenyufan@vivo.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13crypto: mips/crc32 - Clean up useless assignment operationsWangYuli
When entering the "len & sizeof(u32)" branch, len must be less than 8. So after one operation, len must be less than 4. At this time, "len -= sizeof(u32)" is not necessary for 64-bit CPUs. After that, replace `while' loops with equivalent `for' to make the code structure a little bit better by the way. Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk> Link: https://lore.kernel.org/all/alpine.DEB.2.21.2406281713040.43454@angie.orcam.me.uk/ Suggested-by: Herbert Xu <herbert@gondor.apana.org.au> Link: https://lore.kernel.org/all/ZtqZpzMH_qMQqzyc@gondor.apana.org.au/ Signed-off-by: Guan Wentao <guanwentao@uniontech.com> Signed-off-by: WangYuli <wangyuli@uniontech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13crypto: qcom-rng - rename *_of_data to *_match_dataBrian Masney
The qcom-rng driver supports both ACPI and device tree based systems. Let's rename all instances of *of_data to *match_data so that it's not implied that this driver only supports device tree-based systems. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13crypto: qcom-rng - fix support for ACPI-based systemsBrian Masney
The qcom-rng driver supports both ACPI and device tree-based systems. ACPI support was broken when the hw_random interface support was added. Let's go ahead and fix this by adding the appropriate driver data to the ACPI match table, and change the of_device_get_match_data() call to device_get_match_data() so that it will also work on ACPI-based systems. This fix was boot tested on a Qualcomm Amberwing server (ACPI based) and on a Qualcomm SA8775p Automotive Development Board (DT based). I also verified that qcom-rng shows up in /proc/crypto on both systems. Fixes: f29cd5bb64c2 ("crypto: qcom-rng - Add hw_random interface support") Reported-by: Ernesto A. Fernández <ernesto.mnd.fernandez@gmail.com> Closes: https://lore.kernel.org/linux-arm-msm/20240828184019.GA21181@eaf/ Cc: stable@vger.kernel.org Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13dt-bindings: crypto: qcom,prng: document support for SA8255pNikunj Kela
Document SA8255p compatible for the True Random Number Generator. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13crypto: aegis128 - Fix indentation issue in crypto_aegis128_process_crypt()Riyan Dhiman
The code in crypto_aegis128_process_crypt() had an indentation issue where spaces were used instead of tabs. This commit corrects the indentation to use tabs, adhering to the Linux kernel coding style guidelines. Issue reported by checkpatch: - ERROR: code indent should use tabs where possible No functional changes are intended. Signed-off-by: Riyan Dhiman <riyandhiman14@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-09-13Merge branch 'am65-cpsw-rx-mq'David S. Miller
Roger Quadros says: ==================== net: ethernet: ti: am65-cpsw: Add multi queue RX support am65-cpsw can support up to 8 queues at Rx. So far we have been using only one queue (i.e. default flow) for all RX traffic. This series adds multi-queue support. The driver starts with 1 RX queue by default. User can increase the RX queues via ethtool, e.g. 'ethtool -L ethx rx <N>' The series also adds regmap and regfield support to some of the ALE registers. It adds Policer/Classifier registers and fields. Converting the existing ALE control APIs to regfields can be a separate exercise. Some helper functions are added to read/write to the Policer/Classifier registers and a default Classifier setup function is added that routes packets based on their PCP/DSCP priority to different RX queues. Signed-off-by: Roger Quadros <rogerq@kernel.org> --- Changes in v4: - Use single macro AM65_CPSW_MAX_QUEUES for both TX and RX queues to simplify code - reuse am65_cpsw_get/set_per_queue_coalesce for am65_cpsw_get/set_coalesce. - return -EINVAL if unsupported tx/rx_coalesce_usecs in am65_cpsw_set_coalesce. - reverse Xmas tree declaration order fixes in cpsw_ale - Link to v3: https://lore.kernel.org/r/20240703-am65-cpsw-multi-rx-v3-0-f11cd860fd72@kernel.org Changes in v3: - code style fixes - squashed patches 5 and 6 - added comment about priority to thread mapping table. - Added Reviewed-by Simon Horman. - Link to v2: https://lore.kernel.org/r/20240628-am65-cpsw-multi-rx-v2-0-c399cb77db56@kernel.org Changes in v2: - rebase to net/next - fixed RX stall issue during iperf - Link to v1: https://lore.kernel.org/r/20240606-am65-cpsw-multi-rx-v1-0-0704b0cb6fdc@kernel.org ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: am65-cpsw: setup priority to flow mappingRoger Quadros
Now that we support multiple RX queues, enable default priority to flow mapping so that higher priority packets come on higher channels (flows). The Classifier checks for PCP/DSCP priority in the packet and routes them to the appropriate flow. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: cpsw_ale: add policer/classifier helpers and setup defaultsRoger Quadros
The Policer registers in the ALE register space are just shadow registers and use an index field in the policer table control register to read/write to the actual Polier registers. Add helper functions to Read and Write to Policer registers. Also add a helper function to set the thread value to classifier/policer mapping. Any packet that first matches the classifier will be sent to the thread (flow) that is set in the classifier to thread mapping table. If not set then it goes to the default flow. Default behaviour is to have 8 classifiers to map 8 DSCP/PCP priorities to N receive threads (flows). N depends on number of RX channels enabled for the port. As per the standard [1] User prioritie 1 (Background) and 2 (Spare) have lower priority than the user priority 0 (default). User priority 1 being of the lowest priority. [1] IEEE802.1D-2004, IEEE Standard for Local and metropolitan area networks Table G-2 - Traffic type acronyms Table G-3 - Defining traffic types Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: cpsw_ale: add Policer and Thread control register fieldsRoger Quadros
Adds regfileds for Policer registers and Thread mapping/control registers. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: cpsw_ale: use regfields for number of Entries and PolicersRoger Quadros
Use regfields for number of ALE Entries and Policers. The variants that support Policers/Classifiers have the number of policers encoded in the ALE_STATUS register. Use that and show the number of Policers in the ALE info message. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: cpsw_ale: use regfields for ALE registersRoger Quadros
Map the entire ALE registerspace using regmap. Add regfields for Major and Minor Version fields. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13net: ethernet: ti: am65-cpsw: Introduce multi queue RxRoger Quadros
am65-cpsw can support up to 8 queues at Rx. Use a macro AM65_CPSW_MAX_RX_QUEUES to indicate that. As there is only one DMA channel for RX traffic, the 8 queues come as 8 flows in that channel. By default, we will start with 1 flow as defined by the macro AM65_CPSW_DEFAULT_RX_CHN_FLOWS. User can change the number of flows by ethtool like so 'ethtool -L ethx rx <N>' All traffic will still come on flow 0. To get traffic on different flows the Classifiers will need to be set up. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-09-13Merge branch 'slab/for-6.12/kmem_cache_args' into slab/for-nextVlastimil Babka
Merge kmem_cache_create() refactoring by Christian Brauner. Note this includes a merge of the vfs.file tree that contains the prerequisity kmem_cache_create_rcu() work.
2024-09-13Merge branch 'slab/for-6.12/rcu_barriers' into slab/for-nextVlastimil Babka
Merge most of SLUB feature work for 6.12: - Barrier for pending kfree_rcu() in kmem_cache_destroy() and associated refactoring of the destroy path (Vlastimil Babka) - CONFIG_SLUB_RCU_DEBUG to allow KASAN catching UAF bugs in SLAB_TYPESAFE_BY_RCU caches (Jann Horn) - kmem_cache_charge() for delayed kmemcg charging (Shakeel Butt)
2024-09-13mm, slab: restore kerneldoc for kmem_cache_create()Vlastimil Babka
As kmem_cache_create() became a _Generic() wrapper macro, it currently has no kerneldoc despite being the main API to use. Add it. Also adjust kmem_cache_create_usercopy() kerneldoc to indicate it is now a legacy wrapper. Also expand the kerneldoc for struct kmem_cache_args, especially for the freeptr_offset field, where important details were removed with the removal of kmem_cache_create_rcu(). Signed-off-by: Vlastimil Babka <vbabka@suse.cz> Reviewed-by: Christian Brauner <brauner@kernel.org>
2024-09-13Merge tag 'drm-xe-fixes-2024-09-12' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes - Remove a double include (Lucas) - Fix null checks and UAF (Brost) - Fix access_ok check in user_fence_create (Nirmoy) - Fix compat IS_DISPLAY_STEP() range (Jani) - OA fix (Ashutosh) - Fixes in show_meminfo (Auld) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZuL-sORu54zfz1Lf@intel.com
2024-09-13Merge tag 'drm-misc-fixes-2024-09-12' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes An off-by-one fix for the CMA DMA-buf heap, An init fix for nouveau, a config dependency fix for stm, a syncobj leak fix, and two iommu fixes for tegra and rockchip. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240912-phenomenal-upbeat-grouse-a26781@houat
2024-09-12memory-provider: fix compilation issue without SYSFSMina Almasry
When CONFIG_SYSFS is not set, the kernel fails to compile: net/core/page_pool_user.c:368:45: error: implicit declaration of function 'get_netdev_rx_queue_index' [-Werror=implicit-function-declaration] 368 | if (pool->slow.queue_idx == get_netdev_rx_queue_index(rxq)) { | ^~~~~~~~~~~~~~~~~~~~~~~~~ When CONFIG_SYSFS is not set, get_netdev_rx_queue_index() is not defined as well. Fix by removing the ifdef around get_netdev_rx_queue_index(). It is not needed anymore after commit e817f85652c1 ("xdp: generic XDP handling of xdp_rxq_info") removed most of the CONFIG_SYSFS ifdefs. Fixes: 0f9214046893 ("memory-provider: dmabuf devmem memory provider") Cc: Matthieu Baerts (NGI0) <matttbe@kernel.org> Signed-off-by: Mina Almasry <almasrymina@google.com> Link: https://patch.msgid.link/20240913032824.2117095-1-almasrymina@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12Merge branch 'mlx5-updates-2024-09-11'Jakub Kicinski
Saeed Mahameed says: ==================== Misc updates to mlx5 driver: 1) Fix HW steering ret value and align with kdoc 2) Flow steering cleanups and add support for no append at software level 3) Support for sync reset using hot reset 4) RX SW counter to cover no-split events in header/data split mode 5) Make affinity of SFs configurable ==================== Link: https://patch.msgid.link/20240911201757.1505453-1-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5e: Match cleanup order in mlx5e_free_rq in reverse of mlx5e_alloc_rqRahul Rameshbabu
mlx5e_free_rq previously cleaned resources in an order that was not the reverse of the resource allocation order in mlx5e_alloc_rq. Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-16-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5e: SHAMPO, Add no-split ethtool counters for header/data splitDragos Tatulea
When SHAMPO can't identify the protocol/header of a packet, it will yield a packet that is not split - all the packet is in the data part. Count this value in packets and bytes. Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-15-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: Add NOT_READY command return statusShay Drory
Add a new command status MLX5_CMD_STAT_NOT_READY to handle cases where the firmware is not ready. Signed-off-by: Shay Drory <shayd@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Link: https://patch.msgid.link/20240911201757.1505453-14-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: Allow users to configure affinity for SFsShay Drory
SFs didn't allow to configure IRQ affinity for its vectors. Allow users to configure the affinity of the SFs irqs. Signed-off-by: Shay Drory <shayd@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Link: https://patch.msgid.link/20240911201757.1505453-13-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: Skip HotPlug check on sync reset using hot resetMoshe Shemesh
Sync reset request is nacked by the driver when PCIe bridge connected to mlx5 device has HotPlug interrupt enabled. However, when using reset method of hot reset this check can be skipped as Hotplug is supported on this reset method. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-12-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: Add support for sync reset using hot resetMoshe Shemesh
On device that supports sync reset for firmware activate using hot reset, the driver queries the required reset method while handling the sync reset request. If the required reset method is hot reset, the driver will use pci_reset_bus() to reset the PCI link instead of the link toggle. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-11-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: Add device cap for supporting hot reset in sync reset flowMoshe Shemesh
New devices with new FW can support sync reset for firmware activate using hot reset. Add capability for supporting it and add MFRL field to query from FW which type of PCI reset method to use while handling sync reset events. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-10-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: fs, add support for no append at software levelMark Bloch
Native capability for some steering engines lacks support for adding an additional match with the same value to the same flow group. To accommodate the NO APPEND flag in these scenarios, we include the new rule in the existing flow table entry (fte) without immediate hardware commitment. When a request is made to delete the corresponding hardware rule, we then commit the pending rule to hardware. Only one pending rule is supported because NO_APPEND is primarily used during replacement operations. In this scenario, a rule is initially added. When it needs replacement, the new rule is added with NO_APPEND set. Only after the insertion of the new rule is the original rule deleted. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-9-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: fs, separate action and destination into distinct structMark Bloch
Introduce a dedicated structure to encapsulate flow context, actions, destination count, and modification mask. This refactoring lays the groundwork for forthcoming patches that will integrate the NO APPEND software logic. Future modifications should focus solely on these specific fields. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-8-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: fs, remove unused memberMark Bloch
Counter is in struct fte, remove it. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-7-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-09-12net/mlx5: fs, move hardware fte deletion function resetMark Bloch
Downstream patches will need this as we might not want to reset it when a pending rule is connected to the FTE. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20240911201757.1505453-6-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>