summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-05-20rtc: m41t80: add the use of 'BIT' macroMylène Josserand
Replace bit shifts by BIT macro. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: m41t80: replace i2c functions for smbus onesMylène Josserand
The driver used i2c_transfer methods to read and set date/time. The smbus methods should be used. This commit replaces i2c_transfer functions by i2c_smbus_XX_i2c_block_data for reading and setting the datetime. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: m41t80: remove proc macroMylène Josserand
Remove the CONFIG_RTC_INTF_PROC and CONFIG_RTC_INTF_PROC_MODULE macro which is not necessary anymore. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: m41t80: update sysfs entries exportMylène Josserand
The driver used an old sysfs entry export. Update it to use the DEVICE_ATTR_XX macro and remove the unnecessary CONFIG_RTC_INTF_SYSFS macro. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: remove useless DRV_VERSIONAlexandre Belloni
Many drivers are defining a DRV_VERSION. This is often only used for MODULE_VERSION and sometimes to print an info message at probe time. This is kind of pointless as they are all versionned with the kernel anyway. Also the core will print a message when a new rtc is found. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: at91sam9: remove duplicate assignment of variable mrColin Ian King
mr is written twice with the same value, remove one of the redundant assignments to mr. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20rtc: ds1302: rewrite using SPISergey Yanovich
DS1302 is an half-duplex SPI device. The driver respects this fact now. Pin configurations should be implemented using SPI subsystem. Signed-off-by: Sergei Ianovich <ynvich@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-20ALSA: hda - Fix headphone noise on Dell XPS 13 9360Kai-Heng Feng
The headphone has noise when playing sound or switching microphone sources. It uses the same codec on XPS 13 9350, but with different subsystem ID. Applying the fixup can solve the issue. Also, changing the model name to better differentiate models. v2: Reorder by device ID. Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-05-20drm/i915/psr: Implement PSR2 w/a for gen9Daniel Vetter
Found this while browsing Bspec. Looks like it applies to both skl and kbl. v2: Also for bxt (Art). Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> Cc: "Runyan, Arthur J" <arthur.j.runyan@intel.com> Reviewed-by: Sonika Jindal<sonika.jindal@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463642060-30728-1-git-send-email-daniel.vetter@ffwll.ch
2016-05-20drm/i915/psr: Use ->get_aux_send_ctl functionsDaniel Vetter
I just wanted to get rid of the rmw cycle for gen9, but this also fixes some bugs we haven't carried over, like using recommended precharge and timeout values. Also I noticed that we don't set the fastwake sync length on skl, and that's used by PSR2 selective updates. Fix that. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-6-git-send-email-daniel.vetter@ffwll.ch
2016-05-20drm/i915/psr: Order DP aux transactions correctlyDaniel Vetter
On bdw/hsw we have a separate psr dp aux registers to set up, but on bdw it's shared with the main dp aux thing. Which means any subsequent dp aux transaction will trample over it, and hence must be done beforehand. Also this means we can't do any dp aux transactions while PSR is active, or at least we must restore the old state. Probably need a psr disable/enable pair around dp aux transactions in general. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-5-git-send-email-daniel.vetter@ffwll.ch
2016-05-20drm/i915/psr: Make idle_frames sensible againDaniel Vetter
This reverts commit dfaf37baa07513d2c37afff79978807d2d10221a Author: Rodrigo Vivi <rodrigo.vivi@intel.com> Date: Mon Dec 7 14:45:20 2015 -0800 drm/i915: Fix idle_frames counter. and commit 97173eaf5f33b1e85efdb06d593d333480b60bf3 Author: Rodrigo Vivi <rodrigo.vivi@intel.com> Date: Tue Jul 7 16:28:55 2015 -0700 drm/i915: PSR: Increase idle_frames and implements commit d44b4dcbd1b44737462b77971d216d21a9413341 Author: Rodrigo Vivi <rodrigo.vivi@intel.com> Date: Fri Nov 14 08:52:31 2014 -0800 drm/i915: HSW/BDW PSR Set idle_frames = VBT + 1 without the hack to use 2 idle frames when VBT says 1. We keep the + 1 just for safety, although I haven't really figured out why that one exists. It's nonsense. idle_frames = number of frames where the screen is entirely idle before we think about entering PSR. idle_patter = part of link training, and we probably totally butchered link training because we told the hw to entirely skip it. No wonder PSR occasionally just fell over. I suspect the reason we've increased idle frames is that it makes PSR entry slightly less likely, and more likely to happen in a quite system, which probably increased the changes the panel came back up without link training. The proper fix is to implement link training for PSR. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-3-git-send-email-daniel.vetter@ffwll.ch
2016-05-20drm/i915/psr: Try to program link training times correctlyDaniel Vetter
The default of 0 is 500us of link training, but that's not enough for some platforms. Decoding this correctly means we're using 2.5ms of link training on these platforms, which fixes flickering issues associated with enabling PSR. v2: Unbotch the math a bit. v3: Drop debug hunk. v4: Improve commit message. Tested-by: Lyude <cpaul@redhat.com> Cc: Lyude <cpaul@redhat.com> Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95176 Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: fritsch@kodi.tv Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-2-git-send-email-daniel.vetter@ffwll.ch
2016-05-20perf/x86/intel/p4: Trival indentation fix, remove spaceColin Ian King
Remove an extraneous space to fix up indentation. Trivial and no functional change Signed-off-by: Colin Ian King <colin.king@canonical.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Borislav Petkov <bp@suse.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1463503215-18339-1-git-send-email-colin.king@canonical.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-20x86/mm: Switch from TASK_SIZE to TASK_SIZE_MAX in the page fault codeAndy Lutomirski
x86's page fault handlers had two TASK_SIZE uses that should have been TASK_SIZE_MAX. I don't think that either one had a visible effect, but this makes the code clearer and should save a few bytes of text. (And I eventually want to eradicate TASK_SIZE. This will help.) Reported-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Dmitry Safonov <0x7f454c46@gmail.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Pavel Emelyanov <xemul@parallels.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ruslan Kabatsayev <b7.10110111@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1242fb23b0d05c3069dbf5758ac55d26bc114bef.1462914565.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-20x86/fsgsbase/64: Use TASK_SIZE_MAX for FSBASE/GSBASE upper limitsAndy Lutomirski
The GSBASE upper limit exists to prevent user code from confusing the paranoid idtentry path. The FSBASE upper limit is just for consistency. There's no need to enforce a smaller limit for 32-bit tasks. Just use TASK_SIZE_MAX. This simplifies the logic and will save a few bytes of code. Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/5357f2fe0f103eabf005773b70722451eab09a89.1462897104.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-20Merge branch 'linus' into x86/urgent, to refresh the treeIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-20x86/mm/mpx: Work around MPX erratum SKD046Dave Hansen
This erratum essentially causes the CPU to forget which privilege level it is operating on (kernel vs. user) for the purposes of MPX. This erratum can only be triggered when a system is not using Supervisor Mode Execution Prevention (SMEP). Our workaround for the erratum is to ensure that MPX can only be used in cases where SMEP is present in the processor and is enabled. This erratum only affects Core processors. Atom is unaffected. But, there is no architectural way to determine Atom vs. Core. So, we just apply this workaround to all processors. It's possible that it will mistakenly disable MPX on some Atom processsors or future unaffected Core processors. There are currently no processors that have MPX and not SMEP. It would take something akin to a hypervisor masking SMEP out on an Atom processor for this to present itself on current hardware. More details can be found at: http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/desktop-6th-gen-core-family-spec-update.pdf " SKD046 Branch Instructions May Initialize MPX Bound Registers Incorrectly Problem: Depending on the current Intel MPX (Memory Protection Extensions) configuration, execution of certain branch instructions (near CALL, near RET, near JMP, and Jcc instructions) without a BND prefix (F2H) initialize the MPX bound registers. Due to this erratum, such a branch instruction that is executed both with CPL = 3 and with CPL < 3 may not use the correct MPX configuration register (BNDCFGU or BNDCFGS, respectively) for determining whether to initialize the bound registers; it may thus initialize the bound registers when it should not, or fail to initialize them when it should. Implication: A branch instruction that has executed both in user mode and in supervisor mode (from the same linear address) may cause a #BR (bound range fault) when it should not have or may not cause a #BR when it should have. Workaround An operating system can avoid this erratum by setting CR4.SMEP[bit 20] to enable supervisor-mode execution prevention (SMEP). When SMEP is enabled, no code can be executed both with CPL = 3 and with CPL < 3. " Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20160512220400.3B35F1BC@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-20Merge tag 'perf-core-for-mingo-20160516' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo: User visible changes: - Honour the kernel.perf_event_max_stack knob more precisely by not counting PERF_CONTEXT_{KERNEL,USER} when deciding when to stop adding entries to the perf_sample->ip_callchain[] array (Arnaldo Carvalho de Melo) - Fix identation of 'stalled-backend-cycles' in 'perf stat' (Namhyung Kim) - Update runtime using 'cpu-clock' event in 'perf stat' (Namhyung Kim) - Use 'cpu-clock' for cpu targets in 'perf stat' (Namhyung Kim) - Avoid fractional digits for integer scales in 'perf stat' (Andi Kleen) - Store vdso buildid unconditionally, as it appears in callchains and we're not checking those when creating the build-id table, so we end up not being able to resolve VDSO symbols when doing analysis on a different machine than the one where recording was done, possibly of a different arch even (arm -> x86_64) (He Kuang) Infrastructure changes: - Generalize max_stack sysctl handler, will be used for configuring multiple kernel knobs related to callchains (Arnaldo Carvalho de Melo) Cleanups: - Introduce DSO__NAME_KALLSYMS and DSO__NAME_KCORE, to stop using open coded strings (Masami Hiramatsu) Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-19Revert "net: pegasus: remove dead coding"David S. Miller
This reverts commit e00be9e4d0ffcc0121606229f0aa4b246d6881d7. It causes warnings and has several problems. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-20drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucodeBen Skeggs
This is a simplied version of the fix by Roy in fdo#93629. While this doesn't appear to fix the issues for the users in that report, it's a real issue that deserves to be resolved. Reported-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/core: recognise GM108 chipsetsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setupBen Skeggs
Also removes an XXX; according to nvgpu headers the field is called NV_PGRAPH_GPCS_SWDX_TC_BETA_CB_SIZE_DIV3, so, apparently not some magic we need to figure out :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gk104-: share implementation of ppc exception initBen Skeggs
This was really inconsistent, some implementations could touch PPCs that didn't exist, others neglected to touch ones that did. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctxBen Skeggs
Matches newer RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/bios/pll: check BIT table version before trying to parse itBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/bios/pll: prevent oops when limits table can't be parsedBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/volt/gk104: round up in gk104_volt_setKarol Herbst
We always want a equal or higher voltage than the requested ones, otherwise nouveau undervolts. Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gf100-: allocate mmu debug buffersBen Skeggs
Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb: allow chipset-specific actions for oneinit()Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200-: fix bad hardcoding of a max-tpcs-per-gpc valueBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200-: rop count == ltc countBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fbBen Skeggs
Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: move some code into init_gpc_mmu() hookBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: make generate_main() staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: abstract fetching rop countBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offsetBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: remove hardcoded idle_timeout valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping arrayBen Skeggs
These are specified by PTOP on Maxwell GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: identify mmu engine ids for host faultsBen Skeggs
It appears these don't map to PBDMAs (at least on Kepler, it may or may be valid for Fermi - this hasn't been checked), but to runlists. This drops the NVKM_ENGINE_FIFO data from the entries too, as resetting all of PFIFO is *not* the way to handle such faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: implement support for PTOP fault infoBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: abstract mmu fault data structuresBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: subclass funcBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: use device info from top subdevBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/core: remove pmc_enable argument from subdev ctorBen Skeggs
These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv04: define reset masks + intr cleanupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv11: define reset masks + intr cleanupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv17: define reset masks + intr cleanupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit (git 2.34.1) at 2025-09-22 04:08:45 +0000