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2021-03-30phy: qcom-qmp: add hbr3_hbr2 voltage and premphasis swing tableKuogee Hsieh
Add hbr3_hbr2 voltage and premphasis swing table to support HBR3 link rate. Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615914761-12300-1-git-send-email-khsieh@codeaurora.org Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy") Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ingenic: Fix a typo in ingenic_usb_phy_probe()Wei Yongjun
Fix the return value check typo which testing the wrong variable in ingenic_usb_phy_probe(). Fixes: 31de313dfdcf ("PHY: Ingenic: Add USB PHY driver using generic PHY framework.") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20210305034933.3240914-1-weiyongjun1@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ralink: phy-mt7621-pci: fix return value check in mt7621_pci_phy_probe()Wei Yongjun
Fix the return value check which testing the wrong variable in mt7621_pci_phy_probe(). Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210305034931.3237558-1-weiyongjun1@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: marvell: ARMADA375_USBCLUSTER_PHY should not default to y, unconditionallyGeert Uytterhoeven
Merely enabling CONFIG_COMPILE_TEST should not enable additional code. To fix this, restrict the automatic enabling of ARMADA375_USBCLUSTER_PHY to MACH_ARMADA_375, and ask the user in case of compile-testing. Fixes: eee47538ec1f2619 ("phy: add support for USB cluster on the Armada 375 SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210208150252.424706-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: add missing call to of_node_put()Yang Li
In one of the error paths of the for_each_child_of_node() loop in of_property_read_u32, add missing call to of_node_put(). Fix the following coccicheck warning: ./drivers/phy/ti/phy-j721e-wiz.c:786:1-23: WARNING: Function "for_each_child_of_node" should have of_node_put() before return around line 795. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1614244674-66556-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ralink: phy-mt7621-pci: fix XTAL bitmaskSergio Paracuellos
When this was rewriten to get mainlined and start to use 'linux/bitfield.h' headers, XTAL_MASK was wrong. It must mask three bits but only two were used. Hence properly fix it to make things work. Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY") Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210302105412.16221-1-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clockSwapnil Jakhade
Update PCIe + USB register sequences for correct PLL1 clock configuration. Also, update sequences for other USB configurations with dependent changes. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/1614838096-32291-5-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TIKishon Vijay Abraham I
Update SGMII/QSGMII configuration specific to TI. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1614838096-32291-4-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Add support for configuring QSGMIIKishon Vijay Abraham I
Configure MAC clock dividers required for QSGMII to be functional. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1614838096-32291-3-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clockSwapnil Jakhade
For PCIe + QSGMII configuration where QSGMII was using PLL1 and was expecting 10GHz clock, configuration was giving 8GHz clock. Update register sequences to get correct PLL1 configuration. Also, update single link PCIe and single link SGMII/QSGMII configurations with related changes. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/1614838096-32291-2-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: cadence-torrent: Add support to drive refclk outKishon Vijay Abraham I
cmn_refclk_<p/m> lines in Torrent SERDES is used for connecting external reference clock. cmn_refclk_<p/m> can also be configured to output the reference clock. Model this derived reference clock as a "clock" so that platforms like AM642 EVM can enable it. This is used by PCIe to use the same refclk both in local SERDES and remote device. Add support here to drive refclk out. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/20210310120840.16447-7-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>Kishon Vijay Abraham I
cmn_refclk_<p/m> lines in Torrent SERDES is used for connecting external reference clock. cmn_refclk_<p/m> can also be configured to output the reference clock. In order to drive the refclk out from the SERDES (Cadence Torrent), PHY_EN_REFCLK should be set in SERDES_RST of WIZ. Model PHY_EN_REFCLK as a clock, so that platforms like AM642 EVM can enable it. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-6-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Model the internal clocks without device tree inputKishon Vijay Abraham I
commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled the internal clocks depending on the subnodes that are populated in device tree. However recent discussions in the mailing list [1] suggested to just add #clock cells in the parent DT node and model the clocks within the driver. Model the mux clocks without device tree input for AM64x SoC. Don't remove the earlier design since DT nodes for J7200 and J721e are already upstreamed. [1] -> http://lore.kernel.org/r/20210108025943.GA1790601@robh.at.kernel.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-5-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Configure full rate divider for AM64Kishon Vijay Abraham I
The frequency of the txmclk between PCIe and SERDES has changed to 250MHz from 500MHz. Configure full rate divider for AM64 accordingly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-4-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanupKishon Vijay Abraham I
commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in wiz. However during cleanup, it removed only the MUX clock provider. Remove the DIVIDER clock provider here. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-3-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_selKishon Vijay Abraham I
Both "struct wiz_clk_div_sel" and "struct wiz_clk_mux_sel" are static data that is common for all wiz instances. Including "struct regmap_field" for each of the wiz instances can yield undesirable results. Move "struct regmap_field" out of "struct wiz_clk_div_sel" and "struct wiz_clk_mux_sel" and make them point to constant data. So far no issues are observed since both these structures are not accessed outside the probe. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-2-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30devicetree/bindings: add support for CP110 UTMI PHYKonstantin Porotchkin
Add DTS binding for Marvell CP110 UTMI PHY Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210307163343.25684-4-kostap@marvell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30dt-bindings: phy: convert phy-mvebu-utmi to YAML schemaKonstantin Porotchkin
The new file name is marvell,armada-3700-utmi-phy.yaml Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210307163343.25684-3-kostap@marvell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30drivers: phy: add support for Armada CP110 UTMI PHYKonstantin Porotchkin
Add support for Marvell CP110 UTMI PHY driver allowing the USB2 port configuration independently from the boot loader setup. The CP110/CP115 dies have 2 UTMI PHYs that could be connected to two USB host controllers or to single USB device controller. Since there is only one USB device controller on die, only one of the UTMI PHYs could work in USB device mode. The CONFIG_PHY_MVEBU_CP110_UTMI should be enabled for usage of this driver. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20210307163343.25684-2-kostap@marvell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30Merge tag 's390-5.12-5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 updates from Heiko Carstens: - fix incorrect initialization and update of vdso data pages, which results in incorrect tod clock steering, and that clock_gettime(CLOCK_MONOTONIC_RAW, ...) returns incorrect values. - update MAINTAINERS for s390 vfio drivers * tag 's390-5.12-5' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: MAINTAINERS: add backups for s390 vfio drivers s390/vdso: fix initializing and updating of vdso_data s390/vdso: fix tod_steering_delta type s390/vdso: copy tod_steering_delta value to vdso_data page
2021-03-30drm/tegra: sor: Grab runtime PM reference across resetThierry Reding
The SOR resets are exclusively shared with the SOR power domain. This means that exclusive access can only be granted temporarily and in order for that to work, a rigorous sequence must be observed. To ensure that a single consumer gets exclusive access to a reset, each consumer must implement a rigorous protocol using the reset_control_acquire() and reset_control_release() functions. However, these functions alone don't provide any guarantees at the system level. Drivers need to ensure that the only a single consumer has access to the reset at the same time. In order for the SOR to be able to exclusively access its reset, it must therefore ensure that the SOR power domain is not powered off by holding on to a runtime PM reference to that power domain across the reset assert/deassert operation. This used to work fine by accident, but was revealed when recently more devices started to rely on the SOR power domain. Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset") Reported-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30radix tree test suite: Fix compilationMatthew Wilcox (Oracle)
Commit 4bba4c4bb09a added tools/include/linux/compiler_types.h which includes linux/compiler-gcc.h. Unfortunately, we had our own (empty) compiler_types.h which overrode the one added by that commit, and so we lost the definition of __must_be_array(). Removing our empty compiler_types.h fixes the problem and reduces our divergence from the rest of the tools. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2021-03-30XArray: Add xa_limit_16bMatthew Wilcox (Oracle)
A 16-bit limit is a more common limit than I had realised. Make it generally available. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2021-03-30XArray: Fix splitting to non-zero ordersMatthew Wilcox (Oracle)
Splitting an order-4 entry into order-2 entries would leave the array containing pointers to 000040008000c000 instead of 000044448888cccc. This is a one-character fix, but enhance the test suite to check this case. Reported-by: Zi Yan <ziy@nvidia.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2021-03-30XArray: Fix split documentationMatthew Wilcox (Oracle)
I wrote the documentation backwards; the new order of the entry is stored in the xas and the caller passes the old entry. Reported-by: Zi Yan <ziy@nvidia.com> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
2021-03-30drm/tegra: dc: Restore coupling of display controllersThierry Reding
Coupling of display controllers used to rely on runtime PM to take the companion controller out of reset. Commit fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") accidentally broke this when runtime PM was removed. Restore this functionality by reusing the hierarchical host1x client suspend/resume infrastructure that's similar to runtime PM and which perfectly fits this use-case. Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") Reported-by: Dmitry Osipenko <digetx@gmail.com> Reported-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30gpu: host1x: Use different lock classes for each clientMikko Perttunen
To avoid false lockdep warnings, give each client lock a different lock class, passed from the initialization site by macro. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30drm/tegra: dc: Don't set PLL clock to 0HzDmitry Osipenko
RGB output doesn't allow to change parent clock rate of the display and PCLK rate is set to 0Hz in this case. The tegra_dc_commit_state() shall not set the display clock to 0Hz since this change propagates to the parent clock. The DISP clock is defined as a NODIV clock by the tegra-clk driver and all NODIV clocks use the CLK_SET_RATE_PARENT flag. This bug stayed unnoticed because by default PLLP is used as the parent clock for the display controller and PLLP silently skips the erroneous 0Hz rate changes because it always has active child clocks that don't permit rate changes. The PLLP isn't acceptable for some devices that we want to upstream (like Samsung Galaxy Tab and ASUS TF700T) due to a display panel clock rate requirements that can't be fulfilled by using PLLP and then the bug pops up in this case since parent clock is set to 0Hz, killing the display output. Don't touch DC clock if pclk=0 in order to fix the problem. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30soundwire: qcom: wait for enumeration to be complete in probeSrinivas Kandagatla
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-10-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: add auto enumeration supportSrinivas Kandagatla
Qualcomm SoundWire controller supports Auto Enumeration of the devices within the IP. This patch enables support for this feature. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-9-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: export sdw_compare_devid, sdw_extract_slave_id and sdw_slave_addSrinivas Kandagatla
Exporting these three functions makes sense as it can be used by other controllers like Qualcomm during auto-enumeration! Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210330144719.13284-8-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: add support to new interruptsSrinivas Kandagatla
Add support to new interrupts which includes reporting some of the error interrupts and adding support to SLAVE pending interrupt! This patch also changes the interrupt handler behaviour on handling any pending interrupts by checking it before returning out of irq handler. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-7-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: update register read/write routineSrinivas Kandagatla
In the existing code every soundwire register read and register write are kinda blocked. Each of these are using a special command id that generates interrupt after it successfully finishes. This is really overhead, limiting and not really necessary unless we are doing something special. We can simply read/write the fifo that should also give exactly what we need! This will also allow to read/write registers in interrupt context, which was not possible with the special command approach. With previous approach number of interrupts generated after enumeration are around 130: $ cat /proc/interrupts | grep soundwire 21: 130 0 0 0 0 0 0 0 GICv3 234 Edge soundwire after this patch they are just 3 interrupts $ cat /proc/interrupts | grep soundwire 21: 3 0 0 0 0 0 0 0 GICv3 234 Edge soundwire This has significantly not only reduced interrupting CPU during enumeration but also during streaming! Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-6-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: start the clock during initializationSrinivas Kandagatla
Start the clock during initialization, doing this explicitly will add more clarity when we are adding clock stop feature. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-5-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: set continue execution flag for ignored commandsSrinivas Kandagatla
version 1.5.1 and higher IPs of this controller required to set continue execution on ignored command flag. This patch sets this flag. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-4-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30soundwire: qcom: add support to missing transport paramsSrinivas Kandagatla
Some of the transport parameters derived from device tree are not fully parsed by the driver. This patch adds support to parse those missing parameters. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-3-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30dt-bindings: soundwire: qcom: clarify data port bus parametersSrinivas Kandagatla
Some of the parameters for data ports are not applicable or not implemented in IP. So mark them as invalid/not applicable in DT so that controller is aware of this. Add comment to these bindings to provide more clarity on the values! Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-2-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30KVM: x86/mmu: Don't allow TDP MMU to yield when recovering NX pagesSean Christopherson
Prevent the TDP MMU from yielding when zapping a gfn range during NX page recovery. If a flush is pending from a previous invocation of the zapping helper, either in the TDP MMU or the legacy MMU, but the TDP MMU has not accumulated a flush for the current invocation, then yielding will release mmu_lock with stale TLB entries. That being said, this isn't technically a bug fix in the current code, as the TDP MMU will never yield in this case. tdp_mmu_iter_cond_resched() will yield if and only if it has made forward progress, as defined by the current gfn vs. the last yielded (or starting) gfn. Because zapping a single shadow page is guaranteed to (a) find that page and (b) step sideways at the level of the shadow page, the TDP iter will break its loop before getting a chance to yield. But that is all very, very subtle, and will break at the slightest sneeze, e.g. zapping while holding mmu_lock for read would break as the TDP MMU wouldn't be guaranteed to see the present shadow page, and thus could step sideways at a lower level. Cc: Ben Gardon <bgardon@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210325200119.1359384-4-seanjc@google.com> [Add lockdep assertion. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: x86/mmu: Ensure TLBs are flushed for TDP MMU during NX zappingSean Christopherson
Honor the "flush needed" return from kvm_tdp_mmu_zap_gfn_range(), which does the flush itself if and only if it yields (which it will never do in this particular scenario), and otherwise expects the caller to do the flush. If pages are zapped from the TDP MMU but not the legacy MMU, then no flush will occur. Fixes: 29cf0f5007a2 ("kvm: x86/mmu: NX largepage recovery for TDP MMU") Cc: stable@vger.kernel.org Cc: Ben Gardon <bgardon@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210325200119.1359384-3-seanjc@google.com> Reviewed-by: Ben Gardon <bgardon@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: x86/mmu: Ensure TLBs are flushed when yielding during GFN range zapSean Christopherson
When flushing a range of GFNs across multiple roots, ensure any pending flush from a previous root is honored before yielding while walking the tables of the current root. Note, kvm_tdp_mmu_zap_gfn_range() now intentionally overwrites its local "flush" with the result to avoid redundant flushes. zap_gfn_range() preserves and return the incoming "flush", unless of course the flush was performed prior to yielding and no new flush was triggered. Fixes: 1af4a96025b3 ("KVM: x86/mmu: Yield in TDU MMU iter even if no SPTES changed") Cc: stable@vger.kernel.org Reviewed-by: Ben Gardon <bgardon@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210325200119.1359384-2-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: make: Fix out-of-source module buildsSiddharth Chandrasekaran
Building kvm module out-of-source with, make -C $SRC O=$BIN M=arch/x86/kvm fails to find "irq.h" as the include dir passed to cflags-y does not prefix the source dir. Fix this by prefixing $(srctree) to the include dir path. Signed-off-by: Siddharth Chandrasekaran <sidcha@amazon.de> Message-Id: <20210324124347.18336-1-sidcha@amazon.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30selftests: kvm: make hardware_disable_test less verboseVitaly Kuznetsov
hardware_disable_test produces 512 snippets like ... main: [511] waiting semaphore run_test: [511] start vcpus run_test: [511] all threads launched main: [511] waiting 368us main: [511] killing child and this doesn't have much value, let's print this info with pr_debug(). Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20210323104331.1354800-1-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: x86/vPMU: Forbid writing to MSR_F15H_PERF MSRs when guest doesn't have ↵Vitaly Kuznetsov
X86_FEATURE_PERFCTR_CORE MSR_F15H_PERF_CTL0-5, MSR_F15H_PERF_CTR0-5 MSRs are only available when X86_FEATURE_PERFCTR_CORE CPUID bit was exposed to the guest. KVM, however, allows these MSRs unconditionally because kvm_pmu_is_valid_msr() -> amd_msr_idx_to_pmc() check always passes and because kvm_pmu_set_msr() -> amd_pmu_set_msr() doesn't fail. In case of a counter (CTRn), no big harm is done as we only increase internal PMC's value but in case of an eventsel (CTLn), we go deep into perf internals with a non-existing counter. Note, kvm_get_msr_common() just returns '0' when these MSRs don't exist and this also seems to contradict architectural behavior which is #GP (I did check one old Opteron host) but changing this status quo is a bit scarier. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20210323084515.1346540-1-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: x86: remove unused declaration of kvm_write_tsc()Dongli Zhang
kvm_write_tsc() was renamed and made static since commit 0c899c25d754 ("KVM: x86: do not attempt TSC synchronization on guest writes"). Remove its unused declaration. Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com> Message-Id: <20210326070334.12310-1-dongli.zhang@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30KVM: clean up the unused argumentHaiwei Li
kvm_msr_ignored_check function never uses vcpu argument. Clean up the function and invokers. Signed-off-by: Haiwei Li <lihaiwei@tencent.com> Message-Id: <20210313051032.4171-1-lihaiwei.kernel@gmail.com> Reviewed-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30tools/kvm_stat: Add restart delayStefan Raspl
If this service is enabled and the system rebooted, Systemd's initial attempt to start this unit file may fail in case the kvm module is not loaded. Since we did not specify a delay for the retries, Systemd restarts with a minimum delay a number of times before giving up and disabling the service. Which means a subsequent kvm module load will have kvm running without monitoring. Adding a delay to fix this. Signed-off-by: Stefan Raspl <raspl@linux.ibm.com> Message-Id: <20210325122949.1433271-1-raspl@linux.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-03-30Merge tag 'kvmarm-fixes-5.12-3' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 5.12, take #3 - Fix GICv3 MMIO compatibility probing - Prevent guests from using the ARMv8.4 self-hosted tracing extension
2021-03-30Merge tag 'vfio-v5.12-rc6' of git://github.com/awilliam/linux-vfioLinus Torvalds
Pull VFIO fixes from Alex Williamson: - Fix pfnmap batch carryover (Daniel Jordan) - Fix nvlink Kconfig dependency (Jason Gunthorpe) * tag 'vfio-v5.12-rc6' of git://github.com/awilliam/linux-vfio: vfio/nvlink: Add missing SPAPR_TCE_IOMMU depends vfio/type1: Empty batch for pfnmap pages
2021-03-30mm: fix race by making init_zero_pfn() early_initcallIlya Lipnitskiy
There are code paths that rely on zero_pfn to be fully initialized before core_initcall. For example, wq_sysfs_init() is a core_initcall function that eventually results in a call to kernel_execve, which causes a page fault with a subsequent mmput. If zero_pfn is not initialized by then it may not get cleaned up properly and result in an error: BUG: Bad rss-counter state mm:(ptrval) type:MM_ANONPAGES val:1 Here is an analysis of the race as seen on a MIPS device. On this particular MT7621 device (Ubiquiti ER-X), zero_pfn is PFN 0 until initialized, at which point it becomes PFN 5120: 1. wq_sysfs_init calls into kobject_uevent_env at core_initcall: kobject_uevent_env+0x7e4/0x7ec kset_register+0x68/0x88 bus_register+0xdc/0x34c subsys_virtual_register+0x34/0x78 wq_sysfs_init+0x1c/0x4c do_one_initcall+0x50/0x1a8 kernel_init_freeable+0x230/0x2c8 kernel_init+0x10/0x100 ret_from_kernel_thread+0x14/0x1c 2. kobject_uevent_env() calls call_usermodehelper_exec() which executes kernel_execve asynchronously. 3. Memory allocations in kernel_execve cause a page fault, bumping the MM reference counter: add_mm_counter_fast+0xb4/0xc0 handle_mm_fault+0x6e4/0xea0 __get_user_pages.part.78+0x190/0x37c __get_user_pages_remote+0x128/0x360 get_arg_page+0x34/0xa0 copy_string_kernel+0x194/0x2a4 kernel_execve+0x11c/0x298 call_usermodehelper_exec_async+0x114/0x194 4. In case zero_pfn has not been initialized yet, zap_pte_range does not decrement the MM_ANONPAGES RSS counter and the BUG message is triggered shortly afterwards when __mmdrop checks the ref counters: __mmdrop+0x98/0x1d0 free_bprm+0x44/0x118 kernel_execve+0x160/0x1d8 call_usermodehelper_exec_async+0x114/0x194 ret_from_kernel_thread+0x14/0x1c To avoid races such as described above, initialize init_zero_pfn at early_initcall level. Depending on the architecture, ZERO_PAGE is either constant or gets initialized even earlier, at paging_init, so there is no issue with initializing zero_pfn earlier. Link: https://lkml.kernel.org/r/CALCv0x2YqOXEAy2Q=hafjhHCtTHVodChv1qpM=niAXOpqEbt7w@mail.gmail.com Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Cc: Hugh Dickins <hughd@google.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: stable@vger.kernel.org Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-03-30Merge tag 'mips-fixes_5.12_3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fix from Thomas Bogendoerfer: - Fix compile error with option MIPS_ELF_APPENDED_DTB * tag 'mips-fixes_5.12_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: kernel: setup.c: fix compilation error