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2023-05-16ARM: dts: stm32: Add sleep pinmux for SPI1 pins_a on stm32mp15Steffen Trumtrar
Add a sleep mux option for the SPI1 pins_a mux. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add idle/sleep pinmux for USART3 on stm32mp15Steffen Trumtrar
Add idle and sleep mux option for the USART3 pins_a. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add pinmux for USART1 pins on stm32mp15Steffen Trumtrar
Add a mux option for the USART1 pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add new pinmux for sdmmc2_d47 on stm32mp15Steffen Trumtrar
Add another option for the SDMMC_D47 pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add new pinmux for sdmmc1_b4 on stm32mp15Steffen Trumtrar
Add another option for the SDMMC_B4 pins. It is almost identical to sdmmc1_b4_pins_a but the SDMMC1_D2 pin. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add alternate pinmux for sai2b on stm32mp15Steffen Trumtrar
Add another option for the SAI2B pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Add alternate pinmux for ethernet for stm32mp15Steffen Trumtrar
Add another option for the ethernet0 pins. It is almost identical to ethernet0_rgmii_pins_c apart from TXD0/1. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16xhci: Fix incorrect tracking of free space on transfer ringsMathias Nyman
This incorrect tracking caused unnecessary ring expansion in some usecases which over days of use consume a lot of memory. xhci driver tries to keep track of free transfer blocks (TRBs) on the ring buffer, but failed to add back some cancelled transfers that were turned into no-op operations instead of just moving past them. This can happen if there are several queued pending transfers which then are cancelled in reverse order. Solve this by counting the numer of steps we move the dequeue pointer once we complete a transfer, and add it to the number of free trbs instead of just adding the trb number of the current transfer. This way we ensure we count the no-op trbs on the way as well. Fixes: 55f6153d8cc8 ("xhci: remove extra loop in interrupt context") Cc: stable@vger.kernel.org Reported-by: Miller Hunter <MillerH@hearthnhome.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217242 Tested-by: Miller Hunter <MillerH@hearthnhome.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://lore.kernel.org/r/20230515134059.161110-3-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-05-16xhci-pci: Only run d3cold avoidance quirk for s2idleMario Limonciello
Donghun reports that a notebook that has an AMD Ryzen 5700U but supports S3 has problems with USB after resuming from suspend. The issue was bisected down to commit d1658268e439 ("usb: pci-quirks: disable D3cold on xhci suspend for s2idle on AMD Renoir"). As this issue only happens on S3, narrow the broken D3cold quirk to only run in s2idle. Fixes: d1658268e439 ("usb: pci-quirks: disable D3cold on xhci suspend for s2idle on AMD Renoir") Reported-and-tested-by: Donghun Yoon <donghun.yoon@lge.com> Cc: stable@vger.kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://lore.kernel.org/r/20230515134059.161110-2-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-05-17powerpc/iommu: Incorrect DDW Table is referenced for SR-IOV deviceGaurav Batra
For an SR-IOV device, while enabling DDW, a new table is created and added at index 1 in the group. In the below 2 scenarios, the table is incorrectly referenced at index 0 (which is where the table is for default DMA window). 1. When adding DDW This issue is exposed with "slub_debug". Error thrown out from dma_iommu_dma_supported() Warning: IOMMU offset too big for device mask mask: 0xffffffff, table offset: 0x800000000000000 2. During Dynamic removal of the PCI device. Error is from iommu_tce_table_put() since a NULL table pointer is passed in. Fixes: 381ceda88c4c ("powerpc/pseries/iommu: Make use of DDW for indirect mapping") Cc: stable@vger.kernel.org # v5.15+ Signed-off-by: Gaurav Batra <gbatra@linux.vnet.ibm.com> Reviewed-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230505184701.91613-1-gbatra@linux.vnet.ibm.com
2023-05-17powerpc/iommu: DMA address offset is incorrectly calculated with 2MB TCEsGaurav Batra
When DMA window is backed by 2MB TCEs, the DMA address for the mapped page should be the offset of the page relative to the 2MB TCE. The code was incorrectly setting the DMA address to the beginning of the TCE range. Mellanox driver is reporting timeout trying to ENABLE_HCA for an SR-IOV ethernet port, when DMA window is backed by 2MB TCEs. Fixes: 387273118714 ("powerps/pseries/dma: Add support for 2M IOMMU page size") Cc: stable@vger.kernel.org # v5.16+ Signed-off-by: Gaurav Batra <gbatra@linux.vnet.ibm.com> Reviewed-by: Greg Joyce <gjoyce@linux.vnet.ibm.com> Reviewed-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230504175913.83844-1-gbatra@linux.vnet.ibm.com
2023-05-17powerpc/iommu: Remove iommu_del_device()Jason Gunthorpe
Now that power calls iommu_device_register() and populates its groups using iommu_ops->device_group it should not be calling iommu_group_remove_device(). The core code owns the groups and all the other related iommu data, it will clean it up automatically. Remove the bus notifiers and explicit calls to iommu_group_remove_device(). Fixes: a940904443e4 ("powerpc/iommu: Add iommu_ops to report capabilities and allow blocking domains") Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/0-v1-1421774b874b+167-ppc_device_group_jgg@nvidia.com
2023-05-16ARM: dts: stm32: use RCC macro for CRC node on stm32f746Dario Binacchi
The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16arm64: mte: Do not set PG_mte_tagged if tags were not initializedPeter Collingbourne
The mte_sync_page_tags() function sets PG_mte_tagged if it initializes page tags. Then we return to mte_sync_tags(), which sets PG_mte_tagged again. At best, this is redundant. However, it is possible for mte_sync_page_tags() to return without having initialized tags for the page, i.e. in the case where check_swap is true (non-compound page), is_swap_pte(old_pte) is false and pte_is_tagged is false. So at worst, we set PG_mte_tagged on a page with uninitialized tags. This can happen if, for example, page migration causes a PTE for an untagged page to be replaced. If the userspace program subsequently uses mprotect() to enable PROT_MTE for that page, the uninitialized tags will be exposed to userspace. Fix it by removing the redundant call to set_page_mte_tagged(). Fixes: e059853d14ca ("arm64: mte: Fix/clarify the PG_mte_tagged semantics") Signed-off-by: Peter Collingbourne <pcc@google.com> Cc: <stable@vger.kernel.org> # 6.1 Link: https://linux-review.googlesource.com/id/Ib02d004d435b2ed87603b858ef7480f7b1463052 Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Link: https://lore.kernel.org/r/20230420214327.2357985-1-pcc@google.com Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16arm64: Also reset KASAN tag if page is not PG_mte_taggedPeter Collingbourne
Consider the following sequence of events: 1) A page in a PROT_READ|PROT_WRITE VMA is faulted. 2) Page migration allocates a page with the KASAN allocator, causing it to receive a non-match-all tag, and uses it to replace the page faulted in 1. 3) The program uses mprotect() to enable PROT_MTE on the page faulted in 1. As a result of step 3, we are left with a non-match-all tag for a page with tags accessible to userspace, which can lead to the same kind of tag check faults that commit e74a68468062 ("arm64: Reset KASAN tag in copy_highpage with HW tags only") intended to fix. The general invariant that we have for pages in a VMA with VM_MTE_ALLOWED is that they cannot have a non-match-all tag. As a result of step 2, the invariant is broken. This means that the fix in the referenced commit was incomplete and we also need to reset the tag for pages without PG_mte_tagged. Fixes: e5b8d9218951 ("arm64: mte: reset the page tag in page->flags") Cc: <stable@vger.kernel.org> # 5.15 Link: https://linux-review.googlesource.com/id/I7409cdd41acbcb215c2a7417c1e50d37b875beff Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20230420210945.2313627-1-pcc@google.com Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16arm64: perf: Mark all accessor functions inlineGeert Uytterhoeven
When just including <asm/arm_pmuv3.h>: arch/arm64/include/asm/arm_pmuv3.h:31:13: error: ‘write_pmevtypern’ defined but not used [-Werror=unused-function] 31 | static void write_pmevtypern(int n, unsigned long val) | ^~~~~~~~~~~~~~~~ arch/arm64/include/asm/arm_pmuv3.h:24:13: error: ‘write_pmevcntrn’ defined but not used [-Werror=unused-function] 24 | static void write_pmevcntrn(int n, unsigned long val) | ^~~~~~~~~~~~~~~ arch/arm64/include/asm/arm_pmuv3.h:16:22: error: ‘read_pmevcntrn’ defined but not used [-Werror=unused-function] 16 | static unsigned long read_pmevcntrn(int n) | ^~~~~~~~~~~~~~ Fix this by adding the missing "inline" keywords to the three accessor functions that lack them. Fixes: df29ddf4f04b ("arm64: perf: Abstract system register accesses away") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/d53a19043c0c3bd25f6c203e73a2fb08a9661824.1683561482.git.geert+renesas@glider.be Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16ARM: perf: Mark all accessor functions inlineGeert Uytterhoeven
When just including <asm/arm_pmuv3.h>: arch/arm/include/asm/arm_pmuv3.h:110:13: error: ‘write_pmevtypern’ defined but not used [-Werror=unused-function] 110 | static void write_pmevtypern(int n, unsigned long val) | ^~~~~~~~~~~~~~~~ arch/arm/include/asm/arm_pmuv3.h:103:13: error: ‘write_pmevcntrn’ defined but not used [-Werror=unused-function] 103 | static void write_pmevcntrn(int n, unsigned long val) | ^~~~~~~~~~~~~~~ arch/arm/include/asm/arm_pmuv3.h:95:22: error: ‘read_pmevcntrn’ defined but not used [-Werror=unused-function] 95 | static unsigned long read_pmevcntrn(int n) | ^~~~~~~~~~~~~~ Fix this by adding the missing "inline" keywords to the three accessor functions that lack them. Fixes: 009d6dc87a56 ("ARM: perf: Allow the use of the PMUv3 driver on 32bit ARM") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/3a7d9bc7470aa2d85696ee9765c74f8c03fb5454.1683561482.git.geert+renesas@glider.be Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16arm64: vdso: Pass (void *) to virt_to_page()Linus Walleij
Like the other calls in this function virt_to_page() expects a pointer, not an integer. However since many architectures implement virt_to_pfn() as a macro, this function becomes polymorphic and accepts both a (unsigned long) and a (void *). Fix this up with an explicit cast. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2023-May/832583.html Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16arm64/mm: mark private VM_FAULT_X defines as vm_fault_tMin-Hua Chen
This patch fixes several sparse warnings for fault.c: arch/arm64/mm/fault.c:493:24: sparse: warning: incorrect type in return expression (different base types) arch/arm64/mm/fault.c:493:24: sparse: expected restricted vm_fault_t arch/arm64/mm/fault.c:493:24: sparse: got int arch/arm64/mm/fault.c:501:32: sparse: warning: incorrect type in return expression (different base types) arch/arm64/mm/fault.c:501:32: sparse: expected restricted vm_fault_t arch/arm64/mm/fault.c:501:32: sparse: got int arch/arm64/mm/fault.c:503:32: sparse: warning: incorrect type in return expression (different base types) arch/arm64/mm/fault.c:503:32: sparse: expected restricted vm_fault_t arch/arm64/mm/fault.c:503:32: sparse: got int arch/arm64/mm/fault.c:511:24: sparse: warning: incorrect type in return expression (different base types) arch/arm64/mm/fault.c:511:24: sparse: expected restricted vm_fault_t arch/arm64/mm/fault.c:511:24: sparse: got int arch/arm64/mm/fault.c:670:13: sparse: warning: restricted vm_fault_t degrades to integer arch/arm64/mm/fault.c:670:13: sparse: warning: restricted vm_fault_t degrades to integer arch/arm64/mm/fault.c:713:39: sparse: warning: restricted vm_fault_t degrades to integer Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Min-Hua Chen <minhuadotchen@gmail.com> Link: https://lore.kernel.org/r/20230502151909.128810-1-minhuadotchen@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2023-05-16arm64: xilinx: Use zynqmp prefix for SOM dt overlaysMichal Simek
U-Boot is using zynqmp- prefix to compose DT name for board detection that's why also generate DT in this format in the kernel. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/49c1b8c992929610ba17b9c6edf5d40d4b28d2ed.1683033163.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add phase tags markingMichal Simek
bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT. That's why add it also to Linux to be aligned with bootloader requirement. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/48b554aef75d11e6ad2ef7d21f22accb35432112.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Describe bus-width for SD card on KV260Michal Simek
SD card is connected with 4 data lines which should be described properly. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b4046d2f593047400c190e438fd9d05128c293d9.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Enable AMS on SOM and other zcu10x boardsMichal Simek
AMS is used for monitoring system. Used for measuring voltages and especially temperatures. Origin interface is IIO but via iio-hwmon it can be moved to hwmon framework too (done for SOM and zcu100). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e1e1621ac1cee7f36ef20606bb3795e130de9609.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Enable DP driver for SOMsMichal Simek
DP DMA is already enabled that's why there is no reason to keep DP disabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/15d16b4de933bfae108df6ca368eb2cdf916aa02.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Setup clock for DP and DPDMAMichal Simek
Clocks are coming from shared HW design where these frequencies should be aligned with PLL setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/807e22371394222f728ff7d6b190a96a12145439.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Switch to ethernet-phy-id in kv260Michal Simek
Use ethernet-phy-id compatible string to properly describe phy reset on kv260 boards. Previous description wasn't correct because reset was done for mdio bus to operate and it was in this case used for different purpose which was eth phy reset. With ethernet-phy-id phy reset happens only for the phy via phy framework. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4b139e942c2a808eecbb30226b6ea5303348390a.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2Piyush Mehta
The board zynqmp-zc1751-xm016-dc2 support only USB2.0 that's why remove USB3.0 DT configuration. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ad019501a851c5730427af948b636316f10b2e3b.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add pinctrl emmc description to SM-K26Michal Simek
Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f61c16e2fd7c91c2be6d6b67c902037580dbd364.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add gpio labels for modepin gpioMichal Simek
Using label helps with better chip identification. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/12b2fcd94e528c8ca7117f6741aae36b5942b430.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add mtd partition for secure OS storage areaAmit Kumar Mahapatra
Update MTD partitions of Kria device trees to allocate 128KB of QSPI memory for secure OS. Increased "SHA256" partition size & changed starting address of "User" partition to accommodate the new partition "Secure OS Storage" Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20dd23821118999c6fec2bad52ea446d1a66fefb.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Use assigned-clock-rates for setting up SD clock in SOMMichal Simek
With limited low level configuration done via psu-init only IPs connected on SOM are initialized and configured. All IPs connected to carrier card are not initialized. There is a need to do proper reset, pin configuration and also clock setting. The patch targets the last part which is setting up proper clock for EMMC on production SOMs and SD on kv260-revB. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/cf5a4e412e1674500a71a0b1eed7fa8393f37ae9.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add linux,code for gpio buttonSrinivas Neeli
BTN_MISC looks like the most reasonable option for this button. Button is used by firmware to indicate (after reset, power up) that user wants to do firmware upgrade via firmware update utility. For bootloader or OS is this just user button which is worth to have it mapped. Also button can be used as a wakeup source and pressing it for more time can generate more chars that's why also adding wakeup-source and autorepeat properties. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4e20661f43b1fb8432fa5fcda5c1cb50d0a27475.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add dmas, dp, rtc, watchdogs and opp nodes for SOMMichal Simek
There are couple of IPs which are enabled in origin HW design which are missing in SOM dt. Add them to match default setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5d3777fdf91d114effe1921255a7ad71ef30d277.1683034376.git.michal.simek@amd.com
2023-05-16ARM: dts: stm32: Move ethernet MAC EEPROM from SoM to carrier boardsMarek Vasut
The ethernet MAC EEPROM is not populated on the SoM itself, it has to be populated on each carrier board. Move the EEPROM into the correct place in DTs, i.e. the carrier board DTs. Add label to the EEPROM too. Fixes: 7e76f82acd9e1 ("ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: dts: stm32: Replace deprecated st,hw-flow-ctrl with uart-has-rtsctsMarek Vasut
Replace deprecated st,hw-flow-ctrl with uart-has-rtscts . No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16ARM: zynq: dts: Add SCL & SDA GPIO entries for recoveryChirag Parekh
Wire i2c pinmuxing gpio recovery for zc702. Signed-off-by: Chirag Parekh <chiragp@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5eb73d1150648e782795e35c30fccb983b3e0db7.1683035557.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Fix usb reset over bootmode pins on zcu100Michal Simek
The commit 53ba1b2bdaf7 ("arm64: dts: zynqmp: Add mode-pin GPIO controller DT node") added usb phy reset over bootmode pins by default on usb0 only. zcu100 is using usb0 as peripheral and usb1 as host. Unfortunately reset line is shared for both usb ulpi phys but usb_rst_b is connected to usb5744 hub which is used only in host mode. Especially this chip requires reset to operate properly that's why better assign gpio reset to usb1 instead of usb0. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d117473da3bab39a82fe900cecd8ca78df9adeda.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Sync node name address with reg (mailbox)Michal Simek
Address in node name should match with the first reg property in DT. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5d8e80383912b8ff75409764efb75f3b85917087.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add resets property to sdhci nodesSai Krishna Potthuri
Add "resets" property to sdhci nodes. Resets property is used to reset the SD host controller when dynamic configuration support is enabled. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8f8592d6454c024c8f8b92e56c9009c65ad1d54a.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Rename ams_ps/pl node namesMichal Simek
Fix child node names to be aligned with commit 39dd2d1e251d ("dt-bindings: iio: adc: Add Xilinx AMS binding documentation") which requires names as ams-ps@ and ams-pl@. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/373136eccf8d22cdfb499adbc8d5f5510d6c1035.1683034376.git.michal.simek@amd.com
2023-05-16ARM: dts: stm32: remove extra space in stm32mp15xx-dkx.dtsiPatrick Delaunay
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16arm64: tegra: Add CPU OPP tables and interconnects propertySumit Gupta
Add OPP table and interconnects property to scale DDR frequency with CPU frequency for better performance. Each operating point entry of the OPP table has CPU freq to per MC channel bandwidth mapping. One table is added for each cluster even though the table data is same because the bandwidth request is per cluster. This is done because OPP framework creates a single icc path and hence single bandwidth request if the table is marked as 'opp-shared' and shared among all clusters. For us, the OPP table data is same but the MC Client ID argument to interconnects property is different for each cluster. So, having per cluster table makes different icc path for each cluster and helps to make per cluster BW requests. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-16arm64: tegra: Add support for IGX OrinShubhi Garg
Add support for the NVIDIA IGX Orin development kit having P3701 module with P3740 carrier board. Signed-off-by: Shubhi Garg <shgarg@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-16Merge branch 'for-6.5/dt-bindings' into for-6.5/arm64/dtThierry Reding
2023-05-16dt-bindings: tegra: Add ICC IDs for dummy memory clientsSumit Gupta
Add ICC IDs for dummy software clients representing CCPLEX clusters. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-16ARM: dts: stm32: add part number for STM32MP15xPatrick Delaunay
The STM32MP15x Device Part Number is located in the first 8 bits of OTP4, this patch add its description as the NVMEM cell. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-16net: bcmgenet: Restore phy_stop() depending upon suspend/closeFlorian Fainelli
Removing the phy_stop() from bcmgenet_netif_stop() ended up causing warnings from the PHY library that phy_start() is called from the RUNNING state since we are no longer stopping the PHY state machine during bcmgenet_suspend(). Restore the call to phy_stop() but make it conditional on being called from the close or suspend path. Fixes: c96e731c93ff ("net: bcmgenet: connect and disconnect from the PHY state machine") Fixes: 93e0401e0fc0 ("net: bcmgenet: Remove phy_stop() from bcmgenet_netif_stop()") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Link: https://lore.kernel.org/r/20230515025608.2587012-1-f.fainelli@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2023-05-16tpm/tpm_tis: Disable interrupts for more Lenovo devicesJerry Snitselaar
The P360 Tiny suffers from an irq storm issue like the T490s, so add an entry for it to tpm_tis_dmi_table, and force polling. There also previously was a report from the previous attempt to enable interrupts that involved a ThinkPad L490. So an entry is added for it as well. Cc: stable@vger.kernel.org Reported-by: Peter Zijlstra <peterz@infradead.org> # P360 Tiny Closes: https://lore.kernel.org/linux-integrity/20230505130731.GO83892@hirez.programming.kicks-ass.net/ Signed-off-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2023-05-16tpm: Prevent hwrng from activating during resumeJarkko Sakkinen
Set TPM_CHIP_FLAG_SUSPENDED in tpm_pm_suspend() and reset in tpm_pm_resume(). While the flag is set, tpm_hwrng() gives back zero bytes. This prevents hwrng from racing during resume. Cc: stable@vger.kernel.org Fixes: 6e592a065d51 ("tpm: Move Linux RNG connection to hwrng") Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2023-05-16tpm_tis: Use tpm_chip_{start,stop} decoration inside tpm_tis_resumeJarkko Sakkinen
Before sending a TPM command, CLKRUN protocol must be disabled. This is not done in the case of tpm1_do_selftest() call site inside tpm_tis_resume(). Address this by decorating the calls with tpm_chip_{start,stop}, which should be always used to arm and disarm the TPM chip for transmission. Finally, move the call to the main TPM driver callback as the last step because it should arm the chip by itself, if it needs that type of functionality. Cc: stable@vger.kernel.org Reported-by: Jason A. Donenfeld <Jason@zx2c4.com> Closes: https://lore.kernel.org/linux-integrity/CS68AWILHXS4.3M36M1EKZLUMS@suppilovahvero/ Fixes: a3fbfae82b4c ("tpm: take TPM chip power gating out of tpm_transmit()") Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-29 15:23:58 +0000