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2019-09-03coresight: etm4x: Add ETM PIDs for SDM845 and MSM8996Sai Prakash Ranjan
Instead of overriding the peripheral id(PID) check in AMBA by hardcoding them in DT, add the PIDs to the ETM4x driver. Here we use Unique Component Identifier(UCI) for MSM8996 since the ETM and CPU debug module shares the same PIDs. SDM845 does not support CPU debug module. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20190829202842.580-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-03coresight: etm4x: Two function calls lessMarkus Elfring
Avoid an extra function call in two function implementations by using a ternary operator instead of a conditional statement. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20190829202842.580-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-03Merge tag 'fpga-cvp-for-5.4' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next Moritz writes: FPGA Manager changes for 5.4-rc1 Here is the second set of changes for the 5.4 merge window. This patchset adds support for the v2 revision of Intel (Altera)'s CVP parts including the Stratix 10. All of this patches have been reviewed and been in the last few linux-next releases without issues. Signed-off-by: Moritz Fischer <mdf@kernel.org> * tag 'fpga-cvp-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga: fpga: altera-cvp: Add Stratix10 (V2) Support fpga: altera-cvp: Preparation for V2 parts. fpga: altera-cvp: Discover Vendor Specific offset
2019-09-03Merge tag 'thunderbolt-for-v5.4' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into char-misc-next Mika writes: thunderbolt: Changes for v5.4 merge window The biggest change is the addition of Intel Ice Lake integrated Thunderbolt support. There are also a couple of smaller changes like converting the driver to use better device property interface and use correct format string in service key attribute. * tag 'thunderbolt-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: ACPI / property: Add two new Thunderbolt property GUIDs to the list thunderbolt: Add support for Intel Ice Lake thunderbolt: Expose active parts of NVM even if upgrade is not supported thunderbolt: Hide switch attributes that are not set thunderbolt: Do not fail adding switch if some port is not implemented thunderbolt: Use 32-bit writes when writing ring producer/consumer thunderbolt: Move NVM upgrade support flag to struct icm thunderbolt: Correct path indices for PCIe tunnel thunderbolt: Show key using %*pE not %*pEp thunderbolt: Switch to use device_property_count_uXX()
2019-09-03net/mlx5: Add devlink flow_steering_mode parameterMaor Gottlieb
Add new parameter (flow_steering_mode) to control the flow steering mode of the driver. Two modes are supported: 1. DMFS - Device managed flow steering 2. SMFS - Software/Driver managed flow steering. In the DMFS mode, the HW steering entities are created through the FW. In the SMFS mode this entities are created though the driver directly. The driver will use the devlink steering mode only if the steering domain supports it, for now SMFS will manages only the switchdev eswitch steering domain. User command examples: - Set SMFS flow steering mode:: $ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime - Read device flow steering mode:: $ devlink dev param show pci/0000:06:00.0 name flow_steering_mode pci/0000:06:00.0: name flow_steering_mode type driver-specific values: cmode runtime value smfs Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: Add support to use SMFS in switchdev modeMaor Gottlieb
In case that flow steering mode of the driver is SMFS (Software Managed Flow Steering), then use the DR (SW steering) API to create the steering objects. In addition, add a call to the set peer namespace when switchdev gets devcom pair event. It is required to support VF LAG in SMFS. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: Add API to set the namespace steering modeMaor Gottlieb
Add API to set the flow steering root namesapce mode. Setting new mode should be called before any steering operation is executed on the namespace. This API is going to be used by steering users such switchdev. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: Add direct rule fs_cmd implementationMaor Gottlieb
Add support to create flow steering objects via direct rule API (SW steering). New layer is added - fs_dr, this layer translates the command that fs_core sends to the FW into direct rule API. In case that direct rule is not supported in some feature then -EOPNOTSUPP is returned. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add CONFIG_MLX5_SW_STEERING for software steering supportAlex Vesker
Add new mlx5 Kconfig flag to allow selecting software steering support and compile all the steering files only if the flag is selected. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose APIs for direct rule managingAlex Vesker
Expose APIs for direct rule managing to increase insertion rate by bypassing the firmware. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add required FW steering functionalityAlex Vesker
SW steering is capable of doing many steering functionalities but there are still some functionalities which are not exposed to upper layers and therefore performed by the FW. This is the support for recalculating checksum using a hairpin QP. The recalculation is required after a modify TTL action which skips the needed CS calculation in HW. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering rule functionalityAlex Vesker
Rules are the actual objects that tie matchers, header values and actions. Each rule belongs to a matcher, which can hold multiple rules sharing the same mask. Each rule is a specific set of values and actions. When a packet reaches a matcher it is being matched against the matcher`s rules. In case of a match over a rule its actions will be executed. Each rule object contains a set of STEs, where each STE is a definition of match values and actions defined by the rule. This file handles the rule operations and processing. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering action functionalityAlex Vesker
On rule creation a set of actions can be provided, the actions describe what to do with the packet in case of a match. It is possible to provide a set of actions which will be done by order. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering matcher functionalityAlex Vesker
Matcher defines which packets fields are matched when a packet arrives. Matcher is a part of a table and can contain one or more rules. Where rule defines specific values of the matcher's mask definition. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering table functionalityAlex Vesker
Tables are objects which are used for storing matchers, each table belongs to a domain and defined by the domain type. When a packet reaches the table it is being processed by each of its matchers until a successful match. Tables can hold multiple matchers ordered by matcher priority. Each table has a level. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering domain functionalityAlex Vesker
Domain is the frame for all of the dr (direct rule) objects. There are different domain types which also affect the object under that domain. Each domain can hold multiple tables which can hold multiple matchers and so on, this means that all of the dr (direct rule) objects exist under a specific domain. The domain object also holds the resources needed for other objects such as memory management and communication with the device. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add Steering entry (STE) utilitiesAlex Vesker
Steering Entry (STE) object is the basic building block of the steering map. There are several types of STEs. Each rule can be constructed of multiple STEs. Each STE dictates which fields of the packet's header are being matched as well as the information about the next step in map (hit and miss pointers). The hardware gets a packet and tries to match it against the STEs, going to either the hit pointer or the miss pointer. This file handles the STE operations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose an internal API to issue RDMA operationsAlex Vesker
Inserting or deleting a rule is done by RDMA read/write operation to SW ICM device memory. This file provides the support for executing these operations. It includes allocating the needed resources and providing an API for writing steering entries to the memory. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, ICM pool memory allocatorAlex Vesker
ICM device memory is used for writing steering rules (STEs) to the NIC. An ICM memory pool allocator was implemented to manage the required memory. The pool consists of buckets, a bucket per chunk size. Once a bucket is empty we will cut a row of memory from the latest allocated MR, if the MR size is not sufficient we will allocate a new MR. HW design requires that chunks memory address should be aligned to the chunk size, this is the reason for managing the MR with row size that insures memory alignment. Current design is greedy in memory but provides quick allocation times in steady state. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add direct rule command utilitiesAlex Vesker
Add direct rule command utilities which consists of all the FW commands that are executed to provide the SW steering functionality. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add the internal direct rule types definitionsAlex Vesker
Add the internal header file that contains various types definition that will be used in coming patches as well as the internal functions decelerations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: Add flow steering actions to fs_cmd shim layerMaor Gottlieb
Add flow steering actions: modify header and packet reformat to the fs_cmd shim layer. This allows each namespace to define possibly different functionality for alloc/dealloc action commands. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03Merge tag 'phy-for-5.4' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into char-misc-next Kishon writes: phy: for 5.4 *) Add a new PHY driver for Lantiq VRX200/ARX300 PCIe PHY *) Add missing of_node_put() to a bunch of drivers using for_each_available_child_of_node() *) Add RXAUI/PCIe/SATA/USB3 support in Marvell's Armada CP110 COMPHY *) Other misc fixes and cleanup Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits) phy: marvell: phy-mvebu-cp110-comphy: rename instances of DLT phy: marvell: phy-mvebu-cp110-comphy: implement RXAUI support dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings dt-bindings: phy: Add Marvell COMPHY clocks phy: mvebu-cp110-comphy: Update comment about powering off all lanes at boot phy: mvebu-cp110-comphy: Add PCIe support phy: mvebu-cp110-comphy: Cosmetic change in a helper phy: mvebu-cp110-comphy: Add SATA support phy: mvebu-cp110-comphy: Add USB3 host/device support phy: mvebu-cp110-comphy: Allow non-Ethernet modes to be configured phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes phy: mvebu-cp110-comphy: Add RXAUI support phy: mvebu-cp110-comphy: List already supported Ethernet modes phy: mvebu-cp110-comphy: Add SMC call support phy: mvebu-cp110-comphy: Explicitly initialize the lane submode phy: mvebu-cp110-comphy: Add clocks support phy-rockchip-inno-hdmi: Fix RK3328_TERM_RESISTOR_CALIB_SPEED_7_0's third value phy: qcom-qmp: Correct ready status, again phy: qualcomm: phy-qcom-qmp: Add of_node_put() before return phy: renesas: rcar-gen3-usb2: Disable clearing VBUS in over-current ...
2019-09-03Merge tag 'icc-5.4-rc1' of https://git.linaro.org/people/georgi.djakov/linux ↵Greg Kroah-Hartman
into char-misc-next Georgi writes: interconnect patches for 5.4 Here are the interconnect driver updates for the 5.4-rc1 merge window. - New feature is the path tagging support that helps with grouping and aggregating the bandwidth requests into separate buckets based on a tag. - The first user of the path tagging is the Qualcomm sdm845 driver that now implements support for wake/sleep sets. This allows consumer drivers to express their bandwidth needs for the different CPU power states. - New interconnect driver for the qcs404 platforms and a driver that communicates bandwidth requests with remote processor over shared memory. - Cleanups and fixes. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> * tag 'icc-5.4-rc1' of https://git.linaro.org/people/georgi.djakov/linux: drivers: qcom: Add BCM vote macro to header interconnect: qcom: remove COMPILE_TEST from CONFIG_INTERCONNECT_QCOM_QCS404 interconnect: qcom: Add QCS404 interconnect provider driver interconnect: qcom: Add interconnect RPM over SMD driver dt-bindings: interconnect: Add Qualcomm QCS404 DT bindings interconnect: qcom: Add tagging and wake/sleep support for sdm845 interconnect: Add pre_aggregate() callback interconnect: Add support for path tags
2019-09-03hwmon: (w83793d) convert to use devm_i2c_new_dummy_deviceWolfram Sang
And simplify the error handling. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20190903181256.13450-4-wsa+renesas@sang-engineering.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (w83792d) convert to use devm_i2c_new_dummy_deviceWolfram Sang
And simplify the error handling. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20190903181256.13450-3-wsa+renesas@sang-engineering.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (w83791d) convert to use devm_i2c_new_dummy_deviceWolfram Sang
And simplify the error handling. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20190903181256.13450-2-wsa+renesas@sang-engineering.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (as370-hwmon) fix devm_platform_ioremap_resource.cocci warningskbuild test robot
Use devm_platform_ioremap_resource helper which wraps platform_get_resource() and devm_ioremap_resource() together. Generated by: scripts/coccinelle/api/devm_platform_ioremap_resource.cocci Fixes: 658e687b4218 ("hwmon: Add Synaptics AS370 PVT sensor driver") CC: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: kbuild test robot <lkp@intel.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.1909030646180.3228@hadrien Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Add support for writing sampling period on PCT2075Guenter Roeck
For PCT7027, the sampling period is configured using a dedicated register. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Add support for writing conversion time for TMP112Guenter Roeck
TMP112 uses an uncommon method to write the conversion time: its configuration register is 16 bit wide, and the conversion time is configured in its second byte. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Move updating the sample interval to its own functionGuenter Roeck
We'll need per-chip handling for updating the sample interval. To prepare for it, separate the code implementing it into its own function. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Support configuring the sample time for various chipsGuenter Roeck
The conversion (sample) time is configurable for several chips supported by the lm75 driver. With the necessary infrastructure in place, enable this support for all chips using the configuration register for this purpose. DS1775: Conversion time: 187.5, 375, 750, 1500 ms Sensor resolution: 9, 10, 11, 12 bit DS75, STDS75: Conversion time: 150, 300, 600, 1200 ms Sensor resolution: 9, 10, 11, 12 bit DS7505: Conversion time: 25, 50, 100, 200 ms Sensor resolution: 9, 10, 11, 12 bit MCP980[0123]: Conversion time: 75, 150, 300, 600 ms Sensor resolution: 9, 10, 11, 12 bit TMP100, TMP101: Conversion time: 75, 150, 300, 600 ms Sensor resolution: 9, 10, 11, 12 bit TMP75, TMP105, TMP175, TMP275: Conversion time: 38, 75, 150, 300 ms Sensor resolution: 9, 10, 11, 12 bit While doing this, it became obvious that the masks and values to set the converion (sample) time is similar for all those chips, and that other chips with configurable sample times will need separate code anyway. For that reason, replace the sample_set_masks and sample_clr_mask configuration parameters with a single array and with a constant. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (nct7904) Fix incorrect temperature limitation register setting of LTD.amy.shih
According to kernel hwmon sysfs-interface documentation, temperature critical max value, typically greater than corresponding temp_max values. Thus, reads the LTD_HV_HL (LTD HIGH VALUE HIGH LIMITATION) and LTD_LV_HL (LTD LOW VALUE HIGH LIMITATION) for case hwmon_temp_crit and hwmon_temp_crit_hyst. Reads the LTD_HV_LL (HIGH VALUE LOW LIMITATION) and LTD_LV_LL (LOW VALUE LOW LIMITATION) for case hwmon_temp_max and hwmon_temp_max_hyst. Signed-off-by: amy.shih <amy.shih@advantech.com.tw> Link: https://lore.kernel.org/r/20850618155720.24857-1-Amy.Shih@advantech.com.tw Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (as370-hwmon) Add DT bindings for Synaptics AS370 PVTJisheng Zhang
Add device tree bindings for Synaptics AS370 PVT sensors. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20190827113337.384457f6@xhacker.debian Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: Add Synaptics AS370 PVT sensor driverJisheng Zhang
Add a new driver for Synaptics AS370 PVT sensors. Currently, only temperature is supported. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20190827113259.4fb64a17@xhacker.debian Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03pmbus: (ibm-cffps) Add support for version 2 of the PSUEddie James
Version 2 of the PSU supports a second page of data and changes the format of the FW version. Use the devicetree binding to differentiate between the version the driver should use. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/1567192263-15065-4-git-send-email-eajames@linux.ibm.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03dt-bindings: hwmon: Document ibm,cffps2 compatible stringEddie James
Document the compatible string for version 2 of the IBM CFFPS PSU. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/1567192263-15065-2-git-send-email-eajames@linux.ibm.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (iio_hwmon) Enable power exporting from IIOMichal Simek
There is no reason why power channel shouldn't be exported as is done for voltage, current, temperature and humidity. Power channel is available on iio ina226 driver. Sysfs IIO documentation for power attribute added by commit 7c6d5c7ee883 ("iio: Documentation: Add missing documentation for power attribute") is declaring that value is in mili-Watts but hwmon interface is expecting value in micro-Watts that's why there is a need for mili-Watts to micro-Watts conversion. Tested on Xilinx ZCU102 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/db71f5ae87e4521a2856a1be5544de0b6cede575.1566483741.git.michal.simek@xilinx.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03dt-bindings: Add ipsps1 as a trivial deviceJohn Wang
The ipsps1 is an Inspur Power System power supply unit Signed-off-by: John Wang <wangzqbj@inspur.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: pmbus: Add Inspur Power System power supply driverJohn Wang
Add the driver to monitor Inspur Power System power supplies with hwmon over pmbus. This driver adds sysfs attributes for additional power supply data, including vendor, model, part_number, serial number, firmware revision, hardware revision, and psu mode(active/standby). Signed-off-by: John Wang <wangzqbj@inspur.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20190819091509.29276-1-wangzqbj@inspur.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon/ltc2990: Generalise DT to fwnode supportMax Staudt
ltc2990 will now use device_property_read_u32_array() instead of of_property_read_u32_array() - allowing the use of software nodes via fwnode_create_software_node(). This allows code using i2c_new_device() to specify a default measurement mode for the LTC2990 via fwnode_create_software_node(). Signed-off-by: Max Staudt <max@enpas.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20190819121618.16557-2-max@enpas.org Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (raspberrypi) update MODULE_AUTHOR() email addressStefan Wahren
The email address listed in MODULE_AUTHOR() will be disabled in the near future. Replace it with my private one. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/1565720249-6549-2-git-send-email-wahrenst@gmx.net Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Modularize lm75_write and make hwmon_chip writableIker Perez del Palomar Sustatxa
* Create two separate functions to write into hwmon_temp and hwmon_chip. * Call the functions from lm75_write. * Make hwm_chip writable if the chip supports more than one sample time. Signed-off-by: Iker Perez del Palomar Sustatxa <iker.perez@codethink.co.uk> Link: https://lore.kernel.org/r/20190808080246.8371-5-iker.perez@codethink.co.uk Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Add new fields into lm75_params_Iker Perez del Palomar Sustatxa
The new fields are included to prepare the driver for next patch. The fields are: * *resolutions: Stores all the supported resolutions by the device. * num_sample_times: Stores the number of possible sample times. * *sample_times: Stores all the possible sample times to be set. * sample_set_masks: The set_masks for the possible sample times * sample_clr_mask: Clear mask to set the default sample time. Signed-off-by: Iker Perez del Palomar Sustatxa <iker.perez@codethink.co.uk> Link: https://lore.kernel.org/r/20190808080246.8371-4-iker.perez@codethink.co.uk [groeck: Minor structure documentation fixes] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Create function from code to write into registersIker Perez del Palomar Sustatxa
Wrap the existing code to write configurations into registers in a function. Added error handling to the function. Signed-off-by: Iker Perez del Palomar Sustatxa <iker.perez@codethink.co.uk> Link: https://lore.kernel.org/r/20190808080246.8371-3-iker.perez@codethink.co.uk Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (lm75) Create structure to save all the configuration parameters.Iker Perez del Palomar Sustatxa
* Add to lm75_data kind field to store the kind of device the driver is working with. * Add an structure to store the configuration parameters of all the supported devices. * Delete resolution_limits from lm75_data and include them in the structure described above. * Add a pointer to the configuration parameters structure to be used as a reference to obtain the parameters. * Delete switch-case approach to get the device configuration parameters. * The structure is cleaner and easier to maintain. Signed-off-by: Iker Perez del Palomar Sustatxa <iker.perez@codethink.co.uk> Link: https://lore.kernel.org/r/20190808080246.8371-2-iker.perez@codethink.co.uk Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature.amy.shih
NCT-7904D also supports reading of channel limitation registers as well as SMI status registers for fan, voltage and temperature monitoring. It also supports reading the temperature sensor type (thermal diode, thermistor, AMD SB-TSI or Intel PECI). Add the following sysfs nodes: -fan[1-*]_min -fan[1-*]_alarm -in[1-*]_min -in[1-*]_max -in[1-*]_alarm -temp[1-*]_max -temp[1-*]_max_hyst -temp[1-*]_emergency -temp[1-*]_emergency_hyst -temp[1-*]_alarm -temp[1-*]_type Signed-off-by: Amy Shih <amy.shih@advantech.com.tw> Link: https://lore.kernel.org/r/20190807013842.24451-1-Amy.Shih@advantech.com.tw [groeck: Clarified description] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: w83795: Fan control option isn't that dangerousJean Delvare
I have been using SENSORS_W83795_FANCTRL for several years and never had any problem. When the driver was added, I had not tested that part of the driver yet so I wanted to be super cautious, but time has shown that it works just fine. In the long run I even believe that we should drop the option and enable the feature unconditionally. It doesn't do anything until the user explicitly starts twiddling with sysfs attributes anyway. Signed-off-by: Jean Delvare <jdelvare@suse.de> Link: https://lore.kernel.org/r/20190806102123.3118bcc5@endymion Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (npcm750-pwm-fan) Remove dev_err() usage after platform_get_irq()Stephen Boyd
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Jean Delvare <jdelvare@suse.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-hwmon@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> [groeck: Dropped jz4740-hwmon.c (driver is being removed)] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2019-09-03hwmon: (acpi_power_meter) Change log level for 'unsafe software power cap'Wang Shenran
At boot time, the acpi_power_meter driver logs the following error level message: "Ignoring unsafe software power cap". Having read about it from a few sources, it seems that the error message can be quite misleading. While the message can imply that Linux is ignoring the fact that the system is operating in potentially dangerous conditions, the truth is the driver found an ACPI_PMC object that supports software power capping. The driver simply decides not to use it, perhaps because it doesn't support the object. The best solution is probably changing the log level from error to warning. All sources I have found, regarding the error, have downplayed its significance. There is not much of a reason for it to be on error level, while causing potential confusions or misinterpretations. Signed-off-by: Wang Shenran <shenran268@gmail.com> Link: https://lore.kernel.org/r/20190724080110.6952-1-shenran268@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>