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2014-11-10/dev/mem: Use more consistent data typesThierry Reding
The xlate_dev_{kmem,mem}_ptr() functions take either a physical address or a kernel virtual address, so data types should be phys_addr_t and void *. They both return a kernel virtual address which is only ever used in calls to copy_{from,to}_user(), so make variables that store it void * rather than char * for consistency. Also only define a weak unxlate_dev_mem_ptr() function if architectures haven't overridden them in the asm/io.h header file. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-10Change xlate_dev_{kmem,mem}_ptr() prototypesThierry Reding
xlate_dev_mem_ptr() is used to convert a physical address to an uncached kernel virtual address mapping, so make it use phys_addr_t as type for the physical address and return void * for the kernel virtual address. xlate_dev_kmem_ptr() converts a cached kernel virtual address mapping to an uncached kernel virtual address mapping, so make it use void * for both the input parameter and return value. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-10ARM: ixp4xx: Properly override I/O accessorsThierry Reding
In order to override accessors properly they must be #define'd so that subsequent generic headers (the one for ARM and finally the architecture independent one) can properly detect it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-10ARM: ixp4xx: Fix build with IXP4XX_INDIRECT_PCIArnd Bergmann
Provide *_relaxed() accessors and make sure to pass the volatile void __iomem * to accessors rather than the value cast to a u32. This allows ixp4xx to build with IXP4XX_INDIRECT_PCI enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-10bnx2fc: fix tgt spinlock lockingMaurizio Lombardi
bnx2fc_queuecommand(): when allocating a new io_req, the tgt_lock spinlock must be locked before calling bnx2fc_cmd_alloc(). The spinlock should also be kept locked until bnx2fc_post_io_req() has been completed. If not, a kernel thread may call bnx2fc_process_cq_compl() that extracts the newly allocated io_req from hba->cmd_mgr->cmds and destroys it while it is still being used by bnx2fc_post_io_req(). BUG: unable to handle kernel NULL pointer dereference at 000000000000004c IP: [<ffffffffa03130da>] bnx2fc_init_task+0x6a/0x230 [bnx2fc] PGD 0 Oops: 0000 [#1] SMP last sysfs file: /sys/devices/pci0000:00/0000:00:02.0/0000:04:00.3/net/eth3/type CPU 33 Modules linked in: autofs4 target_core_iblock target_core_file target_core_pscsi target_core_mod configfs bnx2fc cnic uio fcoe libfcoe libfc scsi_transport_fc 8021q garp scsi_tgt stp llc cpufreq_ondemand freq_table pcc_cpufreq ipt_REJECT nf_conntrack_ipv4 nf_defrag_ipv4 iptable_filter ip_tables ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 xt_state nf_conntrack ip6table_filter ip6_tables ipv6 power_meter microcode iTCO_wdt iTCO_vendor_support hpilo hpwdt sg bnx2x libcrc32c mdio serio_raw lpc_ich mfd_core shpchp ext4 jbd2 mbcache sd_mod crc_t10dif hpsa video output dm_mirror dm_region_hash dm_log dm_mod [last unloaded: scsi_wait_scan] Pid: 7355, comm: bnx2fc_thread/3 Not tainted 2.6.32-431.el6.x86_64 #1 HP ProLiant BL460c Gen8 RIP: 0010:[<ffffffffa03130da>] [<ffffffffa03130da>] bnx2fc_init_task+0x6a/0x230 [bnx2fc] RSP: 0018:ffff8820b0da3b68 EFLAGS: 00010246 RAX: 0000000000000000 RBX: ffff882003801080 RCX: 0000000000000000 RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff882003801100 RBP: ffff8820b0da3bc8 R08: ffffffff8160d4e8 R09: 0000000000000040 R10: 0000000000000000 R11: 0000000000000000 R12: ffff88400e600e00 R13: ffff8840108fbe40 R14: ffff88200ffe5400 R15: 0000000000000000 FS: 0000000000000000(0000) GS:ffff8820b0da0000(0000) knlGS:0000000000000000 CS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b CR2: 000000000000004c CR3: 0000002010b67000 CR4: 00000000001407e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Process bnx2fc_thread/3 (pid: 7355, threadinfo ffff88401f940000, task ffff884012f5f540) Stack: ffff8820b0da3bc8 ffffffff81527303 ffff884000000020 ffff8820b0da3bd8 <d> ffff8820b0da3b98 000000028138931a ffff88400f506078 ffff88400e600e00 <d> ffff88200ffe5400 ffff88200ffe5590 0000000000000021 0000000000000002 Call Trace: <IRQ> [<ffffffff81527303>] ? printk+0x41/0x46 [<ffffffffa03169bc>] bnx2fc_post_io_req+0x11c/0x440 [bnx2fc] [<ffffffff812825b9>] ? cpumask_next_and+0x29/0x50 [<ffffffff8137ffd0>] ? scsi_done+0x0/0x60 [<ffffffffa0316df7>] bnx2fc_queuecommand+0x117/0x140 [bnx2fc] [<ffffffff81380245>] scsi_dispatch_cmd+0xe5/0x310 [<ffffffff81388b9e>] scsi_request_fn+0x5ee/0x7a0 [<ffffffff812658f1>] __blk_run_queue+0x31/0x40 [<ffffffff81265a40>] blk_run_queue+0x30/0x50 [<ffffffff81387da6>] scsi_run_queue+0xc6/0x270 [<ffffffff81260f92>] ? elv_requeue_request+0x52/0xa0 [<ffffffff813897a0>] scsi_requeue_command+0x90/0xb0 [<ffffffff81389b84>] scsi_io_completion+0x154/0x6c0 [<ffffffff8137ff62>] scsi_finish_command+0xc2/0x130 [<ffffffff8138a255>] scsi_softirq_done+0x145/0x170 [<ffffffff8126e865>] blk_done_softirq+0x85/0xa0 [<ffffffff8107a8e1>] __do_softirq+0xc1/0x1e0 [<ffffffff8100c30c>] ? call_softirq+0x1c/0x30 [<ffffffff8100c30c>] call_softirq+0x1c/0x30 <EOI> [<ffffffff8100fa75>] ? do_softirq+0x65/0xa0 [<ffffffff8107a40a>] local_bh_enable_ip+0x9a/0xb0 [<ffffffff8152a4eb>] _spin_unlock_bh+0x1b/0x20 [<ffffffffa0313937>] bnx2fc_process_cq_compl+0x257/0x2b0 [bnx2fc] [<ffffffffa03114ea>] bnx2fc_percpu_io_thread+0xea/0x160 [bnx2fc] [<ffffffffa0311400>] ? bnx2fc_percpu_io_thread+0x0/0x160 [bnx2fc] [<ffffffff8109aef6>] kthread+0x96/0xa0 [<ffffffff8100c20a>] child_rip+0xa/0x20 [<ffffffff8109ae60>] ? kthread+0x0/0xa0 [<ffffffff8100c200>] ? child_rip+0x0/0x20 Code: 89 df 45 8b 7e 30 0f 85 75 01 00 00 89 d1 31 c0 c1 e9 03 83 e2 04 89 c9 f3 48 ab 74 06 c7 07 00 00 00 00 49 89 9c 24 88 01 00 00 <83> 7e 4c 01 b8 01 00 00 00 0f 84 e7 00 00 00 89 c2 0a 53 38 41 RIP [<ffffffffa03130da>] bnx2fc_init_task+0x6a/0x230 [bnx2fc] RSP <ffff8820b0da3b68> CR2: 000000000000004c Signed-off-by: Maurizio Lombardi <mlombard@redhat.com> Acked-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-10megaraid_sas: fix bug in handling return value of pci_enable_msix_range()Jiang Liu
Function pci_enable_msix_range() may return negative values for error conditions. So it's a bug by checking (pci_enable_msix_range() != 0) for success and causes failure to megaraid driver when MSI is disabled. [ 16.487267] megaraid_sas 0000:02:00.0: Controller type: iMR [ 16.487275] genirq: Flags mismatch irq 0. 00000000 (megasas) vs. 00015a00 (tii mer) [ 16.487347] megasas: Failed to register IRQ for vector 0. Fixes: 8ae80ed1734b "megaraid: Use pci_enable_msix_range() instead of pci_enable_msix()" Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Sumit Saxena <sumit.saxena@avagotech.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: <stable@vger.kernel.org> # 3.17
2014-11-10cxgb4i: send abort_rpl correctlyAnish Bhatt
Connection retries were not being cleaned up correctly if they failed as a result of link down. Applies on top of drivers-for-3.18. Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: Karen Xie <kxie@chelsio.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-10cxgbi: add maintainer for cxgb3i/cxgb4iAnish Bhatt
Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-10scsi: TUR path is down after adapter gets reset with multipathwenxiong@linux.vnet.ibm.com
This patch fixes an issue with multipath ipr SAS devices which require a start unit command to be issued following an adapter reset. Without this patch, paths get marked failed following an adapter reset and since the error handler never gets invoked to issue the start unit, the paths are never recovered. Returning FAILED for this case ensures the error handler wakes up to issue the start unit. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Tested-by: Wen Xiong <wenxiong@linux.vnet.ibm.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-10scsi: call device handler for failed TUR commandChristoph Hellwig
Multipath devices using the TUR path checker need to see the sense code for a failed TUR command in their device handler. Since commit 14216561e164671ce147458653b1fea06a we always return success for mid layer issued TUR commands before calling the device handler, which stopped the TUR path checker from working. Move the call to the device handler check sense method before the early return for TUR commands to give the device handler a chance to intercept them. Signed-off-by: Christoph Hellwig <hch@infradead.org> Tested-by: Wen Xiong <wenxiong@linux.vnet.ibm.com> Reviewed-by: Hannes Reinecke <hare@suse.de>
2014-11-10scsi: only re-lock door after EH on devices that were resetChristoph Hellwig
Setups that use the blk-mq I/O path can lock up if a host with a single device that has its door locked enters EH. Make sure to only send the command to re-lock the door to devices that actually were reset and thus might have lost their state. Otherwise the EH code might be get blocked on blk_get_request as all requests for non-reset devices might be in use. Cc: stable@vger.kernel.org Signed-off-by: Christoph Hellwig <hch@lst.de> Reported-by: Meelis Roos <meelis.roos@ut.ee> Tested-by: Meelis Roos <meelis.roos@ut.ee> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
2014-11-10ARM: ebsa110: Properly override I/O accessorsThierry Reding
In order to override accessors properly they must be #define'd so that subsequent generic headers (the one for ARM and finally the architecture independent one) can properly detect it. While at it, make all accessors use volatile void __iomem * to avoid a slew of build warnings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-10x86, microcode, AMD: Fix ucode patch stashing on 32-bitBorislav Petkov
Save the patch while we're running on the BSP instead of later, before the initrd has been jettisoned. More importantly, on 32-bit we need to access the physical address instead of the virtual. This way we actually do find it on the APs instead of having to go through the initrd each time. Tested-by: Richard Hendershot <rshendershot@mchsi.com> Fixes: 5335ba5cf475 ("x86, microcode, AMD: Fix early ucode loading") Cc: <stable@vger.kernel.org> # v3.13+ Signed-off-by: Borislav Petkov <bp@suse.de>
2014-11-10mmc: core: use mmc_send_status to check hw_resetJohan Rudholm
Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-s3c: Check if clk_set_rate() succeedsMark Brown
It is possible that we may fail to set the clock rate, if we do so then log the failure and don't bother reprogramming the IP. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: atmel-mci: add runtime pm supportWenyou Yang
Add runtime pm support to atmel mci controller. Use runtime pm APIs to enable/disable atmel mci's clock. Use runtime autosuspend APIs to enable auto suspend delay. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> [Ulf: Fixed compile error]
2014-11-10mmc: mmc_test: Extend "Badly aligned" tests for 8-byte alignmentAdrian Hunter
The "Badly aligned" tests, test reading/writing with alignments of 1,2 and 3. SDHCI now has 64-bit ADMA which has 8-byte alignment, so extend the tests to test up to 7. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pci: Add 64-bit DMA supportAdrian Hunter
Set a 64-bit DMA mask when using 64-bit DMA. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-acpi: Add 64-bit DMA supportAdrian Hunter
Set the DMA mask during the first call to ->enable_dma() to make use of the SDHCI_USE_64_BIT_DMA flag. This patch is dependent on commit 8a2f38ddfeb526c30b3ec209468172a30a38d996 ("ACPI / platform: provide default DMA mask") which provides the dev->dma_mask pointer without which dma_set_mask_and_coherent() will always fail. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Add 64-bit ADMA supportAdrian Hunter
Add 64-bit ADMA support including: - add 64-bit ADMA descriptor - add SDHCI_USE_64_BIT_DMA flag - set upper 32-bits of DMA addresses - ability to select 64-bit ADMA - ability to use 64-bit ADMA sizes and alignment - display "ADMA 64-bit" when host is added It is assumed that a 64-bit capable device has set a 64-bit DMA mask and *must* do 64-bit DMA. A driver has the opportunity to change that during the first call to ->enable_dma(). Similarly SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to implement. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define ADMA descriptor structureAdrian Hunter
Define the ADMA descriptor structure instead of using manual offsets and casts. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define ADMA constantsAdrian Hunter
Define all the ADMA constants instead of having numbers scattered throughout the code. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define maximum segmentsAdrian Hunter
Define the maximum number of segments instead of having the constant 128 appearing in the code in various places. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Parameterize ADMA sizes and alignmentAdrian Hunter
In preparation for 64-bit ADMA, parameterize ADMA sizes and alignment. 64-bit ADMA has a larger descriptor because it contains a 64-bit address instead of a 32-bit address. Also data must be 8-byte aligned instead of 4-byte aligned. Consequently, sdhci_host members are added for descriptor, table, and buffer sizes and alignment. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Use 'void *' for not 'u8 *' for ADMA dataAdrian Hunter
It is kernel-style to use 'void *' for anonymous data. This is being applied to the ADMA bounce buffer which contains unaligned bytes, and to the ADMA descriptor table which will contain 32-bit ADMA descriptors or 64-bit ADMA descriptors when support is added. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Add sdhci_adma_mark_end()Adrian Hunter
In preparation for 64-bit ADMA, separate out code that touches the ADMA descriptor by adding sdhci_adma_mark_end(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Rename adma_desc to adma_tableAdrian Hunter
In preparation for 64-bit ADMA, rename adma_desc to adma_table. That is because members will be added for descriptor size and table size, so using adma_desc (which is the table) is confusing. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Rename two ADMA-related functions for consistencyAdrian Hunter
Rename sdhci_set_adma_desc to sdhci_adma_write_desc and sdhci_show_adma_error to sdhci_adma_show_error so that all ADMA functions start with sdhci_adma_. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix ADMA table size warningAdrian Hunter
The intent of the warning is to warn if the ADMA table overflows. However there can be one more 'end' entry so the condition should be adjusted accordingly. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix ADMA page boundary warningsAdrian Hunter
Bytes are being copied from/to a single page. The intent of the warning is to warn if the page boundary is crossed. There are two problems. First, PAGE_MASK is mistaken for (PAGE_SIZE - 1). Secondly, instead of using the number of bytes to copy, the warning is using the maximum that that value could be. Fix both. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix incorrect ADMA2 descriptor table sizeAdrian Hunter
The ADMA2 descriptor table size was being calculated incorrectly Fix it. Note that it has been wrong for a long time and likely has not caused any problems because of a combination of 1) not needing alignment descriptors for block operations 2) more memory being allocated than was requested 3) the use of SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC which does not use an extra descriptor for the end marker. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: host: atmel-mci: Add support for non-removable slotsTimo Kokkonen
Add support for non-removable slots which have no card detection GPIO and which should not be polled for a card change. Signed-off-by: Timo Kokkonen <timo.kokkonen@offcode.fi> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Document clocks and additional clock-names propertySebastian Hesselbarth
Now that sdhci-pxav3 driver allows to have more than one IP clock defined, document both clocks and clock-names properties. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Get optional core clockSebastian Hesselbarth
Besides the I/O clock, some PXAv3 SDHCI IP also requires a core clock to be enabled. Add an optional core clock to the corresponding driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Try to get named I/O clock firstSebastian Hesselbarth
With support for more than one clock, we'll need to distinguish between the clock by name. Change clock probing to first try to get "io" clock before falling back to unnamed clock. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Move I/O clock to private dataSebastian Hesselbarth
As we are using references to the I/O clock throughout the driver, move it to the private data. Also, in preparation for core clock, rename it to clk_io. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-of-arasan: Omit superfluous error messagesMike Looijmans
sdhci_add_host and sdhci_platfm_init already report failure, so don't emit error messages when a failure occurs. This prevents occurences of "deferred" messages when required power supplies are not ready for operation yet. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Convert to use kzalloc() for CXD register buffersUlf Hansson
While allocating buffers for CXD data, let's use kzalloc() to make sure those are zeroed. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Don't handle buffers on stack while fetching CXD registersUlf Hansson
Due to previous patches, all callers of mmc_send_cxd_data() now allocates their buffers from the heap. This enables us to simplify mmc_send_cxd_data() by removing the support of handling buffers, which are allocated from the stack. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Remove the redundant mmc_send_ext_csd() APIUlf Hansson
Previous patches has replaced the calls to mmc_send_ext_csd() into mmc_get_ext_csd(), thus mmc_send_ext_csd() has become redundant. Let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()Ulf Hansson
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease code duplication. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: block: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()Ulf Hansson
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease code duplication. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Export mmc_get_ext_csd()Ulf Hansson
Callers of mmc_send_ext_csd() will be able to decrease code duplication by using mmc_get_ext_csd() instead. Let's make it available. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Don't panic when fetching EXT_CSDUlf Hansson
Instead of doing BUG_ON(), return an error code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Let's callers of from mmc_get_ext_csd() do error handlingUlf Hansson
The callers of mmc_get_ext_csd() need the flexibility to handle errors themselves, because they behave differently. Let's clean up mmc_get_ext_csd() with its friends and adopt the error handling as stated above. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Fetch and decode EXT_CSD from mmc_read_ext_csd()Ulf Hansson
As a step in cleaning up code around reading/decoding EXT_CSD, convert the current mmc_read_ext_csd(), to handle both fetching the EXT_CSD and decoding its data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Add helper function for EXT_CSD supportUlf Hansson
The helper function mmc_can_ext_csd() will return a positive value if the card supports the EXT_CSD register. Start using it at relavant places in the mmc core. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Remove unnecessary 'out of memory' messageUlf Hansson
Rely on the prints handled internally by kmalloc(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Remove redundant check of max_dtr while selecting timingsUlf Hansson
If the MMC spec version is < CSD_SPEC_VER_4, there aren't support for the EXT_CSD register. Since max_dtr is fetched from there, it will default to zero, which thus isn't needed to verify. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Remove redundant check while selecting powerclassUlf Hansson
The validation of the buswidth and the MMC spec version in __mmc_select_powerclass() is redundant, let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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