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2021-12-15arm64: dts: mediatek: add pinctrl support for mt7986aSam Shih
Add mt7986a pinctrl node, and update pinmux setting for mt7986a Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211122123552.8218-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15arm64: dts: mt8183: kukui: Add Type C nodePrashant Malani
Add a node describing the USB Type C connector, in order to utilize the Chromium OS USB Type-C driver that enumerates Type-C ports and connected cables/peripherals and makes them visible to userspace. Cc: Alexandru M Stan <amstan@chromium.org> Cc: Benson Leung <bleung@chromium.org> Signed-off-by: Prashant Malani <pmalani@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Link: https://lore.kernel.org/r/20211209195112.366176-1-pmalani@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15arm64: dts: mediatek: add basic mt7986 supportSam Shih
Add basic chip support for Mediatek mt7986, include basic uart nodes, rng node and watchdog node. Add cpu node, timer node, gic node, psci and reserved-memory node for ARM Trusted Firmware. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211122123222.8016-3-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15dt-bindings: arm64: dts: mediatek: Add mt7986 seriesSam Shih
MT7986 series is Mediatek's new 4-core SoC, which is mainly for wifi-router application. The difference between mt7986a and mt7986b is that some pins do not exist on mt7986b. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211122123222.8016-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-12-15ARM: tegra: Enable video decoder on Tegra114Anton Bambura
Add Video Decoder Engine node to Tegra114 device-tree. Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: nexus7: Use common LVDS display device-treeMaxim Schwalm
Make Nexus 7 device-tree to use common LVDS bridge description. This makes device-trees more consistent. [digetx@gmail.com: factored Nexus7 change into separate patch and wrote commit message] Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add CPU thermal zones to Nyan device-treeDmitry Osipenko
CPU of Nyan Chromebooks is overheating badly because apparently hardware soctherm controller doesn't work well. Add CPU thermal zones to enable software thermal control over CPU and fix the overheat trouble. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Enable CPU DFLL on NyanDmitry Osipenko
Enable CPU DFLL node on Nyan Chromebooks. DFLL was previously disabled due to Linux kernel CPUFreq driver which didn't support suspend-resume. That problem was fixed years ago, but DFLL was never re-enabled. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Enable HDMI CEC on NyanDmitry Osipenko
Enable HDMI CEC on Nyan Chromebooks. It allows to control TV over HDMI. Suggested-by: Thomas Graichen <thomas.graichen@gmail.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add usb-role-switch property to USB OTG portsStefan Eichenberger
If an USB port is an OTG port, then we should add the usb-role-switch property. Otherwise XUSB setup fails and therefore padctl is unable to set up the ports. This leads to broken USB and PCIe ports. Add the usb-role-switch properties to Tegra124 device-trees to fix the problem. The error message shown without this patch is e.g: usb2-0: usb-role-switch not found for otg mode [digetx@gmail.com: improved commit message] Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for 1080p version of Nyan BigDmitry Osipenko
Add dedicated device-tree for 1080p version of Nyan Big in order to describe display panel properly. FHD panel doesn't support modes other than 1080p, hence it's wrong to use incompatible lower resolution panel in device-tree. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for Pegatron ChagallSvyatoslav Ryhel
Add device-tree for Pegatron Chagall, which is a NVIDIA Tegra30-based Android tablet. Link: https://wiki.postmarketos.org/wiki/Pegatron_Chagall_(pegatron-chagall) Co-developed-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com> Signed-off-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer Pad TF701TAnton Bambura
Add device-tree for Tegra114-based ASUS Transformer Pad TF701T (K00C) tablet. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(TF701T)_(asus-tf701t) Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer Infinity TF700TSvyatoslav Ryhel
Add device-tree for ASUS Transformer Infinity TF700T, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. Link: https://wiki.postmarketos.org/wiki/Asus_Transformer_Pad_Infinity_TF700T_(asus-tf700t) Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> Tested-by: Jasper Korten <jja2000@gmail.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Co-developed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer Pad TF300TGSvyatoslav Ryhel
Add device-tree for ASUS Transformer Pad TF300TG, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. It's a variant of the TF300T that has a 3G modem. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(asus-tf300t) Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer Pad TF300TMichał Mirosław
Add device-tree for ASUS Transformer Pad TF300T, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(asus-tf300t) Tested-by: Ihor Didenko <tailormoon@rambler.ru> Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer Prime TF201Svyatoslav Ryhel
Add device-tree for ASUS Transformer Prime TF201, which is a NVIDIA Tegra30-based 2-in-1 detachable, orignally running Android. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Prime_(asus-tf201) Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add common device-tree for LVDS display panels of Tegra30 ASUS ↵Maxim Schwalm
tablets All Tegra30 ASUS tablets have a similar design pattern in terms of hardware integration of LVDS display panels, like exactly the same GPIOs are used for power and reset, etc. Add a common device-tree for LVDS display panels of Tegra30 ASUS tablets to avoid replicating the boilerplate panel description. [digetx@gmail.com: factored out common part into separate patch and wrote commit message] Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add common device-tree base for Tegra30 ASUS TransformersSvyatoslav Ryhel
Add common DTSI for Tegra30 ASUS Transformers. It will be used by multiple device-trees of ASUS devices. The common part initially was born out of the ASUS TF300T tablet's device-tree that was created by Michał Mirosław. It was heavily reworked and improved by Svyatoslav Ryhel, Maxim Schwalm, Ion Agorria et al. [digetx@gmail.com: factored out common part into separate patch and wrote commit message] Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Co-developed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add device-tree for ASUS Transformer EeePad TF101Nikola Milosavljevic
Add device-tree for Tegra20-based ASUS Transformer EeePad TF101. Link: https://wiki.postmarketos.org/wiki/ASUS_Eee_Pad_Transformer_(asus-tf101) Co-developed-by: David Heidelberg <david@ixit.cz> Signed-off-by: David Heidelberg <david@ixit.cz> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Co-developed-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> Signed-off-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> Signed-off-by: Nikola Milosavljevic <mnidza@outlook.com> Co-developed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Avoid phandle indirection on OuyaThierry Reding
Move the default state pinmux definition into the pinmux node. There's no need for the indirection via the phandle. Note that the phandle indirection is kept for the EMC operating performance point tables because they reference nodes that are defined in an external file. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Fix I2C mux reset GPIO reference on CardhuThierry Reding
Use the correct "reset-gpios" property for the I2C mux reset GPIO reference instead of the deprecated "reset-gpio" property. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Fix SLINK compatible string on Tegra30Thierry Reding
The SLINK controller found on Tegra30 is not compatible with its predecessor found on Tegra20. Drop the fallback compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Remove stray #reset-cells propertyThierry Reding
The Ouya board specifies the #reset-cells property for the GPIO controller. Since the GPIO controller doesn't provide reset controls this is not needed, so they can be dropped. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: nexus7: Drop clock-frequency from NFC nodeDavid Heidelberg
The clock-frequency property was never used and is deprecated now. Remove it from Nexus 7 device-tree. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Remove unsupported properties on ApalisThierry Reding
The +V1.2_VDD_CORE regulator on Apalis and Colibri boards uses the unsupported ti,vsel{0,1}-state-low properties. It turns out that these are in fact the default and can be overridden by ti,vsel{0,1}-state-high properties if needed. Drop them since they are not needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Use correct vendor prefix for InvensenseThierry Reding
The correct vendor prefix for Invensense is "invensense," rather than "invn,". Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add dummy backlight power suppliesThierry Reding
The Medcom Wide and PAZ00 boards don't specify the power supply for the backlight, which means that the Linux driver will provide a dummy one. Wire up an explicit dummy to also make the DT schema validation succeed. Unfortunately I don't have access to the schematics for the Medcom Wide, so I don't know if a more accurate description is possible. The AC100 (PAZ00) schematics from here: https://www.s-manuals.com/pdf/motherboard/compal/compal_la-6352p_r1.0a_schematics.pdf aren't entirely clear which one of the supplies powers backlight, but the panel supply is probably close enough. Based on work by David Heidelberg <david@ixit.cz>. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Remove PHY reset GPIO references from USB controller nodeThierry Reding
The PHY reset GPIO references belong in the USB PHY nodes, where they already exist. There is no need to keep them in the USB controller's device tree node as well. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add compatible string for built-in ASIX on Colibri boardsThierry Reding
The device tree node for the built-in ASIX Ethernet device on Colibri boards needs a compatible string in order to pass DT schema validation. Add the USB VID,PID compatible string as required by the DT schema for USB devices. Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15dt-bindings: arm: samsung: document jackpotlte board bindingDavid Virag
Add binding for the jackpotlte board (Samsung Galaxy A8 (2018)). Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211206153124.427102-4-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-15Merge tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux into ↵Arnd Bergmann
arm/dt Apple SoC DT updates for 5.17, round 2: - Various cleanups (removing useless props, sorting nodes, renaming things) - Add PMGR min-state binding & props (see PMGR pull for driver change) - Initial compatibles for t600x machines (M1 Pro/Max). This covers the bindings that just need compatible bumps & minor tweaks, no driver changes. - Add watchdog node (driver not merged yet, hopefully will be; binding went in the previous pull) - Add missing power-domains property to the mailbox binding * tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux: dt-bindings: mailbox: apple,mailbox: Add power-domains property arm64: dts: apple: t8103: Sort nodes by address arm64: dts: apple: t8103: Rename clk24 to clkref arm64: dts: apple: t8103: Add watchdog node dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible dt-bindings: pci: apple,pcie: Add t6000 support dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop arm64: dts: apple: t8103: Remove PCIe max-link-speed properties Link: https://lore.kernel.org/r/a24faafd-f2ae-c3a7-5327-b27da7d9e34b@marcan.st Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15Merge tag 'stm32-dt-for-v5.17-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.17, round 1 Highlights: ---------- -MCU: - fix ili9341 for dtbs_check warnings on stm32f429 disco. - MPU: - ST boards: - tune HS USB phys on stm32mp15 EV1 and DKx boards. - add pull-up on USART3/UART7 RX pins on STM32MP15 DKx boards. - use correct pinctrl setting for STUSB1600 on STM32MP15 DK boards. - ENGICAM: - enable LVDS pannel on i.Core STM32MP1 EDIMM2.2. - add "i.Core STM32MP1 C.TOUCH 2.0 10.1" OF" support: EDIMM compliant general purpose carrier board with ETH 10/100, WIFI/BT, CAN, ... * tag 'stm32-dt-for-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2 ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1 ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15 ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 disco Link: https://lore.kernel.org/r/dfe942db-5af7-bb82-22b6-3bd866c9017d@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15dt-bindings: mailbox: apple,mailbox: Add power-domains propertyHector Martin
This will bind to the PMGR pwrstate nodes that control power/clock gating to SoC blocks. The mailbox driver doesn't do runtime-pm yet, so initially this will just keep the domain on permanently. Reviewed-by: Sven Peter <sven@svenpeter.dev> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15arm64: dts: apple: t8103: Sort nodes by addressHector Martin
We decided to keep SoC nodes sorted by address for sanity; fix a couple that slipped into the wrong place. Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15arm64: dts: apple: t8103: Rename clk24 to clkrefHector Martin
We now know that this frequency comes from the external reference oscillator and is used for various SoC blocks, and isn't just a random 24MHz clock, so let's call it something more appropriate. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15Merge branch 'for-v5.17/dt-usi' into next/dt64Krzysztof Kozlowski
2021-12-15dt-bindings: soc: samsung: Fix I2C clocks order in USI binding exampleSam Protsenko
Now that HSI2C binding [1] is converted to dt-schema format, it reveals incorrect HSI2C clocks order in USI binding example: .../exynos-usi.example.dt.yaml: i2c@13820000: clock-names:0: 'hsi2c' was expected From schema: .../i2c-exynos5.yaml .../exynos-usi.example.dt.yaml: i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected From schema: .../i2c-exynos5.yaml Change HSI2C clock order in USI binding example to satisfy HSI2C binding requirements and fix above warnings. [1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211214170924.27998-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-14ARM: dts: qcom: sdx65: Add pincontrol nodeVamsi krishna Lanka
This commit adds pincontrol node to SDX65 dts. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1635552125-16407-4-git-send-email-quic_vamslank@quicinc.com
2021-12-14ARM: dts: qcom: Add SDX65 platform and MTP board supportVamsi krishna Lanka
Add basic devicetree support for SDX65 platform and MTP board from Qualcomm. The SDX65 platform features an ARM Cortex A7 CPU which forms the Application Processor Sub System (APSS) along with standard Qualcomm peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem etc.. This commit adds basic devicetree support that includes GCC, RPMh clock, INTC and Debug UART. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1635552125-16407-3-git-send-email-quic_vamslank@quicinc.com
2021-12-14dt-bindings: arm: qcom: Document SDX65 platform and boardsVamsi krishna Lanka
Document the SDX65 platform binding and also the boards using it. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1635552125-16407-2-git-send-email-quic_vamslank@quicinc.com
2021-12-14Merge tag ↵Bjorn Andersson
'e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com' into dts-for-5.17 v5.16-rc1 + e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com Merge the immutable branch containing the DT binding and clock definitions to be used in the SDX65 dts files.
2021-12-14dt-bindings: clock: Add SDX65 GCC clock bindingsVamsi krishna Lanka
Add device tree bindings for global clock controller on SDX65 SOCs. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-14ARM: tegra: Avoid pwm- prefix in pinmux nodesThierry Reding
The "pwm-" prefix currently matches the DT schema for PWM controllers and throws an error in that case. This is something that should be fixed in the PWM DT schema, but in this case we can also preempt any such conflict by naming the nodes after the pins like we do for many others of these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Sort Tegra124 XUSB clocks correctlyThierry Reding
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Drop unused AHCI clocks on Tegra124Thierry Reding
The CML1 and PLL_E clocks are never explicitly used by the AHCI controller found on Tegra124, so drop them from the corresponding device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Fix Tegra124 I2C compatible string listThierry Reding
The I2C controller found on Tegra124 is not fully compatible with the Tegra114 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Rename CPU and EMC OPP table device-tree nodesDmitry Osipenko
OPP table name now should start with "opp-table" and OPP entries shouldn't contain commas and @ signs in accordance to the new schema requirement. Reorganize CPU and EMC OPP table device-tree nodes. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Rename thermal zone nodesThierry Reding
The DT schema requires that nodes representing thermal zones include a "-thermal" suffix in their name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Drop reg-shift for Tegra HS UARTThierry Reding
When the Tegra High-Speed UART is used instead of the regular UART, the reg-shift property is implied from the compatible string and should not be explicitly listed. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit (git 2.34.1) at 2025-10-03 08:44:13 +0000