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2024-06-19Merge drm/drm-next into drm-intel-nextJani Nikula
Sync to v6.10-rc3. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-19intel_alpm: Fix wrong offset for PORT_ALPM_* registersJouni Högander
PORT_ALPM_* registers are using MMIO_TRANS2 macro. This is not correct as they are port register. Use _PORT_MMIO instead. Fixes: 4ee30a448255 ("drm/i915/alpm: Add ALPM register definitions") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-10-jouni.hogander@intel.com
2024-06-19Revert "drm/i915/psr: Disable early transport by default"Jouni Högander
This reverts commit f3c2031db7dfdf470a2d9bf3bd1efa6edfa72d8d. We want to notice possible issues faced with PSR2 Region Early Transport as early as possible -> let's revert patch disabling Region Early Transport by default. Also eDP 1.5 Panel Replay requires Early Transport. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-9-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Add new debug bit to disable Panel ReplayJouni Högander
Add new debug bit to be used with i915_edp_psr_debug debugfs interface. This can be used to disable Panel Replay. v2: ensure that fastset is performed when the bit changes Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-8-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR onlyJouni Högander
Enabling/disabling Panel Replay on sink side has to be done before link training. We can't disable it in sink side on PSR disable. Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-7-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is setJouni Högander
Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake if panel supports it despite enable_psr module parameter value. This patch makes it possible for user to limit used PSR mode and prevent SU Region Early Transport by setting enable_psr as 2. With default (-1) PSR2 SU Region Early Transport is allowed. v2: fix/improve commit desciption Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-6-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameterJouni Högander
If user is specifically limiting PSR mode to PSR1 or PSR2: disable Panel Replay. With default value -1 all modes are allowed including Panel Replay. Disabling PSR using value 0 disables Panel Replay as well. Also own compute config helper is added for Panel Replay. This makes sense because number of Panel Replay specific checks are increasing. v2: Squash adding Panel Replay compute config helper Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-5-jouni.hogander@intel.com
2024-06-19drm/i915/alpm: Fix port clock usage in AUX Less wake time calculationJouni Högander
Port clock is link rate in 10 kbit/s units. Take this into account when calculating AUX Less wake time. Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-4-jouni.hogander@intel.com
2024-06-19drm/i915/display: Wa 16021440873 is writing wrong registerJouni Högander
Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT write CURPOS_ERLY_TPT. v2: use right offset as well Fixes: 29cdef8539c3 ("drm/i915/display: Implement Wa_16021440873") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-3-jouni.hogander@intel.com
2024-06-19drm/i915/psr: Set SU area width as pipe src widthJouni Högander
Currently SU area width is set as MAX_INT. This is causing problems. Instead set it as pipe src width. Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-2-jouni.hogander@intel.com
2024-06-18drm/xe/oa: Enable Xe2+ overrun modeAshutosh Dixit
Enable Xe2+ overrun mode. For Xe2+, when overrun mode is enabled, there are no partial reports at the end of buffer, making the OA buffer effectively a non-power-of-2 size circular buffer whose size, circ_size, is a multiple of the report size. v2: Fix implementation of xe_oa_circ_diff/xe_oa_circ_incr (Umesh) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-18-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: Changes to OA_TAKENAshutosh Dixit
Rename OA_TAKEN to xe_oa_circ_diff, since xe_oa_circ_diff better describes what the macro actually does. Also convert to function and add xe_oa_stream arg. These will be used in the following patch. Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-17-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: Override GuC RC with OA on PVCAshutosh Dixit
On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since OA does not expect engine resets during its use. Fix it by disabling RC6. v2: Convert to gt oriented error/warn messages (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-16-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: Add MMIO trigger supportAshutosh Dixit
Add MMIO trigger support and allow-list required registers for MMIO trigger use case. Registers are whitelisted for the lifetime of the driver but MMIO trigger is enabled only for the duration of the stream. Bspec: 45925, 60340, 61228 Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-15-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: OA buffer mmapAshutosh Dixit
Allow the OA buffer to be mmap'd to userspace. This is needed for the MMIO trigger use case. Even otherwise, with whitelisted OA head/tail ptr registers, userspace can receive/interpret OA data from the mmap'd buffer without issuing read()'s on the OA stream fd. v2: Remove unmap_mapping_range from xe_oa_release (Thomas H) Use vm_flags_mod (Umesh) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-14-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Query OA unit propertiesAshutosh Dixit
Implement query for properties of OA units present on a device. v2: Clean up reserved/pad fields (Umesh) Follow the same scheme as other query structs v3: Skip reporting reserved engines attached to OA units v4: Expose oa_buf_size via DRM_XE_PERF_IOCTL_INFO (Umesh) v5: Don't expose capabilities as OR of properties (Umesh) v6: Add extensions to query output structs: drm_xe_oa_unit, drm_xe_query_oa_units and drm_xe_oa_stream_info v7: Change oa_units[] array to __u64 type Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-13-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: Add OAC supportAshutosh Dixit
Similar to OAR, allow userspace to execute MI_REPORT_PERF_COUNT on compute engines of a specified exec queue. Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-12-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: Add OAR supportAshutosh Dixit
Add OAR support to allow userspace to execute MI_REPORT_PERF_COUNT on render engines. Configuration batches are used to program the OAR unit, as well as modifying the render engine context image of a specified exec queue (to have correct register values when that context switches in). v2: Rename/refactor xe_oa_modify_self (Umesh) v3: Move IS_MI_LRI_CMD() into xe_oa.c (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-11-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Read file_operationAshutosh Dixit
Implement the OA stream read file_operation. Both blocking and non-blocking reads are supported. As part of read system call, the read copies OA perf data from the OA buffer to the user buffer, after appending packet headers for status and data packets. v2: Drop OA report headers, implement DRM_XE_PERF_IOCTL_STATUS (Umesh) v3: Introduce 'struct drm_xe_oa_stream_status' v4: Define oa_status register bitfields (Umesh) v5: Add extensions to 'struct drm_xe_oa_stream_status' v6: Minor cleanup, eliminate report32 variable v7: Use -EIO to signal to userspace to read OASTATUS using DRM_XE_PERF_IOCTL_STATUS, change previous sites returning -EIO to return -EINVAL Make drm_xe_oa_stream_status bits contiguous (Jose, Umesh) rmw oa_status bits (Umesh) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-10-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Expose OA stream fdAshutosh Dixit
The OA stream open perf op returns an fd with its own file_operations for the newly initialized OA stream. These file_operations allow userspace to enable or disable the stream, as well as apply a different metric configuration for the OA stream. Userspace can also poll for data availability. OA stream initialization is completed in this commit by enabling the OA stream. When sampling is enabled this starts a hrtimer which periodically checks for data availablility. v2: Use stream properties for stream reconfiguration with DRM_XE_PERF_IOCTL_CONFIG v3: Hold runtime_pm reference across oa buffer alloc/free v4: Fix 32 bit build Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-9-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa: OA stream initialization (OAG)Ashutosh Dixit
Implement majority of OA stream initialization (as part of OA stream open) ioctl). OAG buffer is allocated for receiving perf counter samples from HW. OAG unit is initialized and the selected OA metric configuration is programmed into OAG unit HW using a command/batch buffer. Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-8-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Define and parse OA stream propertiesAshutosh Dixit
Properties for OA streams are specified by user space, when the stream is opened, as a chain of drm_xe_ext_set_property struct's. Parse and validate these stream properties. v2: Remove struct drm_xe_oa_open_param (Harish Chegondi) Drop DRM_XE_OA_PROPERTY_POLL_OA_PERIOD_US (Umesh) Eliminate comparison with xe_oa_max_sample_rate (Umesh) Drop 'struct drm_xe_oa_record_header' (Umesh) v3: s/DRM_XE_OA_PROPERTY_OA_EXPONENT/ \ DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT/ (Jose) v4: Fix 32 bit build v5: Add non-static function kernel doc (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-7-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Add/remove OA config perf opsAshutosh Dixit
Introduce add/remove config perf ops for OA. OA configurations consist of a set of event/counter select register address/value pairs. The add_config perf op validates and stores such configurations and also exposes them in the metrics sysfs. These configurations will be programmed to OA unit HW when an OA stream using a configuration is opened. The OA stream can also switch to other stored configurations. v2: Start config id's from 1 and other minor review comments (Umesh) v3: Add 32 bit build v4: Add kernel doc for non-static functions (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-6-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Initialize OA unitsAshutosh Dixit
Initialize OA unit data struct's for each gt during device probe. Also assign OA units for hardware engines. v2: Remove XE_OA_UNIT_OAG/XE_OA_UNIT_OAM_SAMEDIA_0 enum (Umesh) Change mtl_oa_base to 0x13000 (Umesh) v3: Switch to drmm_ functions and other cleanups (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-5-ashutosh.dixit@intel.com
2024-06-18drm/xe/oa/uapi: Add OA data formatsAshutosh Dixit
Add and initialize supported OA data formats for various platforms (including Xe2). User can request OA data in any supported format. Bspec: 52198, 60942, 61101 v2: Start 'xe_oa_format_name' enum from 0 (Umesh) Fix error rewind with OA (Umesh) v3: Use graphics versions rather than absolute platform names v4: Add missing kernel doc for struct memebers and enum and other minor changes (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-4-ashutosh.dixit@intel.com
2024-06-18drm/xe/perf/uapi: Add perf_stream_paranoid sysctlAshutosh Dixit
Normally only superuser/root can access perf counter data. However, superuser can set perf_stream_paranoid sysctl to 0 to allow non-privileged users to also access perf data. perf_stream_paranoid is introduced at the perf layer to allow different perf stream types to share this access mechanism. v2: Add kernel doc for non-static functions (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-3-ashutosh.dixit@intel.com
2024-06-18drm/xe/perf/uapi: "Perf" layer to support multiple perf counter stream typesAshutosh Dixit
In Xe, the plan is to support multiple types of perf counter streams (OA is only one type of these streams). Rather than introduce NxM ioctls for these (N perf streams with M ioctl's per perf stream), we decide to multiplex these (N different stream types and the M ops for each of these stream types) through a single PERF ioctl. This multiplexing is the purpose of the PERF layer. In addition to PERF DRM ioctl's, another set of ioctl's on the PERF fd are defined. These are expected to be common to different PERF stream types and therefore defined at the PERF layer itself. v2: Add param_size to 'struct drm_xe_perf_param' (Umesh) v3: Rename 'enum drm_xe_perf_ops' to 'enum drm_xe_perf_ioctls' (Guy Zadicario) Add DRM_ prefix to ioctl names to indicate uapi names v4: Add 'enum drm_xe_perf_op' previously missed out (Guy Zadicario) v5: Squash the ops and PERF layer patches into a single patch (Umesh) Remove param_size from struct 'drm_xe_perf_param' (Umesh) v6: Add DRM_XE_PERF_IOCTL_STATUS v7: Add DRM_XE_PERF_IOCTL_INFO v8: Fix Copyright years, fix DRM_XE_PERF_TYPE_MAX, move '#include "xe_perf.h"' to xe_perf.c, add kernel doc (Michal) Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Guy Zadicario <gzadicario@habana.ai> Acked-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-2-ashutosh.dixit@intel.com
2024-06-18drm/xe/xe2: Add proper check for media in Wa_14020756599Lucas De Marchi
A temporary fixup was made in commit 24d0d98af1c3 ("drm/xe/xe2lpm: Fixup Wa_14020756599") due to limitations in the RTP infra. Now that RTP has support for OR condition that change can be removed. RTP now also supports checking any GT, so use that instead of the more specific xe_rtp_match_when_media2000() used in that commit. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618050044.324454-6-lucas.demarchi@intel.com
2024-06-18drm/xe/rtp: Add match on any GTLucas De Marchi
One surprising factor of GRAPHICS_VERSION()/MEDIA_VERSION() matching for people adding new WAs is that it implicitly checks that the graphics/media IP under check is of that specific type and not that the device contains a media/graphics IP of that version. Add a new *_ANY_GT() variant that can be used in that case. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618050044.324454-5-lucas.demarchi@intel.com
2024-06-18drm/xe/rtp: Allow to OR rulesLucas De Marchi
Some workarounds started to depend on different set of conditions where the action should be applied if any of them match. See e.g. commit 24d0d98af1c3 ("drm/xe/xe2lpm: Fixup Wa_14020756599"). Add XE_RTP_MATCH_OR that allows to implement a logical OR for the rules. Normal precedence applies: r1, r2, OR, r3 means (r1 AND r2) OR r3 The check is shortcut as soon as a set of conditions match. v2: Do not match on empty number of rules-other-than-OR evaluated Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618050044.324454-4-lucas.demarchi@intel.com
2024-06-18drm/xe/rtp: Expand max rules/actions per entryLucas De Marchi
Having at most 4 rules per entry is already reaching the maximum. Expand it to 6 to allow for more room. With the addition of OR condition for rules, this will very soon not be sufficient. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618050044.324454-3-lucas.demarchi@intel.com
2024-06-18drm/xe/rtp: Allow to match 0 sr entriesLucas De Marchi
If none of the rules match, there should be 0 entries in the sr xarray, so none of them should have a register matching. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618050044.324454-2-lucas.demarchi@intel.com
2024-06-18drm/panic: depends on !VT_CONSOLEJocelyn Falempe
The race condition between fbcon and drm_panic can only occurs if VT_CONSOLE is set. So update drm_panic dependency accordingly. This will make it easier for Linux distributions to enable drm_panic by disabling VT_CONSOLE, and keeping fbcon terminal. The only drawback is that fbcon won't display the boot kmsg, so it should rely on userspace to do that. At least plymouth already handle this case with https://gitlab.freedesktop.org/plymouth/plymouth/-/merge_requests/224 Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240613154041.325964-1-jfalempe@redhat.com
2024-06-18drm/xe/vf: Don't touch GuC irq registers if using memory irqsMichal Wajdeczko
On platforms where VFs are using memory based interrupts, we missed invalid access to no longer existing interrupt registers, as we keep them marked with XE_REG_OPTION_VF. To fix that just either setup memirq vectors in GuC or enable legacy interrupts. Fixes: aef4eb7c7dec ("drm/xe/vf: Setup memory based interrupts in GuC") Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240617154736.685-1-michal.wajdeczko@intel.com
2024-06-18drm: Add DRM_MODE_TV_MODE_MONOCHROMENick Hollinghurst
Add this as a value for enum_drm_connector_tv_mode, represented by the string "Mono", to generate video with no colour encoding or bursts. Define it to have no pedestal (since only NTSC-M calls for a pedestal). Change default mode creation to acommodate the new tv_mode value which comprises both 525-line and 625-line formats. Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240216184857.245372-2-dave.stevenson@raspberrypi.com
2024-06-18drm/xe: Allow const pointer when checking SR-IOV modeMichal Wajdeczko
It seems that more and more parts of the driver code rely on having only a const pointer to the xe_device. Allow to check SR-IOV mode in that code as well. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240617122613.553-1-michal.wajdeczko@intel.com
2024-06-18drm/tidss: Add drm_panic supportJavier Martinez Canillas
Add support for the drm_panic infrastructure, which allows to display a user friendly message on the screen when a Linux kernel panic occurs. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240615085326.1726262-1-javierm@redhat.com
2024-06-17drm/xe/exec_queue: Rename xe_exec_queue::compute to xe_exec_queue::lrFrancois Dugast
The properties of this struct are used in long running context so make that clear by renaming it to lr, in alignment with the rest of the code. Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240613170348.723245-1-francois.dugast@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-06-17drm/i915/display: Update calculation to avoid overflowMitul Golani
Update calculation to avoid overflow. -v2: Remove extra line between cc and signed-off. Fixes: 1676ecd303ac ("drm/i915: Compute CMRR and calculate vtotal") Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240614044213.377710-1-mitulkumar.ajitkumar.golani@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-06-17drm/nouveau: Constify struct nouveau_job_opsChristophe JAILLET
"struct nouveau_job_ops" is not modified in these drivers. Constifying this structure moves some data to a read-only section, so increase overall security. In order to do it, "struct nouveau_job" and "struct nouveau_job_args" also need to be adjusted to this new const qualifier. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 5570 152 0 5722 165a drivers/gpu/drm/nouveau/nouveau_exec.o After: ===== text data bss dec hex filename 5630 112 0 5742 166e drivers/gpu/drm/nouveau/nouveau_exec.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Danilo Krummrich <dakr@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/860e9753d7867aa46b003bb3d0497f1b04065b24.1718381285.git.christophe.jaillet@wanadoo.fr
2024-06-17nouveau: rip out busy fence waitsDave Airlie
I'm pretty sure this optimisation is actually not a great idea, and is racy with other things waiting for fences. Just nuke it, there should be no need to do fence waits in a busy CPU loop. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Ben Skeggs <bskeggs@nvidia.com> Signed-off-by: Danilo Krummrich <dakr@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240417054032.3145721-1-airlied@gmail.com
2024-06-17drm/ci: add tests on vkmsVignesh Raman
Add job that runs igt on top of vkms. Acked-by: Maíra Canal <mcanal@igalia.com> Acked-by: Helen Koike <helen.koike@collabora.com> Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com> Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com> Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Helen Koike <helen.koike@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240614161835.55553-1-vignesh.raman@collabora.com
2024-06-17drm/i915/display: update handling of FBC when VT-d active workaroundVinod Govindapillai
Move the handling of the disabling FBC when VT-d is active wa as part of the intel_fbc_check_plane(). As the hw is still there, intel_fbc_sanitize should be able to handle the state properly. v2: update the patch description (Jani Nikula) v3: fix the return value in wa handling (Jani Nikula) Bspec: 21664 Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240528114826.134958-1-vinod.govindapillai@intel.com
2024-06-17drm/i915: move comments about FSB straps to proper placeJani Nikula
Move the comment about FSB straps to where the relevant register is read. Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8a5b6cd3db80259c30263861f1a9ff04fea2e7f0.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915/cdclk: use i9xx_fsb_freq() for rawclk_freq initializationJani Nikula
Instead of duplicating the CLKCFG parsing, reuse i9xx_fsb_freq() to figure out rawclk_freq where applicable. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/21511f155f1f446e066117bc6ed3165618d7afd6.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915: use i9xx_fsb_freq() for GT clock frequencyJani Nikula
Reuse i9xx_fsb_freq() for GT clock frequency initialization instead of depending on rawclk_freq. Note: If the init order was changed, we could use i915->fsb_freq directly. However, GT clock initialization is done in i915_driver_mmio_probe(), but intel_dram_detect() later in i915_driver_hw_probe(), with a dependency on intel_pcode_init(). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0678d8ec9772725b47d4fa5b14e3b3a34256d5cf.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915: extend the fsb_freq initialization to more platformsJani Nikula
Initialize fsb frequency for more platforms to be able to use it for GT clock and rawclk frequency initialization. Note: There's a discrepancy between existing pnv_fsb_freq() and i9xx_hrawclk() regarding CLKCFG interpretation. Presume all PNV is mobile. Default to 1333 MHz for unknown values, similar to i9xx_hrawclk(). v2: - Add MISSING_CASE() (Ville) - Default to the same frequency for both branches (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/7cd6dbd4dafb900ac1dd12be0ec096ff1d5fc6cf.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915: convert fsb_freq and mem_freq to kHzJani Nikula
We'll want to use fsb frequency for deriving GT clock and rawclk frequencies in the future. Increase the accuracy by converting to kHz. Do the same for mem freq to be aligned. Round the frequencies ending in 666 to 667. v2: Also handle mem_freq in gen5_rps_init() (Ville) Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/17fe2544b876549f63fac0f956273f5f282081b3.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915/gt: remove mem freq from gt debugfsJani Nikula
It's a bit out of place, and only printed for VLV/CHV. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/bbfec4c67a81d1d3de1f40484a80b7164e69df21.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-17drm/i915/dram: rearrange mem freq initJani Nikula
Follow the same style in mem freq init as in fsb freq init, returning the value instead of assigning in multiple places. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f098ccdbb0c42016d5dad81e0b089bb4babe29f0.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>