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2016-10-04WATCHDOG: txx9wdt: Add missing clock (un)prepare calls for CCFGeert Uytterhoeven
While the custom minimal TXx9 clock implementation doesn't need or use clock (un)prepare calls (they are dummies if !CONFIG_HAVE_CLK_PREPARE), they are mandatory when using the Common Clock Framework. Hence add them, to prepare for the advent of CCF. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14238/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: TXx9: tx49xx: Move GPIO setup from .mem_setup() to .arch_init()Geert Uytterhoeven
txx9_gpio_init() calls gpiochip_add_data(), which fails with -ENOMEM as it is called too early in the boot process. This causes all subsequent GPIO operations to fail silently (before commit 54d77198fdfbc4f0 ("gpio: bail out silently on NULL descriptors") it printed the error message "gpiod_direction_output_raw: invalid GPIO" on RBTX49[23]7). Postpone all GPIO setup to .arch_init() time to fix this. Suggested-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-gpio@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14237/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: TXx9: tx39xx: Move GPIO setup from .mem_setup() to .arch_init()Geert Uytterhoeven
txx9_gpio_init() calls gpiochip_add_data(), which fails with -ENOMEM as it is called too early in the boot process. This causes all subsequent GPIO operations to fail silently. Postpone all GPIO setup to .arch_init() time to fix this. Suggested-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-gpio@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13967/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Squash lines for simple wrapper functionsMasahiro Yamada
Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14260/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Add RTC support for Loongson1C boardYang Ling
The patch adds RTC support for Loongson1C board, and enable the external crystal when the RTC is first powered up. Signed-off-by: Yang Ling <gnaygnil@gmail.com> Cc: keguang.zhang@gmail.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14214/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Migrate exception table users off module.h and onto extable.hPaul Gortmaker
These files were only including module.h for exception table related functions. We've now separated that content out into its own file "extable.h" so now move over to that and avoid all the extra header content in module.h that we don't really need to compile these files. In the case of traps.c we can't dump the module.h include since it is also used to provide "print_modules". Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Lantiq: Make xrx200_phy_fw explicitly non-modularPaul Gortmaker
The Kconfig currently controlling compilation of this code is: arch/mips/lantiq/Kconfig:config XRX200_PHY_FW arch/mips/lantiq/Kconfig: bool "XRX200 PHY firmware loader" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. We don't replace module.h with init.h since the file doesn't need that. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13932/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Lantiq: Make vmmc explicitly non-modularPaul Gortmaker
The Makefile entry controlling compilation of this code is: arch/mips/lantiq/xway/vmmc.o ---> arch/mips/lantiq/xway/Makefile:obj-y += vmmc.o ...meaning that it currently is not being built as a module by anyone. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We replace module.h with export.h since the file does actually use EXPORT_SYMBOL. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13930/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: ralink: Make timer explicitly non-modularPaul Gortmaker
The Makefile entry controlling compilation of this code is "obj-y" meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. We don't replace module.h with init.h since the file already has that. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13931/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BCM47xx: Make serial explicitly non-modularPaul Gortmaker
The Makefile entry controlling compilation of this code is "obj-y" meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: "Rafał Miłecki" <zajec5@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13933/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Delete unused file smp-gic.cMatt Redfearn
Commit 7eb8c99db26c ("MIPS: Delete smp-gic.c") removed the file from the Makefile and the option to build it from KConfig, but left the file itself floating in the tree. Remove the unused source file. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Qais Yousef <qsyousef@gmail.com> Cc: paul.burton@imgtec.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13883/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: pistachio: Remove ANDROID_TIMED_OUTPUT from defconfig.Fabian Frederick
According to commit 9f6b68774f29 ("android: remove timed output/gpio driver") Signed-off-by: Fabian Frederick <fabf@skynet.be> Cc: Rob Herring <robh@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13904/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: pci-mt7620: Delete unnecessary assignment for the field "owner"Markus Elfring
The field "owner" is set by the core. Thus delete an unneeded initialisation. Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Cc: John Crispin <john@phrozen.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Julia Lawall <julia.lawall@lip6.fr> Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: LKML <linux-kernel@vger.kernel.org> Cc: kernel-janitors@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13929/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Move identification of VP(E) into proc.c from smp-mt.cMatt Redfearn
The addition of VPE information to /proc/cpuinfo used to be in smp-mt.c. This file is not used by MIPS r6 kernels, so the Virtual Processor information was not present for these CPU types. Move the code to print VPE information into proc.c, add a case for MIPS r6 CPUS, and remove the block from smp-mt.c. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qsyousef@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Loongson1C: Add defconfigYang Ling
Signed-off-by: Yang Ling <gnaygnil@gmail.com> Cc: keguang.zhang@gmail.com Cc: chenhc@lemote.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13305/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Loongson1C: Add board supportYang Ling
Adds basic platform devices for Loongson1C, including serial port and ethernet. Signed-off-by: Yang Ling <gnaygnil@gmail.com> Cc: keguang.zhang@gmail.com Cc: chenhc@lemote.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13304/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Add CPU support for Loongson1CYang Ling
Loongson1C is a 32-bit SoC designed by Loongson Technology Co., Ltd, with many features similar to Loongson1B. Signed-off-by: Yang Ling <gnaygnil@gmail.com> Cc: paul.burton@imgtec.com Cc: markos.chandras@imgtec.com Cc: james.hogan@imgtec.com Cc: kumba@gentoo.org Cc: macro@imgtec.com Cc: david.daney@cavium.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13303/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Octeon: Rename upper case variables at setup time.Aaro Koskinen
Rename upper case variables. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: Sivasubramanian Palanisamy <sivasubramanian.palanisamy@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Octeon: Take all memory into use by default.Aaro Koskinen
Take all memory into use by default, instead of limiting to 512 MB. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: Sivasubramanian Palanisamy <sivasubramanian.palanisamy@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: Add device tree example for BCM6362Álvaro Fernández Rojas
This adds a device tree example for SFR NeufBox 6. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13844/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: Add BCM6362 supportÁlvaro Fernández Rojas
BCM6362 is a BMIPS4350 SoC which needs the same fixup as BCM6368 in order to enable SMP support. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: Add device tree example for BCM3368Álvaro Fernández Rojas
This adds a device tree example for Netgear CVG834G. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13843/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: Add BCM3368 supportÁlvaro Fernández Rojas
BCM3368 has a shared TLB which conflicts with current SMP support, so it must be disabled for now. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: Add device tree example for BCM63268Álvaro Fernández Rojas
This adds a device tree example for Comtrend VR-3032u, which also serves as a real example for brcm,bcm6328-leds. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13842/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: rename bcm96358nb4ser to bcm6358-neufbox4-sercomÁlvaro Fernández Rojas
The prefix bcm9* should only be used for reference and evaluation boards from Broadcom. Also adds missing console output to bootargs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13841/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: BMIPS: add missing bcm97435svmb to DT_NONEÁlvaro Fernández Rojas
Commit 380e4270 added support for bcm97435svmb.dtb but missed adding it to DT_NONE. Also refactor DT_NONE dtbs in order to add larger names in the future. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13839/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04MIPS: Don't specify STACKPROTECTOR in defconfigsPaul Gortmaker
Only one defconfig has a STACKPROTECTOR value. And it asks for the strong variant, which isn't supported by older toolchains. Due to the nature of MIPS having more platform specific code than say x86, the allyesconfig and allmodconfig aren't as effective for build coverage. So, in addition, I like to use a trivial script to walk all the defconfigs and build each one. However I will get false positives on unsupported stackprotector values with an older toolchain like gcc-4.6.3. As in this instance I am just using the compiler as a glorified syntax checker on a machine where I build a bunch of other arch for the same reason, there is no real motivation to get a newer toolchain for improved optimization etc. Since there is only one of them, and there is nothing about these settings that are board/platform specific, I propose we just eliminate the existing instance and take the default. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: James Hartley <james.hartley@imgtec.com> Cc: Ionela Voinescu <ionela.voinescu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13846/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-04dt-bindings: add vendor prefix for Auvidea GmbHLucas Stach
Auvidea (http://www.auvidea.eu/) produces embedded devices and baseboards with a focus on audio and video technology. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Rob Herring <robh@kernel.org>
2016-10-04x86/irq: Prevent force migration of irqs which are not in the vector domainMika Westerberg
When a CPU is about to be offlined we call fixup_irqs() that resets IRQ affinities related to the CPU in question. The same thing is also done when the system is suspended to S-states like S3 (mem). For each IRQ we try to complete any on-going move regardless whether the IRQ is actually part of x86_vector_domain. For each IRQ descriptor we fetch its chip_data, assume it is of type struct apic_chip_data and manipulate it by clearing old_domain mask etc. For irq_chips that are not part of the x86_vector_domain, like those created by various GPIO drivers, will find their chip_data being changed unexpectly. Below is an example where GPIO chip owned by pinctrl-sunrisepoint.c gets corrupted after resume: # cat /sys/kernel/debug/gpio gpiochip0: GPIOs 360-511, parent: platform/INT344B:00, INT344B:00: gpio-511 ( |sysfs ) in hi # rtcwake -s10 -mmem <10 seconds passes> # cat /sys/kernel/debug/gpio gpiochip0: GPIOs 360-511, parent: platform/INT344B:00, INT344B:00: gpio-511 ( |sysfs ) in ? Note '?' in the output. It means the struct gpio_chip ->get function is NULL whereas before suspend it was there. Fix this by first checking that the IRQ belongs to x86_vector_domain before we try to use the chip_data as struct apic_chip_data. Reported-and-tested-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: stable@vger.kernel.org # 4.4+ Link: http://lkml.kernel.org/r/20161003101708.34795-1-mika.westerberg@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-10-04powerpc/bpf: Add support for bpf constant blindingNaveen N. Rao
In line with similar support for other architectures by Daniel Borkmann. 'MOD Default X' from test_bpf without constant blinding: 84 bytes emitted from JIT compiler (pass:3, flen:7) d0000000058a4688 + <x>: 0: nop 4: nop 8: std r27,-40(r1) c: std r28,-32(r1) 10: xor r8,r8,r8 14: xor r28,r28,r28 18: mr r27,r3 1c: li r8,66 20: cmpwi r28,0 24: bne 0x0000000000000030 28: li r8,0 2c: b 0x0000000000000044 30: divwu r9,r8,r28 34: mullw r9,r28,r9 38: subf r8,r9,r8 3c: rotlwi r8,r8,0 40: li r8,66 44: ld r27,-40(r1) 48: ld r28,-32(r1) 4c: mr r3,r8 50: blr ... and with constant blinding: 140 bytes emitted from JIT compiler (pass:3, flen:11) d00000000bd6ab24 + <x>: 0: nop 4: nop 8: std r27,-40(r1) c: std r28,-32(r1) 10: xor r8,r8,r8 14: xor r28,r28,r28 18: mr r27,r3 1c: lis r2,-22834 20: ori r2,r2,36083 24: rotlwi r2,r2,0 28: xori r2,r2,36017 2c: xoris r2,r2,42702 30: rotlwi r2,r2,0 34: mr r8,r2 38: rotlwi r8,r8,0 3c: cmpwi r28,0 40: bne 0x000000000000004c 44: li r8,0 48: b 0x000000000000007c 4c: divwu r9,r8,r28 50: mullw r9,r28,r9 54: subf r8,r9,r8 58: rotlwi r8,r8,0 5c: lis r2,-17137 60: ori r2,r2,39065 64: rotlwi r2,r2,0 68: xori r2,r2,39131 6c: xoris r2,r2,48399 70: rotlwi r2,r2,0 74: mr r8,r2 78: rotlwi r8,r8,0 7c: ld r27,-40(r1) 80: ld r28,-32(r1) 84: mr r3,r8 88: blr Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc/bpf: Implement support for tail callsNaveen N. Rao
Tail calls allow JIT'ed eBPF programs to call into other JIT'ed eBPF programs. This can be achieved either by: (1) retaining the stack setup by the first eBPF program and having all subsequent eBPF programs re-using it, or, (2) by unwinding/tearing down the stack and having each eBPF program deal with its own stack as it sees fit. To ensure that this does not create loops, there is a limit to how many tail calls can be done (currently 32). This requires the JIT'ed code to maintain a count of the number of tail calls done so far. Approach (1) is simple, but requires every eBPF program to have (almost) the same prologue/epilogue, regardless of whether they need it. This is inefficient for small eBPF programs which may not sometimes need a prologue at all. As such, to minimize impact of tail call implementation, we use approach (2) here which needs each eBPF program in the chain to use its own prologue/epilogue. This is not ideal when many tail calls are involved and when all the eBPF programs in the chain have similar prologue/epilogue. However, the impact is restricted to programs that do tail calls. Individual eBPF programs are not affected. We maintain the tail call count in a fixed location on the stack and updated tail call count values are passed in through this. The very first eBPF program in a chain sets this up to 0 (the first 2 instructions). Subsequent tail calls skip the first two eBPF JIT instructions to maintain the count. For programs that don't do tail calls themselves, the first two instructions are NOPs. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc/bpf: Introduce accessors for using the tmp local stack spaceNaveen N. Rao
While at it, ensure that the location of the local save area is consistent whether or not we setup our own stackframe. This property is utilised in the next patch that adds support for tail calls. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc/fadump: Fix build break when CONFIG_PROC_VMCORE=nMichael Ellerman
The fadump code calls vmcore_cleanup() which only exists if CONFIG_PROC_VMCORE=y. We don't want to depend on CONFIG_PROC_VMCORE, because it's user selectable, so just wrap the call in an #ifdef. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc: tm: Enable transactional memory (TM) lazily for userspaceCyril Bur
Currently the MSR TM bit is always set if the hardware is TM capable. This adds extra overhead as it means the TM SPRS (TFHAR, TEXASR and TFAIR) must be swapped for each process regardless of if they use TM. For processes that don't use TM the TM MSR bit can be turned off allowing the kernel to avoid the expensive swap of the TM registers. A TM unavailable exception will occur if a thread does use TM and the kernel will enable MSR_TM and leave it so for some time afterwards. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc/tm: Add TM Unavailable ExceptionCyril Bur
If the kernel disables transactional memory (TM) and userspace still tries TM related actions (TM instructions or TM SPR accesses) TM aware hardware will cause the kernel to take a facility unavailable exception. Add checks for the exception being caused by illegal TM access in userspace. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> [mpe: Rewrite comment entirely, bugs in it are mine] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc: Remove do_load_up_transact_{fpu,altivec}Cyril Bur
Previous rework of TM code leaves these functions unused Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc: tm: Rename transct_(*) to ck(\1)_stateCyril Bur
Make the structures being used for checkpointed state named consistently with the pt_regs/ckpt_regs. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04powerpc: tm: Always use fp_state and vr_state to store live registersCyril Bur
There is currently an inconsistency as to how the entire CPU register state is saved and restored when a thread uses transactional memory (TM). Using transactional memory results in the CPU having duplicated (almost) all of its register state. This duplication results in a set of registers which can be considered 'live', those being currently modified by the instructions being executed and another set that is frozen at a point in time. On context switch, both sets of state have to be saved and (later) restored. These two states are often called a variety of different things. Common terms for the state which only exists after the CPU has entered a transaction (performed a TBEGIN instruction) in hardware are 'transactional' or 'speculative'. Between a TBEGIN and a TEND or TABORT (or an event that causes the hardware to abort), regardless of the use of TSUSPEND the transactional state can be referred to as the live state. The second state is often to referred to as the 'checkpointed' state and is a duplication of the live state when the TBEGIN instruction is executed. This state is kept in the hardware and will be rolled back to on transaction failure. Currently all the registers stored in pt_regs are ALWAYS the live registers, that is, when a thread has transactional registers their values are stored in pt_regs and the checkpointed state is in ckpt_regs. A strange opposite is true for fp_state/vr_state. When a thread is non transactional fp_state/vr_state holds the live registers. When a thread has initiated a transaction fp_state/vr_state holds the checkpointed state and transact_fp/transact_vr become the structure which holds the live state (at this point it is a transactional state). This method creates confusion as to where the live state is, in some circumstances it requires extra work to determine where to put the live state and prevents the use of common functions designed (probably before TM) to save the live state. With this patch pt_regs, fp_state and vr_state all represent the same thing and the other structures [pending rename] are for checkpointed state. Acked-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Add checks for transactional VSXs in signal contextsCyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Add checks for transactional VMXs in signal contextsCyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Add checks for transactional FPUs in signal contextsCyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Add checks for transactional GPRs in signal contextsCyril Bur
If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Check that signals always get deliveredCyril Bur
Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Add TM tcheck helpers in CCyril Bur
Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Allow tests to extend their kill timeoutCyril Bur
Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Introduce GPR asm helper header fileCyril Bur
Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Move VMX stack frame macros to header fileCyril Bur
Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Rework FPU stack placement macros and move to header fileCyril Bur
The FPU regs are placed at the top of the stack frame. Currently the position expected to be passed to the macro. The macros now should be passed the stack frame size and from there they can calculate where to put the regs, this makes the use simpler. Also move them to a header file to be used in an different area of the powerpc selftests Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04selftests/powerpc: Check for VSX preservation across userspace preemptionCyril Bur
Ensure the kernel correctly switches VSX registers correctly. VSX registers are all volatile, and despite the kernel preserving VSX across syscalls, it doesn't have to. Test that during interrupts and timeslices ending the VSX regs remain the same. Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-10-04Merge tag 'perf-core-for-mingo-20161003' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent Pull perf/core improvements and fixes: - Allow vendors to provide JSON files describing PMU events, that then get parsed to generate C tables that are linked against perf, allowing the use of the names in their documentations, such as: # perf list l1d List of pre-defined events (to be used in -e): Cache: l1d.replacement [L1D data line replacements] l1d_pend_miss.fb_full [Cycles a demand request was blocked due to Fill Buffers inavailability] l1d_pend_miss.pending [L1D miss oustandings duration in cycles] l1d_pend_miss.pending_cycles [Cycles with L1D load Misses outstanding] l1d_pend_miss.pending_cycles_any [Cycles with L1D load Misses outstanding from any thread on physical core] l2_trans.l1d_wb [L1D writebacks that access L2 cache] Pipeline: cycle_activity.cycles_l1d_miss [Cycles while L1 cache miss demand load is outstanding] cycle_activity.cycles_l1d_pending [Cycles while L1 cache miss demand load is outstanding] cycle_activity.stalls_l1d_miss [Execution stalls while L1 cache miss demand load is outstanding] cycle_activity.stalls_l1d_pending [Execution stalls while L1 cache miss demand load is outstanding] The above example was done on a Broadwell based ThinkPad t450s after downloading and installing such JSON files which will be added to the tools/perf/pmu-events/ directory in a subsequent patchkit. Now one can use those names with -e/--event in all 'perf tools'. (Andi Kleen, Sukadev Bhattiprolu) - Add a missing pointer dereference in 'perf probe' (Colin Ian King) - Add support for building host programs to be used in generating files to be used in the build process, such as fixdep and jevents, fixing the usage of these features in a cross compilation setup (Jiri Olsa) Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>