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This also incorporates the STiH410.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Use a generic name for this kind of PLL
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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To enable SMP when booting via u-boot we need to specify the
newly implemented cpu-release-addr DT property for cores 2 & 3.
Cores 0 & 1 are inherited from stih407-family.dtsi.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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To enable SMP when booting via u-boot we need to specify the
newly implemented cpu-release-addr DT property.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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mtsin0 channel can only be configured for parallel data transfer.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsout1 channel can only be configured for serial data tranfer.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsout0 channel can be configured for either serial or parallel
data transfer. Both pin configurations are provided.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin5 can only be configured for serial data transfer. However
depending on board design, two alternate tsin5 pin configurations
are available, both in pin-controller-front0.
pinctrl_tsin5_serial_alt1 is brought out on B2120 reference
design as TSD on NIMB slot of the B2004A daughter board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin4 can only be configured for serial data transfer. However
depending on board design, two alternate pin configurations
are available. One in pin-controller-front0 and the other in
pin-controller-front1.
pinctrl_tsin4_serial_alt3 is brought out on B2120 reference
design as TSC on NIMA slot of the B2004A daughter board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin3 channel can only be configured for serial data transfer.
On B2120 reference design tsin3 is brought out as TSB on the NIMB
slot of the B2004A daughter board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin2 channel can be configured for either serial or parallel data
transfer. This patch adds the pinctrl config for both possibilities.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin1 channel can be configured for either serial or parallel data
transfer. This patch adds the pinctrl config for both possibilities.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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tsin0 and be configured as either serial or parallel. This patch
adds the pinctrl config for both possiblities. On B2120 reference
design tsin0 is brought out as TSA on the NIMA slot of the B2004A
daughter board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The adv7511 IRQ is low level triggered, not falling edge triggered. The
wrong sense configuration results in no interrupt being triggered at
all, breaking hotplug detection. Fix it.
Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Merge "pxa-dt for v4.3" from Robert Jarzmik:
This device-tree pxa update brings :
- dma nodes after dmaengine pxa_dma driver merge
- camera driver
- usb host controller
* tag 'tags/pxa-dt-4.3' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: fix power i2c definition
ARM: dts: pxa: add the usb host controller
ARM: dts: pxa: add embedded pxa camera capture interface
ARM: dts: pxa: add dma pxamci nodes to pxa3xx
ARM: dts: pxa: add dma engine node to pxa3xx-nand
ARM: dts: pxa: add dma controller
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Terasic DE0 Atlas board is also known as the DE0-Nano board.
This patch adds the DTS board file for the DE0-Nano Sockit board, and not
the DE0 Nano "Development Board".
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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v3: Updated skew settings for the gmac1 node as this board is using the
KSZ9031 PHY instead of the 9021 PHY.
v2: use stdpath-out for console and remove comment regarding u-boot ethaddr
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Iteaduino Plus A10 is a breakout board + Itead Core A10. It features 1GB RAM,
has most of the A10 pins on a .1" header, 2 USB ports, 1 OTG USB port,
Ethernet, HDMI, SATA, Speaker/Microphone 3.5mm jacks and an SD card slot.
Signed-off-by: Josef Gajdusek <atx@atx.name>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Add wl1251 support via pdata-quirks as it's driver lacks DT
support. MMC3 is marked disabled in DT so that MMC3 instance of
hsmmc driver is probed using platform data with special card init
callback.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add backlight support via pdata-quirks as it's driver lacks DT support.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This adds missing bits for EHCI HS USB host support and 32k clock
buffer control for the wg7210 bt+wifi module.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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- add pandora specific compatible name
- fix mmc2 card detect polarity
- fix mmc1 and mmc2 write protect polarity
- disable write protect pins because of production issue and add an
explanation why they are disabled
- fix NAND partition name to reflect the correct address
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Palmas on OMAP5uevm has support for power button, so enable it.
Signed-off-by: Aparna Balasubramanian <aparnab@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add serialN aliases for all 6 UART instances on
the AM437x SoC so each board's .dts file does not
have to define its own aliases.
Remove the alias added for am437x-gp-evm.dts now
that we have the aliases defined in am4372.dtsi
file.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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phyBOARD-WEGA-AM335x represents a direct soldered
combination of a phyCORE-AM335x SoM and carrier board.
Different kind of SoM options can be connected to
the wega carrier board. So we created a separate
wega dtsi file. The final dts contains the actual
SoM on the carrier board.
WEGA carrier board features:
* ETH phy on carrier board: 1x MII
* 1x CAN
* 2x UART
* USB0 (device)
* USB1 (host)
* mSD slot
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the phyCORE-AM335x.
So they are disabled on default in this som dtsi file.
They will be enabled in the board dts files, when populated.
* RAM up to 1GiB
* PMIC
* NAND flash up to 1GiB
* Eth PHY on SOM: 1x RMII
* SPI NOR flash 8MiB (optional)
* i2c RTC (optional)
* i2c EEPROM 4kiB (optional)
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In tsc2046 touch driver, the values such as ti,x-min is defined as a u16
value. the driver use API of_property_read_u16() read the value. For these
u16 value, the dts entry should be like:
property = /bits/ 16 <0x5000>;
This describes the property as a u16 value.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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A previously defined Device Tree node, can be extended either by defining
a node using the same full path or by creating a label for the node and
referencing to it.
Using full paths is more error prone since if there was a typo error, a
new node will be created instead of extending the node as it was desired.
This will lead to run-time errors that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error which
makes it easier to detect the mistake since happens at build-time instead.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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The dtc compiler combines all the defined nodes that have the same path
so a device node definition can be in one file and later be extended in
another one.
That's the case of the Exynos5420 pinctrl device nodes that are defined
in the exynos5420.dtsi file and extended in exynos5420-pinctrl.dtsi.
But since the exynos5420.dtsi file includes the exynos5420-pinctrl.dtsi
before the pinctrl device nodes are actually defined, the definition of
the pinctrl device nodes happens in exynos5420-pinctrl.dtsi and are
extended in exynos5420.dtsi.
That is the opposite of the original intention so even when there is no
difference in practice, the exynos5420-pinctrl.dtsi include should be
moved at the end of the exynos5420.dtsi file after the pinctrl device
nodes have been already defined.
This will also allow to later change the exynos5420-pinctrl.dtsi file
to use labels instead of full paths to extend the pinctrl nodes. Since
keeping the include at the top, would cause a dtc build error due the
pinctrl labels not being defined yet.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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A previously defined Device Tree node, can be extended either by defining
a node using the same full path or by creating a label for the node and
referencing to it.
Using full paths is more error prone since if there was a typo error, a
new node will be created instead of extending the node as it was desired.
This will lead to run-time errors that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error which
makes it easier to detect the mistake since happens at build-time instead.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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The dtc compiler combines all the defined nodes that have the same path
so a device node definition can be in one file and later be extended in
another one.
That's the case of the Exynos5250 pinctrl device nodes that are defined
in the exynos5250.dtsi file and extended in exynos5250-pinctrl.dtsi.
But since the exynos5250.dtsi file includes the exynos5250-pinctrl.dtsi
before the pinctrl device nodes are actually defined, the definition of
the pinctrl device nodes happens in exynos5250-pinctrl.dtsi and are
extended in exynos5250.dtsi.
That is the opposite of the original intention so even when there is no
difference in practice, the exynos5250-pinctrl.dtsi include should be
moved at the end of the exynos5250.dtsi file after the pinctrl device
nodes have been already defined.
This will also allow to later change the exynos5250-pinctrl.dtsi file
to use labels instead of full paths to extend the pinctrl nodes. Since
keeping the include at the top, would cause a dtc build error due the
pinctrl labels not being defined yet.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Include exynos5422-cpu-thermal.dtsi to enable thermal_zone support.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Trip points corresponding to the one defined in the exynos_tmu_data.c
for Exynos5422 have been included so define thermal-zones attribute.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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This changes enables TMU IP block on the Exynos5422 Odroid-XU3
device.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Add pwm-fan node to the Odroid-XU3 boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Usage of labels instead of full paths reduces possible mistakes when
overriding nodes.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Add some safe values for over heat and over voltage. The Trats2 uses
3.8 V battery and during testing it operated properly under 4.48 V.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Enable regulator for usbdrd3_0 and usbdrd3_1. Looking at the schematic
pin diagram for MAX77802 USB3_0 and USB3_1 is regulated by LDO9 and
LD011.
This removes following warnings during boot:
[ 3.503539] exynos-dwc3 usb@12000000: Looking up vdd33-supply from device tree
[ 3.503556] exynos-dwc3 usb@12000000: Looking up vdd33-supply property in node /usb@12000000 failed
[ 3.503568] usb@12000000 supply vdd33 not found, using dummy regulator
[ 3.509154] exynos-dwc3 usb@12000000: Looking up vdd10-supply from device tree
[ 3.509170] exynos-dwc3 usb@12000000: Looking up vdd10-supply property in node /usb@12000000 failed
[ 3.509181] usb@12000000 supply vdd10 not found, using dummy regulator
[ 3.917548] exynos-dwc3 usb@12400000: Looking up vdd33-supply from device tree
[ 3.917565] exynos-dwc3 usb@12400000: Looking up vdd33-supply property in node /usb@12400000 failed
[ 3.917578] usb@12400000 supply vdd33 not found, using dummy regulator
[ 3.922731] exynos-dwc3 usb@12400000: Looking up vdd10-supply from device tree
[ 3.922747] exynos-dwc3 usb@12400000: Looking up vdd10-supply property in node /usb@12400000 failed
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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The UART status properties are indented one level too deep, and we want
to derive a device tree for the ODROID-XU. Fix this before it propagates.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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For Exynos4210 platforms, add CPU operating points and CPU regulator
supply properties for migrating from Exynos specific cpufreq driver
to using generic cpufreq driver.
Cc: Doug Anderson <dianders@chromium.org>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: removed exynos5250 and exynos5420 support for now]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
[k.kozlowski: Rebased, moved cpu nodes to alphabetical position]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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As a follow-up to recent changes to Exynos mipi video phy driver,
introducing support for PMU regmap in commit e4b3d38088df ("phy:
exynos-video-mipi: Fix regression by adding support for PMU regmap")
add a syscon phandle to video-phy node to bring back to life both
MIPI DSI display and MIPI CSIS-2 camera sensor on Exynos3250.
Signed-off-by: Beata Michalska <b.michalska@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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Use stdout-path dts property for kernel console.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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Just in case the firmware did not enable data and instruction prefetch in
the L2 cache controller, we enable it in the kernel.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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This adds basic chip support for Mediatek 6580.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This adds a DT binding documentation for the MT6580 SoC from Mediatek.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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We used to provide dummy clocks for the UART. Now that we have
common clock support we can provide the real clocks to the UART.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The MT8135 eval board contains a MT6397 PMIC. This adds the
corresponding device node to the dts file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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