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2012-10-16Merge branch 'drm-intel-fixes' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-fixes Daniel writes: "- some register magic to fix hsw crw (Paulo&Ben) - fix backlight destruction for cpu edp (Jani) - fix gen ch7xxx dvo ->get_hw_state - fixup the plane->pipe fixup code, the broken version massively angers the modeset sanity checks - kill pipe A quirk for i855gm, otherwise I get a black screen with the above patch - fixup for gem_get_page helper (Chris) - fixup guardband clipping w/a (Ken), without this mesa master can erronously drop vertices on snb, mesa 9.0 has the optimization reverted - another pageflip vs. modeset fix - kill bogus BUG_ON which broke ums+gem from Willy Tarreau (gasp, people are still using this!)" * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: fix non-DP-D eDP backlight cleanup and module reload drm/i915: HSW CRW stability magic drm/i915/dvo-ch7xxx: fix get_hw_state drm/i915: fixup the plane->pipe fixup code drm/i915: rip out the pipe A quirk for i855gm drm/i915: disable wc gtt pte mappings on gen2 drm/i915: fixup i915_gem_object_get_page inline helper drm/i915: Disallow preallocation of requests drm/i915: Set guardband clipping workaround bit in the right register. drm/i915: paper over a pipe-enable vs pageflip race drm/i915: remove useless BUG_ON which caused a regression in 3.5.
2012-10-16ARM: shmobile: r8a7779: use __iomem pointers for MMIOKuninori Morimoto
0a4b04dc299dfb691827a4001b3d8d7e443b71c9 (ARM: shmobile: use __iomem pointers for MMIO) modified iomem pointers so that IOMEM() macro will be used, but clock-r8a7779.c was out of target. This patch fixes it up. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-10-15ARM: OMAP: Trivial driver changes to remove include plat/cpu.hTony Lindgren
Drivers should not use cpu_is_omap or cpu_class_is_omap macros, they should be private to the platform init code. And we'll be removing plat/cpu.h and only have a private soc.h for the arch/arm/*omap* code. This patch is intended as preparation for the core omap changes and removes the need to include plat/cpu.h from several drivers. This is needed for the ARM common zImage support. These changes are OK to do because: - omap-rng.c does not need plat/cpu.h - omap-aes.c and omap-sham.c get the proper platform_data passed to them so they don't need extra checks in the driver - omap-dma.c and omap-pcm.c can test the arch locally as omap1 and omap2 cannot be compiled together because of conflicting compiler flags Cc: Deepak Saxena <dsaxena@plexity.net> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David S. Miller <davem@davemloft.net> Cc: Venkatraman S <svenkatr@ti.com> Cc: Chris Ball <cjb@laptop.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Cc: Liam Girdwood <lrg@ti.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: linux-crypto@vger.kernel.org Cc: linux-mmc@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: linux-kernel@vger.kernel.org [tony@atomide.com: mmc changes folded in to an earlier patch] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15staging: tidspbridge: remove unnecessary include of <plat/clock.h>Paul Walmsley
The DSPBridge driver includes arch/arm/plat-omap/include/plat/clock.h. All of the <plat/ ...> includes are causing problems with the ARM single image kernel effort. Remove this one. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15ARM: OMAP: DMA: Move plat/dma.h to plat-omap/dma-omap.hLokesh Vutla
Move plat/dma.h to plat-omap/dma-omap.h as part of single zImage work Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15ARM: OMAP2+: DMA: Moving OMAP2+ DMA channel definitions to mach-omap2Lokesh Vutla
Similar to omap1, some of the omap2+ dma channel definitions are used by some drivers. For moving omap2+ dma channel definitions to mach-omap2/, the used ones should be defined locally to driver. Drivers can eliminate it using DT, platform data, or IORESOURCE_DMA And moving omap2+ DMA channel definitions to mach-omap2 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15ARM: OMAP1: DMA: Moving OMAP1 DMA channel definitions to mach-omap1Lokesh Vutla
Some of the omap1 dma channel definitions are used by some drivers. For moving omap1 dma channel definitions to mach-omap1/, the used ones should be defined locally to driver. Driver can eliminate it by using DT, platform data, or IORESOURCE_DMA. And moving OMAP1 DMA channel definitions to mach-omap1 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15ARM: OMAP: DMA: Removing plat/dma-44xx.hLokesh Vutla
None of the DMA channel definitions defined in plat/dma-44xx.h are used. So removing it. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15thermal, cpufreq: Fix build when CPU_FREQ_TABLE isn't configuredDavid Rientjes
Commit 023614183768 ("thermal: add generic cpufreq cooling implementation") requires cpufreq_frequency_get_table(), but that function is only defined for CONFIG_CPU_FREQ_TABLE resulting in the following build error: drivers/built-in.o: In function `cpufreq_get_max_state': drivers/thermal/cpu_cooling.c:259: undefined reference to `cpufreq_frequency_get_table' drivers/built-in.o: In function `get_cpu_frequency': drivers/thermal/cpu_cooling.c:129: undefined reference to `cpufreq_frequency_get_table' Fix it by selecting CONFIG_CPU_FREQ_TABLE for such a configuration. It turns out CONFIG_EXYNOS_THERMAL also needs CONFIG_CPU_FREQ_TABLE, so select it there as well. Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-10-15serial/8250_hp300: Missing 8250 register interface conversion bitsGeert Uytterhoeven
commit 2655a2c76f80d91da34faa8f4e114d1793435ed3 ("8250: use the 8250 register interface not the legacy one") forgot to fully switch one instance of struct uart_port to struct uart_8250_port, causing the following compile failure: drivers/tty/serial/8250/8250_hp300.c: In function ‘hpdca_init_one’: drivers/tty/serial/8250/8250_hp300.c:174: error: ‘uart’ undeclared (first use in this function) drivers/tty/serial/8250/8250_hp300.c:174: error: (Each undeclared identifier is reported only once drivers/tty/serial/8250/8250_hp300.c:174: error: for each function it appears in.) This went unnoticed in -next, as CONFIG_HPDCA is not set to y by allmodconfig. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Philip Blundell <philb@gnu.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-15kbuild: Fix accidental revert in commit fe04ddfMichal Marek
Commit fe04ddf7c291 ("kbuild: Do not package /boot and /lib in make tar-pkg") accidentally reverted two previous kbuild commits. I don't know what I was thinking. This brings back changes made by commits 24cc7fb69a5b ("x86/kbuild: archscripts depends on scripts_basic") and c1c1a59e37da ("firmware: fix directory creation rule matching with make 3.80") Reported-by: Jan Beulich <JBeulich@suse.com> Cc: <stable@vger.kernel.org> Signed-off-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-10-15mmc: omap: Remove cpu_is_omap usage from the driverTony Lindgren
This is needed for the ARM common zImage support. We can use the existing slot features to pass omap1 specific options to the driver. For omap2 we don't want to pass anything new as that will be eventually moved to use device tree based init. Note that this patch depends on earlier patch that moves plat/mmc.h into include/linux/platform_data. Cc: linux-mmc@vger.kernel.org Cc: Venkatraman S <svenkatr@ti.com> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15ARM: OMAP: Split plat/mmc.h into local headers and platform_dataTony Lindgren
We need to remove this from plat for ARM common zImage support. Also remove includes not needed by the omap_hsmmc.c driver. Cc: linux-mmc@vger.kernel.org Acked-by: Chris Ball <cjb@laptop.org> Acked-by: Venkatraman S <svenkatr@ti.com> [tony@atomide.com: fold in removal of unused driver includes] Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-15drm/radeon: fix spelling typos in debugging outputThomas Friebel
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon: Don't destroy I2C Bus Rec in radeon_ext_tmds_enc_destroy().Egbert Eich
radeon_i2c_fini() walks thru the list of I2C bus recs rdev->i2c_bus[] to destroy each of them. radeon_ext_tmds_enc_destroy() however also has code to destroy it's associated I2C bus rec which has been obtained by radeon_i2c_lookup() and is therefore also in the i2c_bus[] list. This causes a double free resulting in a kernel panic when unloading the radeon driver. Removing destroy code from radeon_ext_tmds_enc_destroy() fixes this problem. agd5f: fix compiler warning Signed-off-by: Egbert Eich <eich@suse.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-10-15drm/radeon: check if pcie gen 2 is already enabled (v2)Alex Deucher
If so, skip enabling it to save time. v2: coding style fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon/cayman: set VM max pfn at MC initAlex Deucher
No need to emit them at VM flush as we no longer use variable sized page tables now that we support 2 level page tables. This matches the behavior of SI (which does not support variable sized page tables). Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2012-10-15drm/radeon: separate pt alloc from lru addChristian König
Make it possible to allocate a persistent page table. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon: don't add the IB pool to all VMs v2Christian König
We want to use VMs without the IB pool in the future. v2: also remove it from radeon_vm_finish. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon: allocate page tables on demand v4Christian König
Based on Dmitries work, but splitting the code into page directory and page table handling makes it far more readable and (hopefully) more reliable. Allocations of page tables are made from the SA on demand, that should still work fine since all page tables are of the same size. Also using the fact that allocations from the SA are mostly continuously (except for end of buffer wraps and under very high memory pressure) to group updates send to the chipset specific code into larger chunks. v3: mostly a rewrite of Dmitries previous patch. v4: fix some typos and coding style Signed-off-by: Dmitry Cherkasov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon: update comments to clarify VM setup (v2)Alex Deucher
The actual set up and assignment of VM page tables is done on the fly in radeon_gart.c. v2: update vm size comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2012-10-15drm/radeon: allocate PPLLs from low to highAlex Deucher
The order shouldn't matter, but there have been problems reported on certain older asics. This behaves more like the original code before the PPLL allocation rework. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
2012-10-15drm/radeon: fix compilation with backlight disabledAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15drm/radeon: use %zu for formatting size_tLuca Tettamanti
Fixes compiler warnings on 32bit. Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-15MAINTAINERS: Add maintainer entry for the USB webcam gadgetLaurent Pinchart
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-15usb: gadget: Make webcam gadget select USB_LIBCOMPOSITELaurent Pinchart
Composite gadget support is now available as a library instead of being built with each gadget. Composite drivers need to select USB_LIBCOMPOSITE. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-15docbook: networking: fix file paths for uapi headersRandy Dunlap
Update file paths in Documentation/DocBook/networking.tmpl for uapi headers. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-10-15mm: huge_memory: Fix build error.Ralf Baechle
Certain configurations won't implicitly pull in <linux/pagemap.h> resulting in the following build error: mm/huge_memory.c: In function 'release_pte_page': mm/huge_memory.c:1697:2: error: implicit declaration of function 'unlock_page' [-Werror=implicit-function-declaration] mm/huge_memory.c: In function '__collapse_huge_page_isolate': mm/huge_memory.c:1757:3: error: implicit declaration of function 'trylock_page' [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors Reported-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-10-15ARM: fix oops on initial entry to userspace with Thumb2 kernelsRussell King
Daniel Mack reports an oops at boot with the latest kernels: Internal error: Oops - undefined instruction: 0 [#1] SMP THUMB2 Modules linked in: CPU: 0 Not tainted (3.6.0-11057-g584df1d #145) PC is at cpsw_probe+0x45a/0x9ac LR is at trace_hardirqs_on_caller+0x8f/0xfc pc : [<c03493de>] lr : [<c005e81f>] psr: 60000113 sp : cf055fb0 ip : 00000000 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : 00000000 r7 : 00000000 r6 : 00000000 r5 : c0344555 r4 : 00000000 r3 : cf057a40 r2 : 00000000 r1 : 00000001 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 50c5387d Table: 8f3f4019 DAC: 00000015 Process init (pid: 1, stack limit = 0xcf054240) Stack: (0xcf055fb0 to 0xcf056000) 5fa0: 00000001 00000000 00000000 00000000 5fc0: cf055fb0 c000d1a8 00000000 00000000 00000000 00000000 00000000 00000000 5fe0: 00000000 be9b3f10 00000000 b6f6add0 00000010 00000000 aaaabfaf a8babbaa The analysis of this is as follows. In init/main.c, we issue: kernel_thread(kernel_init, NULL, CLONE_FS | CLONE_SIGHAND); This creates a new thread, which falls through to the ret_from_fork assembly, with r4 set NULL and r5 set to kernel_init. You can see this in your oops dump register set - r5 is 0xc0344555, which is the address of kernel_init plus 1 which marks the function as Thumb code. Now, let's look at this code a little closer - this is what the disassembly looks like: c000d180 <ret_from_fork>: c000d180: f03a fe08 bl c0047d94 <schedule_tail> c000d184: 2d00 cmp r5, #0 c000d186: bf1e ittt ne c000d188: 4620 movne r0, r4 c000d18a: 46fe movne lr, pc <-- XXXXXXX c000d18c: 46af movne pc, r5 c000d18e: 46e9 mov r9, sp c000d190: ea4f 3959 mov.w r9, r9, lsr #13 c000d194: ea4f 3949 mov.w r9, r9, lsl #13 c000d198: e7c8 b.n c000d12c <ret_to_user> c000d19a: bf00 nop c000d19c: f3af 8000 nop.w This code was introduced in 9fff2fa0db911 (arm: switch to saner kernel_execve() semantics). I have marked one instruction, and it's the significant one - I'll come back to that later. Eventually, having had a successful call to kernel_execve(), kernel_init() returns zero. In returning, it uses the value in 'lr' which was set by the instruction I marked above. Unfortunately, this causes lr to contain 0xc000d18e - an even address. This switches the ISA to ARM on return but with a non word aligned PC value. So, what do we end up executing? Well, not the instructions above - yes the opcodes, but they don't mean the same thing in ARM mode. In ARM mode, it looks like this instead: c000d18c: 46e946af strbtmi r4, [r9], pc, lsr #13 c000d190: 3959ea4f ldmdbcc r9, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ c000d194: 3949ea4f stmdbcc r9, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^ c000d198: bf00e7c8 svclt 0x0000e7c8 c000d19c: 8000f3af andhi pc, r0, pc, lsr #7 c000d1a0: e88db092 stm sp, {r1, r4, r7, ip, sp, pc} c000d1a4: 46e81fff ; <UNDEFINED> instruction: 0x46e81fff c000d1a8: 8a00f3ef bhi 0xc004a16c c000d1ac: 0a0cf08a beq 0xc03493dc I have included more above, because it's relevant. The PSR flags which we can see in the oops dump are nZCv, so Z and C are set. All the above ARM instructions are not executed, except for two. c000d1a0, which has no writeback, and writes below the current stack pointer (and that data is lost when we take the next exception.) The other instruction which is executed is c000d1ac, which takes us to... 0xc03493dc. However, remember that bit 1 of the PC got set. So that makes the PC value 0xc03493de. And that value is the value we find in the oops dump for PC. What is the instruction here when interpreted in ARM mode? 0: f71e150c ; <UNDEFINED> instruction: 0xf71e150c and there we have our undefined instruction (remember that the 'never' condition code, 0xf, has been deprecated and is now always executed as it is now being used for additional instructions.) This path also nicely explains the state of the stack we see in the oops dump too. The above is a consistent and sane story for how we got to the oops dump, which all stems from the instruction at 0xc000d18a being wrong. Reported-by: Daniel Mack <zonque@gmail.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-10-15usb: dwc3: shutdown usb_phy when removing the deviceVivek Gautam
We call usb_phy_init() from dwc3_core_init() during probe, so adding usb_phy_shutdown() to dwc3_core_exit() while removing the device so we don't keep PHYs turned on, consuming power, unnecessarily. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-10-15usb: musb: am35xx: drop spurious unplugging a deviceStefano Babic
On AM3517, tx and rx interrupt are detected together with the disconnect event. This generates a kernel panic in musb_interrupt, because rx / tx are handled after disconnect. This issue was seen on a Technexion's TAM3517 SOM. Unplugging a device, tx / rx interrupts together with disconnect are detected. This brings to kernel panic like this: [ 68.526153] Unable to handle kernel NULL pointer dereference at virtual address 00000011 [ 68.534698] pgd = c0004000 [ 68.537536] [00000011] *pgd=00000000 [ 68.541351] Internal error: Oops: 17 [#1] ARM [ 68.545928] Modules linked in: [ 68.549163] CPU: 0 Not tainted (3.6.0-rc5-00020-g9e05905 #178) [ 68.555694] PC is at rxstate+0x8/0xdc [ 68.559539] LR is at musb_interrupt+0x98/0x858 [ 68.564239] pc : [<c035cd88>] lr : [<c035af1c>] psr: 40000193 [ 68.564239] sp : ce83fb40 ip : d0906410 fp : 00000000 [ 68.576293] r10: 00000000 r9 : cf3b0e40 r8 : 00000002 [ 68.581817] r7 : 00000019 r6 : 00000001 r5 : 00000001 r4 : 000000d4 [ 68.588684] r3 : 00000000 r2 : 00000000 r1 : ffffffcc r0 : cf23c108 [ 68.595550] Flags: nZcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment ke Note: this behavior is not seen with a USB hub, while it is easy to reproduce connecting a USB-pen directly to the USB-A of the board. Drop tx / rx interrupts if disconnect is detected. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Felipe Balbi <balbi@ti.com> Cc: stable@vger.kernel.org # 3.5 3.6 Tested-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-10-15usb: dwc3: gadget: fix 'endpoint always busy' bugFelipe Balbi
If a USB transfer has already been started, meaning we have already issued StartTransfer command to that particular endpoint, DWC3_EP_BUSY flag has also already been set. When we try to cancel this transfer which is already in controller's cache, we will not receive XferComplete event and we must clear DWC3_EP_BUSY in order to allow subsequent requests to be properly started. The best place to clear that flag is right after issuing DWC3_DEPCMD_ENDTRANSFER. Cc: stable@vger.kernel.org # v3.4 v3.5 v3.6 Reported-by: Moiz Sonasath <m-sonasath@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2012-10-15ARM: OMAP2+: gpmc: localize gpmc headerAfzal Mohammed
Requirement of gpmc header outside of mach-omap2 has been cutoff, move gpmc header file in plat-omap folder to local mach-omap2 folder Objective - common zImage participation of omap Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: gpmc: remove exported nand functionsAfzal Mohammed
nand driver handles gpmc-nand block fully, hence no more users for these exported nand functions, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: nand: omap: handle gpmc bch[48]Afzal Mohammed
gpmc-nand bch registers are now available in driver, make use of it to handle bch[48] instead of relying on gpmc exported functions. And so nand driver no longer needs gpmc header, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: gpmc: nand register helper bch updateAfzal Mohammed
Update helper function that provides gpmc-nand register details for nand driver with bch register information. Using this nand driver can be made self sufficient to handle remaining gpmc-nand operations by itself instead of relying on gpmc exported nand functions. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: nand: bch capability checkAfzal Mohammed
Capability of bch schemes could be discovered using soc revision checks. If soc revision indicates that selected ecc scheme is not supported bail out. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: nand: omap: bring in gpmc nand macrosAfzal Mohammed
Bring onto driver the macros defined in gpmc.h that are not necessary outside driver, helps in removing inclusion of gpmc.h too. Also remove GPMC prefix on those macros to make clear it's independence with gpmc header. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: nand: header cleanupAfzal Mohammed
For common arm zImage existing nand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Also move gpmc-nand platform data to platform header meant for nand from gpmc header file Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: onenand: header cleanupAfzal Mohammed
For common arm zImage existing onenand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: onenand: omap: use pdata info instead of cpu_isAfzal Mohammed
platform data now contains a field to indicate whether soc belongs to omap34xx family, use it instead of cpu_is_* check. This helps in removing dependency of platform specific header file - cpu.h Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: onenand: connected soc info in pdataAfzal Mohammed
onenand driver needs to know whether soc is falling under 34xx family to properly handle onenand. But driver is not supposed to do cpu_is_* check, hence educate platform data with this information. Driver can make use of it to avoid cpu_is_* check. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: nand: omap: read nand using register addressAfzal Mohammed
Now that gpmc-nand registers are available in driver, use it to read nand data. "65b97cf mtd: nand: omap2: handle nand on gpmc" modified all other instances. After initial versions of that patch, a new change added reading nand data using gpmc exposed function. In the final version this change was not taken care. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: nand: omap: free region as per resource sizeAfzal Mohammed
memory as is now obtained via resource, upon freeing use resource size. This also helps get rid of one macro. Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15mtd: onenand: omap: cleanup gpmc dependencyAfzal Mohammed
requesting, freeing gpmc cs is now handled fully by gpmc, remove left out gpmc dependency as well as unnecessary include of gpmc.h Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: gpmc: remove cs# in sync clk div calcAfzal Mohammed
Divider value for a certain sync clk is determined solely based on gpmc fclk. CS# does not have any role here, thus remove presence of CS# in clock divider calculation API. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com>
2012-10-15ARM: OMAP2+: GPMC: Remove unused OneNAND get_freq() platform functionJon Hunter
A platform function pointer for getting the frequency of a OneNAND device was added so that a platform could specify a custom function for returning the frequency and not just rely on the OneNAND version to determine the frequency. However, this platform function pointer is not currently being used and I am not sure if it ever has. OneNAND devices are not so common these days and as far as I know not being used with new devices. Therefore, it is most likely that this get_freq() function pointer will not be used and so remove it. Given that the get_freq() function pointer is not used, neither is the clk_dep variable and so all references to it can also be removed. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com>
2012-10-15ARM: OMAP2+: onenand: refactor for clarityAfzal Mohammed
Refactor set_async_mode & set_sync_mode functions to separate out timing calculation & actual configuration (GPMC & OneNAND side). Thanks to Jon for his suggestions. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com>
2012-10-15ALSA: hda - Fix registration race of VGA switcherooTakashi Iwai
Delay the registration of VGA switcheroo client to the end of the probing. Otherwise a too quick switching may result in Oops during probing. Also add the check of the return value from snd_hda_lock_devices(). Reported-and-tested-by: Daniel J Blueman <daniel@quora.org> Cc: <stable@vger.kernel.org> [v3.5+] Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-10-15ALSA: hda - Clean up superfluous position_fix list entriesTakashi Iwai
The white-list entries of position_fix for ASUS laptops have been added just as a workaround for broken COMBO mode. Now the combo mode itself is disabled, we can safely remove these entries. Signed-off-by: Takashi Iwai <tiwai@suse.de>
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