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2022-05-17net: thunderx: remove null check after call container_of()Haowen Bai
container_of() will never return NULL, so remove useless code. Signed-off-by: Haowen Bai <baihaowen@meizu.com> Link: https://lore.kernel.org/r/1652696212-17516-1-git-send-email-baihaowen@meizu.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-17octeontx2-pf: Use memset_startat() helper in otx2_stop()Xiu Jianfeng
Use memset_startat() helper to simplify the code, there is no functional change in this patch. Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com> Link: https://lore.kernel.org/r/20220516092337.131653-1-xiujianfeng@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-17Merge branch 'net-smc-send-and-write-inline-optimization-for-smc'Jakub Kicinski
Guangguan Wang says: ==================== net/smc: send and write inline optimization for smc Send cdc msgs and write data inline if qp has sufficent inline space, helps latency reducing. In my test environment, which are 2 VMs running on the same physical host and whose NICs(ConnectX-4Lx) are working on SR-IOV mode, qperf shows 0.4us-1.3us improvement in latency. Test command: server: smc_run taskset -c 1 qperf client: smc_run taskset -c 1 qperf <server ip> -oo \ msg_size:1:2K:*2 -t 30 -vu tcp_lat The results shown below: msgsize before after 1B 11.9 us 10.6 us (-1.3 us) 2B 11.7 us 10.7 us (-1.0 us) 4B 11.7 us 10.7 us (-1.0 us) 8B 11.6 us 10.6 us (-1.0 us) 16B 11.7 us 10.7 us (-1.0 us) 32B 11.7 us 10.6 us (-1.1 us) 64B 11.7 us 11.2 us (-0.5 us) 128B 11.6 us 11.2 us (-0.4 us) 256B 11.8 us 11.2 us (-0.6 us) 512B 11.8 us 11.3 us (-0.5 us) 1KB 11.9 us 11.5 us (-0.4 us) 2KB 12.1 us 11.5 us (-0.6 us) ==================== Link: https://lore.kernel.org/r/20220516055137.51873-1-guangguan.wang@linux.alibaba.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-17net/smc: rdma write inline if qp has sufficient inline spaceGuangguan Wang
Rdma write with inline flag when sending small packages, whose length is shorter than the qp's max_inline_data, can help reducing latency. In my test environment, which are 2 VMs running on the same physical host and whose NICs(ConnectX-4Lx) are working on SR-IOV mode, qperf shows 0.5us-0.7us improvement in latency. Test command: server: smc_run taskset -c 1 qperf client: smc_run taskset -c 1 qperf <server ip> -oo \ msg_size:1:2K:*2 -t 30 -vu tcp_lat The results shown below: msgsize before after 1B 11.2 us 10.6 us (-0.6 us) 2B 11.2 us 10.7 us (-0.5 us) 4B 11.3 us 10.7 us (-0.6 us) 8B 11.2 us 10.6 us (-0.6 us) 16B 11.3 us 10.7 us (-0.6 us) 32B 11.3 us 10.6 us (-0.7 us) 64B 11.2 us 11.2 us (0 us) 128B 11.2 us 11.2 us (0 us) 256B 11.2 us 11.2 us (0 us) 512B 11.4 us 11.3 us (-0.1 us) 1KB 11.4 us 11.5 us (0.1 us) 2KB 11.5 us 11.5 us (0 us) Signed-off-by: Guangguan Wang <guangguan.wang@linux.alibaba.com> Reviewed-by: Tony Lu <tonylu@linux.alibaba.com> Tested-by: kernel test robot <lkp@intel.com> Acked-by: Karsten Graul <kgraul@linux.ibm.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-17net/smc: send cdc msg inline if qp has sufficient inline spaceGuangguan Wang
As cdc msg's length is 44B, cdc msgs can be sent inline in most rdma devices, which can help reducing sending latency. In my test environment, which are 2 VMs running on the same physical host and whose NICs(ConnectX-4Lx) are working on SR-IOV mode, qperf shows 0.4us-0.7us improvement in latency. Test command: server: smc_run taskset -c 1 qperf client: smc_run taskset -c 1 qperf <server ip> -oo \ msg_size:1:2K:*2 -t 30 -vu tcp_lat The results shown below: msgsize before after 1B 11.9 us 11.2 us (-0.7 us) 2B 11.7 us 11.2 us (-0.5 us) 4B 11.7 us 11.3 us (-0.4 us) 8B 11.6 us 11.2 us (-0.4 us) 16B 11.7 us 11.3 us (-0.4 us) 32B 11.7 us 11.3 us (-0.4 us) 64B 11.7 us 11.2 us (-0.5 us) 128B 11.6 us 11.2 us (-0.4 us) 256B 11.8 us 11.2 us (-0.6 us) 512B 11.8 us 11.4 us (-0.4 us) 1KB 11.9 us 11.4 us (-0.5 us) 2KB 12.1 us 11.5 us (-0.6 us) Signed-off-by: Guangguan Wang <guangguan.wang@linux.alibaba.com> Reviewed-by: Tony Lu <tonylu@linux.alibaba.com> Tested-by: kernel test robot <lkp@intel.com> Acked-by: Karsten Graul <kgraul@linux.ibm.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-17net/qla3xxx: Fix a test in ql_reset_work()Christophe JAILLET
test_bit() tests if one bit is set or not. Here the logic seems to check of bit QL_RESET_PER_SCSI (i.e. 4) OR bit QL_RESET_START (i.e. 3) is set. In fact, it checks if bit 7 (4 | 3 = 7) is set, that is to say QL_ADAPTER_UP. This looks harmless, because this bit is likely be set, and when the ql_reset_work() delayed work is scheduled in ql3xxx_isr() (the only place that schedule this work), QL_RESET_START or QL_RESET_PER_SCSI is set. This has been spotted by smatch. Fixes: 5a4faa873782 ("[PATCH] qla3xxx NIC driver") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/80e73e33f390001d9c0140ffa9baddf6466a41a2.1652637337.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-18dt-bindings: interconnect: Remove sc7180/sdx55 ipa compatiblesStephen Boyd
These interconnects are modeled as clks, not interconnects, therefore remove the compatibles from the binding as they're unused. Cc: Alex Elder <elder@linaro.org> Cc: Taniya Das <quic_tdas@quicinc.com> Cc: Mike Tipton <quic_mdtipton@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220415005828.1980055-3-swboyd@chromium.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18Merge branch 'icc-rpm' into icc-nextGeorgi Djakov
This patch set is to address two clock rate setting issues. The first patch is to fix a potential cached clock rate mismatching issue, the issue can lead to the clock rate is missed to be set. Note, since this potential issue requires specific time window and certain condition (consumers need to request the same bandwidth) to produce, the patch is based on analysis but not a real trace log. The second patch is an extension to cache clock rates for active and sleep clocks separately, with this change it gives us possibility to set active and sleep clock with different clock rates. * icc-rpm interconnect: qcom: icc-rpm: Fix for cached clock rate interconnect: qcom: icc-rpm: Cache every clock rate Link: https://lore.kernel.org/r/20220416031029.693211-1-leo.yan@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18Merge branch 'icc-sc8180x' into icc-nextGeorgi Djakov
This contains a few fixes for the sc8180x interconnect provider driver to make it functional. * icc-sc8180x dt-bindings: interconnect: Add SC8180X QUP0 virt provider interconnect: qcom: sc8180x: Modernize sc8180x probe interconnect: qcom: sc8180x: Fix QUP0 nodes interconnect: qcom: sc8180x: Mark some BCMs keepalive Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18Merge branch 'icc-const' into icc-nextGeorgi Djakov
Constify structs that are not modified. Link: https://lore.kernel.org/r/20220412102623.227607-1-krzysztof.kozlowski@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18interconnect: qcom: sc8180x: Reformat node and bcm definitionsBjorn Andersson
The Qualcomm interconnect providers started off defining nodes and BCMs using the DEFINE_QNODE() and DEFINE_QBCM() macros. Unfortunately this results in a block of long lines that are hard to read, a transition to explicitly stated definition has been made for newly introduced platforms. Transition the SC8180X interconnect provider driver to this style as well, to make it easier to read while debugging interconnect related issues. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503225300.1141814-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18interconnect: qcom: sc8180x: Mark some BCMs keepaliveBjorn Andersson
In line with other platforms, mark BCMs controlling paths between the CPU, AOSS, GIC and memory as keepalive. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-5-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18interconnect: qcom: sc8180x: Fix QUP0 nodesBjorn Andersson
The QUP0 BCM relates to some internal property of the QUPs, and should be configured independently of the path to the QUP. In line with other platforms expose QUP_CORE endpoints in order allow this configuration. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-4-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18interconnect: qcom: sc8180x: Modernize sc8180x probeBjorn Andersson
The introduction of the Qualcomm SC8180X provider raced with the refactoring of the RPMh common code and SC8180X was left with the old style of duplicating the probe function in each provider driver. Transition the driver to the "new" design. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-3-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18dt-bindings: interconnect: Add SC8180X QUP0 virt providerBjorn Andersson
Add compatible for the QUP0 BCM provider found in SC8180X. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-2-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-17Merge tag 'pci-v5.18-fixes-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - Avoid putting Elo i2 PCIe Ports in D3cold because downstream devices are inaccessible after going back to D0 (Rafael J. Wysocki) - Qualcomm SM8250 has a ddrss_sf_tbu clock but SC8180X does not; make a SC8180X-specific config without the clock so it probes correctly (Bjorn Andersson) - Revert aardvark chained IRQ handler rewrite because it broke interrupt affinity (Pali Rohár) * tag 'pci-v5.18-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler" PCI: qcom: Remove ddrss_sf_tbu clock from SC8180X PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold
2022-05-18Merge branch 'icc-sdx65' into icc-nextGeorgi Djakov
This adds interconnect driver support for SDX65 platform for scaling the bandwidth requirements over RPMh. Link: https://lore.kernel.org/r/1649854415-11174-1-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-17Merge tag 'thermal-5.18-rc8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control fix from Rafael Wysocki: "Fix up a recent change in the int340x thermal driver that inadvertently broke thermal zone handling on some systems (Srinivas Pandruvada)" * tag 'thermal-5.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: thermal: int340x: Mode setting with new OS handshake
2022-05-18Merge branch 'icc-sc8280xp' into icc-nextGeorgi Djakov
Add interconnect driver support for Qualcomm SC8280XP platform. * icc-sc8280xp dt-bindings: interconnect: qcom: Add sc8280xp binding interconnect: qcom: Add SC8280XP interconnect provider interconnect: qcom: sc8280xp: constify qcom_icc_desc interconnect: qcom: sc8280xp: constify icc_node pointers interconnect: qcom: sc8280xp: constify qcom_icc_bcm pointers Link: https://lore.kernel.org/r/20220408214835.624494-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-17riscv: compat: Add COMPAT Kbuild skeletal supportGuo Ren
Adds initial skeletal COMPAT Kbuild (Running 32bit U-mode on 64bit S-mode) support. - Setup kconfig & dummy functions for compiling. - Implement compat_start_thread by the way. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220405071314.3225832-21-guoren@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-05-17riscv: compat: ptrace: Add compat_arch_ptrace implementGuo Ren
Now, you can use native gdb on riscv64 for rv32 app debugging. $ uname -a Linux buildroot 5.16.0-rc4-00036-gbef6b82fdf23-dirty #53 SMP Mon Dec 20 23:06:53 CST 2021 riscv64 GNU/Linux $ cat /proc/cpuinfo processor : 0 hart : 0 isa : rv64imafdcsuh mmu : sv48 $ file /bin/busybox /bin/busybox: setuid ELF 32-bit LSB shared object, UCB RISC-V, version 1 (SYSV), dynamically linked, interpreter /lib/ld-linux-riscv32-ilp32d.so.1, for GNU/Linux 5.15.0, stripped $ file /usr/bin/gdb /usr/bin/gdb: ELF 32-bit LSB shared object, UCB RISC-V, version 1 (GNU/Linux), dynamically linked, interpreter /lib/ld-linux-riscv32-ilp32d.so.1, for GNU/Linux 5.15.0, stripped $ /usr/bin/gdb /bin/busybox GNU gdb (GDB) 10.2 Copyright (C) 2021 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> ... Reading symbols from /bin/busybox... (No debugging symbols found in /bin/busybox) (gdb) b main Breakpoint 1 at 0x8ddc (gdb) r Starting program: /bin/busybox Failed to read a valid object file image from memory. Breakpoint 1, 0x555a8ddc in main () (gdb) i r ra 0x77df0b74 0x77df0b74 sp 0x7fdd3d10 0x7fdd3d10 gp 0x5567e800 0x5567e800 <bb_common_bufsiz1+160> tp 0x77f64280 0x77f64280 t0 0x0 0 t1 0x555a6fac 1431990188 t2 0x77dd8db4 2011008436 fp 0x7fdd3e34 0x7fdd3e34 s1 0x7fdd3e34 2145205812 a0 0xffffffff -1 a1 0x2000 8192 a2 0x7fdd3e3c 2145205820 a3 0x0 0 a4 0x7fdd3d30 2145205552 a5 0x555a8dc0 1431997888 a6 0x77f2c170 2012397936 a7 0x6a7c7a2f 1786542639 s2 0x0 0 s3 0x0 0 s4 0x555a8dc0 1431997888 s5 0x77f8a3a8 2012783528 s6 0x7fdd3e3c 2145205820 s7 0x5567cecc 1432866508 --Type <RET> for more, q to quit, c to continue without paging-- s8 0x1 1 s9 0x0 0 s10 0x55634448 1432568904 s11 0x0 0 t3 0x77df0bb8 2011106232 t4 0x42fc 17148 t5 0x0 0 t6 0x40 64 pc 0x555a8ddc 0x555a8ddc <main+28> (gdb) si 0x555a78f0 in mallopt@plt () (gdb) c Continuing. BusyBox v1.34.1 (2021-12-19 22:39:48 CST) multi-call binary. BusyBox is copyrighted by many authors between 1998-2015. Licensed under GPLv2. See source distribution for detailed copyright notices. Usage: busybox [function [arguments]...] or: busybox --list[-full] ... [Inferior 1 (process 107) exited normally] (gdb) q Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220405071314.3225832-20-guoren@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-05-17riscv: compat: signal: Add rt_frame implementationGuo Ren
Implement compat_setup_rt_frame for sigcontext save & restore. The main process is the same with signal, but the rv32 pt_regs' size is different from rv64's, so we needs convert them. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220405071314.3225832-19-guoren@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-05-17selinux: fix bad cleanup on error in hashtab_duplicate()Ondrej Mosnacek
The code attempts to free the 'new' pointer using kmem_cache_free(), which is wrong because this function isn't responsible of freeing it. Instead, the function should free new->htable and clear the contents of *new (to prevent double-free). Cc: stable@vger.kernel.org Fixes: c7c556f1e81b ("selinux: refactor changing booleans") Reported-by: Wander Lairson Costa <wander@redhat.com> Signed-off-by: Ondrej Mosnacek <omosnace@redhat.com> Signed-off-by: Paul Moore <paul@paul-moore.com>
2022-05-18rtc: meson: Fix email address in MODULE_AUTHORNobuhiro Iwamatsu
Ben Dooks's email address is <ben.dooks@codethink.co.uk>. Fix Ben Dooks's email address in MODULE_AUTHOR. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220506232850.220582-1-nobuhiro1.iwamatsu@toshiba.co.jp
2022-05-18rtc: simplify the return expression of rx8025_set_offset()Minghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220505022314.59822-1-chi.minghao@zte.com.cn
2022-05-17Merge tag 'v5.19-rockchip-clk2' of ↵Stephen Boyd
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip Pull Rockchip clk driver updates from Heiko Stuebner: Conversion from txt to Yaml for a number of Rockchip clock bindings. Some fixes for recent yaml conversion of clock bindinds and making the hclk_vo critical for rk3568. * tag 'v5.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: dt-bindings: clock: convert rockchip,rk3368-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3228-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3036-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3308-cru.txt to YAML dt-bindings: clock: convert rockchip,px30-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3288-cru.txt to YAML dt-bindings: clock: convert rockchip,rv1108-cru.txt to YAML dt-binding: clock: Add missing rk3568 cru bindings clk: rockchip: Mark hclk_vo as critical on rk3568 dt-bindings: clock: fix rk3399 cru clock issues dt-bindings: clock: use generic node name for pmucru example in rockchip,rk3399-cru.yaml dt-bindings: clock: replace a maintainer for rockchip,rk3399-cru.yaml dt-bindings: clock: fix some conversion style issues for rockchip,rk3399-cru.yaml
2022-05-18rtc: pcf85063: Add a compatible entry for pca85073aFabio Estevam
The PCA85073A RTC has the same programming model as the PCF85063A. Add a compatible entry for it. Tested on a custom i.MX6SX based board. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220419014445.341444-2-festevam@gmail.com
2022-05-18dt-binding: pcf85063: Add an entry for pca85073aFabio Estevam
The PCA85073A RTC has the same programming model as the PCF85063A. Add a compatible entry for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220419014445.341444-1-festevam@gmail.com
2022-05-18locking/atomic/x86: Introduce arch_try_cmpxchg64Uros Bizjak
Introduce arch_try_cmpxchg64 for 64-bit and 32-bit targets to improve code using cmpxchg64. On 64-bit targets, the generated assembly improves from: ab: 89 c8 mov %ecx,%eax ad: 48 89 4c 24 60 mov %rcx,0x60(%rsp) b2: 83 e0 fd and $0xfffffffd,%eax b5: 89 54 24 64 mov %edx,0x64(%rsp) b9: 88 44 24 60 mov %al,0x60(%rsp) bd: 48 89 c8 mov %rcx,%rax c0: c6 44 24 62 f2 movb $0xf2,0x62(%rsp) c5: 48 8b 74 24 60 mov 0x60(%rsp),%rsi ca: f0 49 0f b1 34 24 lock cmpxchg %rsi,(%r12) d0: 48 39 c1 cmp %rax,%rcx d3: 75 cf jne a4 <t+0xa4> to: b3: 89 c2 mov %eax,%edx b5: 48 89 44 24 60 mov %rax,0x60(%rsp) ba: 83 e2 fd and $0xfffffffd,%edx bd: 89 4c 24 64 mov %ecx,0x64(%rsp) c1: 88 54 24 60 mov %dl,0x60(%rsp) c5: c6 44 24 62 f2 movb $0xf2,0x62(%rsp) ca: 48 8b 54 24 60 mov 0x60(%rsp),%rdx cf: f0 48 0f b1 13 lock cmpxchg %rdx,(%rbx) d4: 75 d5 jne ab <t+0xab> where a move and a compare after cmpxchg is saved. The improvements for 32-bit targets are even more noticeable, because dual-word compare after cmpxchg8b gets eliminated. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220515184205.103089-3-ubizjak@gmail.com
2022-05-18locking/atomic: Add generic try_cmpxchg64 supportUros Bizjak
Add generic support for try_cmpxchg64{,_acquire,_release,_relaxed} and their falbacks involving cmpxchg64. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220515184205.103089-2-ubizjak@gmail.com
2022-05-18perf/x86/amd: Run AMD BRS code only on supported hwBorislav Petkov
This fires on a Fam16h machine here: unchecked MSR access error: WRMSR to 0xc000010f (tried to write 0x0000000000000018) \ at rIP: 0xffffffff81007db1 (amd_brs_reset+0x11/0x50) Call Trace: <TASK> amd_pmu_cpu_starting ? x86_pmu_dead_cpu x86_pmu_starting_cpu cpuhp_invoke_callback ? x86_pmu_starting_cpu ? x86_pmu_dead_cpu cpuhp_issue_call ? x86_pmu_starting_cpu __cpuhp_setup_state_cpuslocked ? x86_pmu_dead_cpu ? x86_pmu_starting_cpu __cpuhp_setup_state ? map_vsyscall init_hw_perf_events ? map_vsyscall do_one_initcall ? _raw_spin_unlock_irqrestore ? try_to_wake_up kernel_init_freeable ? rest_init kernel_init ret_from_fork because that CPU hotplug callback gets executed on any AMD CPU - not only on the BRS-enabled ones. Check the BRS feature bit properly. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-By: Stephane Eranian <eranian@google.com> Link: https://lkml.kernel.org/r/20220516154838.7044-1-bp@alien8.de
2022-05-18perf/x86/amd: Fix AMD BRS period adjustmentPeter Zijlstra
There's two problems with the current amd_brs_adjust_period() code: - it isn't in fact AMD specific and wil always adjust the period; - it adjusts the period, while it should only adjust the event count, resulting in repoting a short period. Fix this by using x86_pmu.limit_period, this makes it specific to the AMD BRS case and ensures only the event count is adjusted while the reported period is unmodified. Fixes: ba2fe7500845 ("perf/x86/amd: Add AMD branch sampling period adjustment") Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
2022-05-17lkdtm/heap: Hide allocation size from -Warray-boundsKees Cook
With the kmalloc() size annotations, GCC is smart enough to realize that LKDTM is intentionally writing past the end of the buffer. This is on purpose, of course, so hide the buffer from the optimizer. Silences: ../drivers/misc/lkdtm/heap.c: In function 'lkdtm_SLAB_LINEAR_OVERFLOW': ../drivers/misc/lkdtm/heap.c:59:13: warning: array subscript 256 is outside array bounds of 'void[1020]' [-Warray-bounds] 59 | data[1024 / sizeof(u32)] = 0x12345678; | ~~~~^~~~~~~~~~~~~~~~~~~~ In file included from ../drivers/misc/lkdtm/heap.c:7: In function 'kmalloc', inlined from 'lkdtm_SLAB_LINEAR_OVERFLOW' at ../drivers/misc/lkdtm/heap.c:54:14: ../include/linux/slab.h:581:24: note: at offset 1024 into object of size 1020 allocated by 'kmem_cache_alloc_trace' 581 | return kmem_cache_alloc_trace( | ^~~~~~~~~~~~~~~~~~~~~~~ 582 | kmalloc_caches[kmalloc_type(flags)][index], | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 583 | flags, size); | ~~~~~~~~~~~~ Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kees Cook <keescook@chromium.org>
2022-05-17selftests/lkdtm: Add configs for stackleak and "after free" testsMuhammad Usama Anjum
Add config options which are needed for LKDTM sub-tests: STACKLEAK_ERASING test needs GCC_PLUGIN_STACKLEAK config. READ_AFTER_FREE and READ_BUDDY_AFTER_FREE tests need INIT_ON_FREE_DEFAULT_ON config. Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20220517132932.1484719-1-usama.anjum@collabora.com
2022-05-17lkdtm/usercopy: Check vmalloc and >0-order foliosKees Cook
Add coverage for the recently added usercopy checks for vmalloc and folios, via USERCOPY_VMALLOC and USERCOPY_FOLIO respectively. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Matthew Wilcox (Oracle) <willy@infradead.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kees Cook <keescook@chromium.org>
2022-05-17PCI/AER: Clear MULTI_ERR_COR/UNCOR_RCV bitsKuppuswamy Sathyanarayanan
When a Root Port or Root Complex Event Collector receives an error Message e.g., ERR_COR, it sets PCI_ERR_ROOT_COR_RCV in the Root Error Status register and logs the Requester ID in the Error Source Identification register. If it receives a second ERR_COR Message before software clears PCI_ERR_ROOT_COR_RCV, hardware sets PCI_ERR_ROOT_MULTI_COR_RCV and the Requester ID is lost. In the following scenario, PCI_ERR_ROOT_MULTI_COR_RCV was never cleared: - hardware receives ERR_COR message - hardware sets PCI_ERR_ROOT_COR_RCV - aer_irq() entered - aer_irq(): status = pci_read_config_dword(PCI_ERR_ROOT_STATUS) - aer_irq(): now status == PCI_ERR_ROOT_COR_RCV - hardware receives second ERR_COR message - hardware sets PCI_ERR_ROOT_MULTI_COR_RCV - aer_irq(): pci_write_config_dword(PCI_ERR_ROOT_STATUS, status) - PCI_ERR_ROOT_COR_RCV is cleared; PCI_ERR_ROOT_MULTI_COR_RCV is set - aer_irq() entered again - aer_irq(): status = pci_read_config_dword(PCI_ERR_ROOT_STATUS) - aer_irq(): now status == PCI_ERR_ROOT_MULTI_COR_RCV - aer_irq() exits because PCI_ERR_ROOT_COR_RCV not set - PCI_ERR_ROOT_MULTI_COR_RCV is still set The same problem occurred with ERR_NONFATAL/ERR_FATAL Messages and PCI_ERR_ROOT_UNCOR_RCV and PCI_ERR_ROOT_MULTI_UNCOR_RCV. Fix the problem by queueing an AER event and clearing the Root Error Status bits when any of these bits are set: PCI_ERR_ROOT_COR_RCV PCI_ERR_ROOT_UNCOR_RCV PCI_ERR_ROOT_MULTI_COR_RCV PCI_ERR_ROOT_MULTI_UNCOR_RCV See the bugzilla link for details from Eric about how to reproduce this problem. [bhelgaas: commit log, move repro details to bugzilla] Fixes: e167bfcaa4cd ("PCI: aerdrv: remove magical ROOT_ERR_STATUS_MASKS") Link: https://bugzilla.kernel.org/show_bug.cgi?id=215992 Link: https://lore.kernel.org/r/20220418150237.1021519-1-sathyanarayanan.kuppuswamy@linux.intel.com Reported-by: Eric Badger <ebadger@purestorage.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ashok Raj <ashok.raj@intel.com>
2022-05-17MAINTAINERS: Add myself as maintainer of the RZN1 RTC driverMiquel Raynal
After contributing it, I'll volunteer to maintain it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-6-miquel.raynal@bootlin.com
2022-05-17rtc: rzn1: Add oscillator offset supportMiquel Raynal
The RZN1 RTC can compensate the imprecision of the oscillator up to approximately 190ppm. Seconds can last slightly shorter or longer depending on the configuration. Below ~65ppm of correction, we can change the time spent in a second every minute, which is the most accurate compensation that the RTC can offer. Above, the compensation will be active every 20s. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-5-miquel.raynal@bootlin.com
2022-05-17rtc: rzn1: Add alarm supportMiquel Raynal
The RZN1 RTC can trigger an interrupt when reaching a particular date up to 7 days ahead. Bring support for this alarm. One drawback though, the granularity is about a minute. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-4-miquel.raynal@bootlin.com
2022-05-17rtc: rzn1: Add new RTC driverMichel Pollet
Add a basic RTC driver for the RZ/N1. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Co-developed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-3-miquel.raynal@bootlin.com
2022-05-17dt-bindings: rtc: rzn1: Describe the RZN1 RTCMiquel Raynal
Add new binding file for this RTC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220516082504.33913-2-miquel.raynal@bootlin.com
2022-05-17rtc: sun6i: Add NVMEM providerSamuel Holland
The sun6i RTC provides 32 bytes of general-purpose data registers. They can be used to save data in the always-on RTC power domain. The registers are writable via 32-bit MMIO accesses only. Expose them with a NVMEM provider so they can be used by other drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220413231731.56709-1-samuel@sholland.org
2022-05-17i3c: master: svc: fix returnvar.cocci warningGuo Zhengkui
Fix the following coccicheck warning: drivers/i3c/master/svc-i3c-master.c:1600:5-8: Unneeded variable: "ret". Return "0" on line 1605. Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220504164901.9622-1-guozhengkui@vivo.com
2022-05-17i3c/master: simplify the return expression of i3c_hci_remove()Minghao Chi
Simplify the return expression. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220505021954.54524-1-chi.minghao@zte.com.cn
2022-05-17drm/dp/mst: fix a possible memory leak in fetch_monitor_name()Hangyu Hua
drm_dp_mst_get_edid call kmemdup to create mst_edid. So mst_edid need to be freed after use. Signed-off-by: Hangyu Hua <hbh25y@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: stable@vger.kernel.org Link: https://patchwork.freedesktop.org/patch/msgid/20220516032042.13166-1-hbh25y@gmail.com
2022-05-17parisc: Fix patch code locking and flushingJohn David Anglin
This change fixes the following: 1) The flags variable is not initialized. Always use raw_spin_lock_irqsave and raw_spin_unlock_irqrestore to serialize patching. 2) flush_kernel_vmap_range is primarily intended for DMA flushes. The whole cache flush in flush_kernel_vmap_range is only possible when interrupts are enabled on SMP machines. Since __patch_text_multiple calls flush_kernel_vmap_range with interrupts disabled, it is better to directly call flush_kernel_dcache_range_asm and flush_kernel_icache_range_asm. 3) The final call to flush_icache_range is unnecessary. Tested with `[PATCH, V3] parisc: Rewrite cache flush code for PA8800/PA8900' change on rp3440, c8000 and c3750 (32 and 64-bit). Note by Helge: This patch had been temporarily reverted shortly before v5.18-rc6 in order to fix boot issues. Now it can be re-applied. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-05-17parisc: Rewrite cache flush code for PA8800/PA8900John David Anglin
Originally, I was convinced that we needed to use tmpalias flushes everwhere, for both user and kernel flushes. However, when I modified flush_kernel_dcache_page_addr, to use a tmpalias flush, my c8000 would crash quite early when booting. The PDC returns alias values of 0 for the icache and dcache. This indicates that either the alias boundary is greater than 16MB or equivalent aliasing doesn't work. I modified the tmpalias code to make it easy to try alternate boundaries. I tried boundaries up to 128MB but still kernel tmpalias flushes didn't work on c8000. This led me to conclude that tmpalias flushes don't work on PA8800 and PA8900 machines, and that we needed to flush directly using the virtual address of user and kernel pages. This is likely the major cause of instability on the c8000 and rp34xx machines. Flushing user pages requires doing a temporary context switch as we have to flush pages that don't belong to the current context. Further, we have to deal with pages that aren't present. If a page isn't present, the flush instructions fault on every line. Other code has been rearranged and simplified based on testing. For example, I introduced a flush_cache_dup_mm routine. flush_cache_mm and flush_cache_dup_mm differ in that flush_cache_mm calls purge_cache_pages and flush_cache_dup_mm calls flush_cache_pages. In some implementations, pdc is more efficient than fdc. Based on my testing, I don't believe there's any performance benefit on the c8000. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-05-17parisc: Disable debug code regarding cache flushes in handle_nadtlb_fault()John David Anglin
Change the "BUG" to "WARNING" and disable the message because it triggers occasionally in spite of the check in flush_cache_page_if_present. The pte value extracted for the "from" page in copy_user_highpage is racy and occasionally the pte is cleared before the flush is complete. I assume that the page is simultaneously flushed by flush_cache_mm before the pte is cleared as nullifying the fdc doesn't seem to cause problems. I investigated various locking scenarios but I wasn't able to find a way to sequence the flushes. This code is called for every COW break and locks impact performance. This patch is related to the bigger cache flush patch because we need the pte on PA8800/PA8900 to flush using the vma context. I have also seen this from copy_to_user_page and copy_from_user_page. The messages appear infrequently when enabled. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2022-05-17Merge tag 'clk-imx-5.19' of ↵Stephen Boyd
git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx Pull i.MX clk driver updates from Abel Vesa: - Add 27 MHz phy PLL ref clock - Add mcore_booted module parameter to tell kernel M core has already booted - Remove snvs clock - Add bindings for i.MX8MN GPT - Add check for kcalloc - Fix for a potential memory leak in __imx_clk_gpr_sync - Add DISP2 pixel clock for i.MX8MP - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage - Add clkout1/2 for i.MX8MP - Fix parent clock of ubs_root_clk for i.MX8MP * tag 'clk-imx-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux: clk: imx8mp: fix usb_root_clk parent clk: imx8mp: add clkout1/2 support clk: imx: scu: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage clk: imx8mp: Add DISP2 pixel clock clk: imx: scu: fix a potential memory leak in __imx_clk_gpr_scu() clk: imx: Add check for kcalloc clk: imx8mn: add GPT support dt-bindings: imx: add clock bindings for i.MX8MN GPT clk: imx: Remove the snvs clock clk: imx8m: check mcore_booted before register clk clk: imx: add mcore_booted module paratemter clk: imx8mq: add 27m phy pll ref clock
2022-05-17docs: pdfdocs: Add space for chapter counts >= 100 in TOCAkira Yokosawa
It turns out that networking.pdf has exceeded 100 chapters and titles of chapters >= 100 collide with their counts in its table of contents (TOC). Increase relevant params by 0.6em in the preamble to avoid such ugly collisions. While at it, fix a typo in comment (subsection). Signed-off-by: Akira Yokosawa <akiyks@gmail.com> Link: https://lore.kernel.org/r/bdb60ba3-7813-47d0-74f9-7c31dd912d95@gmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
generated by cgit (git 2.34.1) at 2025-10-03 11:05:43 +0000