| Age | Commit message (Collapse) | Author |
|---|
|
Setup pinmux for CPI and register the mt9t001 camera sensor
in ISP subsystem.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Register OMAP DRM/KMS platform device. DMM is split into a
separate device using hwmod.
Signed-off-by: Andy Gross <andy.gross@ti.com>
Signed-off-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
write_file_bool() modifies 32 bits of data, so "amd_iommu_unmap_flush"
needs to be 32 bits as well or we'll corrupt memory. Fortunately it
looks like the data is aligned with a gap after the declaration so this
is harmless in production.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|
|
Even though it has "bool" in the name, you have pass a u32 pointer to
debugfs_create_bool(). Otherwise you get memory corruption in
write_file_bool(). Fortunately in this case the corruption happens in
an alignment hole between variables so it doesn't cause any problems.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|
|
allo_pdir() is called in smmu_iommu_domain_init() with spin_lock
held. memory allocations in it have to be atomic/unsleepable.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reported-by: Chris Wright <chrisw@sous-sol.org>
Acked-by: Chris Wright <chrisw@sous-sol.org>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|
|
commit 435ca24 (ARM i.MX: Visstrim_M10: Add board version detection)
included <asm/system.h>, which is a header file about to be deleted according to
9f97da (Disintegrate asm/system.h for ARM)
Include <asm/system_info.h> instead.
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Add support for TWL4030, which is interfaced on i2c1 bus.
Also add clock frequencies for other i2c instances (2 & 3)
required for client-device exist on OMAP3EVM board.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add AM3517 EVM (AM3517/05) DTS file to use the omap3.dtsi SoC file,
along with memory node and basic i2c information.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Simple DTS file for OMAP2420H4 board adding memory information to allow
device-tree testing on an OMAP2420. OMAP2420H4 board has 64MB of RAM.
Verified that kernel boots with DT using a simple RAMDISK file-system on
OMAP2420H4.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Presently the SH7720/21 serial code uses asm/gpio.h to get at the CPU
GPIO port definitions, but in the case of GPIOLIB=y this also includes
references to generic GPIOLIB routines that we don't have any function
declarations for, tripping up on -Werror=implicit-function-declaration
with newer gcc versions:
CC arch/sh/kernel/cpu/sh3/serial-sh7720.o
In file included from include/linux/sh_pfc.h:14:0,
from arch/sh/include/asm/gpio.h:23,
from arch/sh/kernel/cpu/sh3/serial-sh7720.c:5:
include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
include/asm-generic/gpio.h:220:2: error: implicit declaration of function '__gpio_get_value' [-Werror=implicit-function-declaration]
include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
include/asm-generic/gpio.h:226:2: error: implicit declaration of function '__gpio_set_value' [-Werror=implicit-function-declaration]
In file included from arch/sh/include/asm/gpio.h:23:0,
from arch/sh/kernel/cpu/sh3/serial-sh7720.c:5:
include/linux/sh_pfc.h: At top level:
include/linux/sh_pfc.h:121:19: error: field 'chip' has incomplete type
Switch to using the cpu/ version for the port definitions explicitly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Since we are taking a registers, this should never have been an sldi.
Talking to paulus offline, this is the correct fix.
Was introduced by:
commit 19ccb76a1938ab364a412253daec64613acbf3df
Author: Paul Mackerras <paulus@samba.org>
Date: Sat Jul 23 17:42:46 2011 +1000
Talking to paulus, this shouldn't be a literal.
Signed-off-by: Michael Neuling <mikey@neuling.org>
CC: <stable@kernel.org> [v3.2+]
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
We have a bug report where the kernel hits a warning in the cpumask
code:
WARNING: at include/linux/cpumask.h:107
Which is:
WARN_ON_ONCE(cpu >= nr_cpumask_bits);
The backtrace is:
cpu_cmd
cmds
xmon_core
xmon
die
xmon is iterating through 0 to NR_CPUS. I'm not sure why we are still
open coding this but iterating above nr_cpu_ids is definitely a bug.
This patch iterates through all possible cpus, in case we issue a
system reset and CPUs in an offline state call in.
Perhaps the old code was trying to handle CPUs that were in the
partition but were never started (eg kexec into a kernel with an
nr_cpus= boot option). They are going to die way before we get into
xmon since we haven't set any kernel state up for them.
Signed-off-by: Anton Blanchard <anton@samba.org>
CC: <stable@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
In SiRFprimaII, Each GPIO pin can be configured as input or output
independently. If a GPIO is configured as input, it can also be
enabled as an interrupt source (either edge or level triggered).
These pins must be either MUXed as GPIO or other function pads.
Signed-off-by: Yuping Luo <yuping.luo@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
|
|
There are a number of clkdev lookups left over from commit b0286f2
(ARM: imx6q: prepare and enable init on clks directly instead of
clk_get first), remove them since they are not needed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Add the DT node for gpmi nand.
Add the pinmux support for gpmi nand.
The gpmi nand may conflicts with other modules, such as MMC.
So we do not enable the gpmi nand for mx6q-arm2 board, just add the
node for the board.
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
add clock for apbh-dma.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
add DT node for apbh-dma.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Remove SPI0_CS, MMC_CD and MMC_WP gpios as they moved to devicetree.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
|
|
USB and I2C initialization can be removed safely from the board specific
phy3250.c, now that initialization moved to the generalized clock.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
Move most of usb clock initialization from lpc32xx_udc and ohci-nxp to
clock.c. Also adds ohci clocks and otg clocks.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
|
|
This patch fixes a bug, (wrongfully) resetting the value of
LPC32XX_CLKPWR_MS_CTRL back to its initial contents (after careful setup). This
was discovered only with a board/bootloader combination (EA3250) where the
contents of the respective register wasn't already at the correct value on
Linux boot.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
This patch makes sure certain MMC bits are cleared as they should for
initialization.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
This patch moves MMC/SD controller initialization from the board specific file
phy3250.c to clock.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
This defconfig update for LPC32xx adds interrupt and polled gpio keyboard
drivers.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
This DTS file update adds:
* 3-channel ADC (for AD-IN on AD2, or 3-axis-accelerometer)
* Interrupt key
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
|
|
of_get_named_gpio() needs the driver hosting the GPIO that the DT
property references to have been probed. Detect this specific failure,
and defer the probe of the whole regulator until this API can complete.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
|
Convert tps65217_pmic_ldo1_ops to use regulator_list_voltage_table.
We have n_voltages and volt_table settings in regulator_desc,
so we don't need the table and table_len fields in struct tps_info.
Thus remove them from struct tps_info.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
|
This definition is missing when CONFIG_REGULATOR is not defined.
This causes compiler errors when compiling sdhci.c. This can
be worked around by adding #ifdef CONFIG_REGULATOR .. #endif
but since other definitions are there we have defined the missing
definition
Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
|
Pull two ARM fixes from Russell King:
"It's been fairly quiet with the fixes. Just two this time. One fixes
a long standing problem with KALLSYMS needing an additional pass, and
the other sorts a problem with the vmalloc space interacting with
static IO mappings."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7438/1: fill possible PMD empty section gaps
ARM: 7428/1: Prevent KALLSYM size mismatch on ARM.
|
|
The reload interface should be per-system so that a full system ucode
reload happens (on each core) when doing
echo 1 > /sys/devices/system/cpu/microcode/reload
Move it to the cpu subsys directory instead of it being per-cpu.
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Link: http://lkml.kernel.org/r/1340280437-7718-3-git-send-email-bp@amd64.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
Microcode reloading in a per-core manner is a very bad idea for both
major x86 vendors. And the thing is, we have such interface with which
we can end up with different microcode versions applied on different
cores of an otherwise homogeneous wrt (family,model,stepping) system.
So turn off the possibility of doing that per core and allow it only
system-wide.
This is a minimal fix which we'd like to see in stable too thus the
more-or-less arbitrary decision to allow system-wide reloading only on
the BSP:
$ echo 1 > /sys/devices/system/cpu/cpu0/microcode/reload
...
and disable the interface on the other cores:
$ echo 1 > /sys/devices/system/cpu/cpu23/microcode/reload
-bash: echo: write error: Invalid argument
Also, allowing the reload only from one CPU (the BSP in
that case) doesn't allow the reload procedure to degenerate
into an O(n^2) deal when triggering reloads from all
/sys/devices/system/cpu/cpuX/microcode/reload sysfs nodes
simultaneously.
A more generic fix will follow.
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Link: http://lkml.kernel.org/r/1340280437-7718-2-git-send-email-bp@amd64.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: <stable@vger.kernel.org>
|
|
As all irqchips on imx have been changed to allocate their irq_descs,
and all unneeded mach/irqs.h inclusions on imx have been cleaned up,
now it's time to select SPARSE_IRQ for imx/mxc.
The SPARSE_IRQ support forces irqs allocation starting from 16. All
those static irq number definition for SoCs need to shift 16 to keep
non-DT boot works.
With all those static IRQ number and start definitions removed from
mach/irqs.h, the header becomes just a container of a couple of
mach-imx specific irq/fiq calls. Since mach/irqs.h is not included
by asm/irq.h now, the users of mxc_set_irq_fiq needs to explicitly
include mach/irqs.h themselves.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
The commit a2be01b (ARM: only include mach/irqs.h for !SPARSE_IRQ)
makes mach/irqs.h only be included for !SPARSE_IRQ build. There are
a nubmer of platforms have FIQ_START defined in mach/irqs.h for FIQ
support.
arch/arm/mach-rpc/include/mach/irqs.h:#define FIQ_START 64
arch/arm/mach-s3c24xx/include/mach/irqs.h:#define FIQ_START IRQ_EINT0
arch/arm/plat-mxc/include/mach/irqs.h:#define FIQ_START 0
If SPARSE_IRQ is enabled for any of these platforms, the following
compile error will be seen.
arch/arm/kernel/fiq.c: In function ‘enable_fiq’:
arch/arm/kernel/fiq.c:127:19: error: ‘FIQ_START’ undeclared (first use in this function)
arch/arm/kernel/fiq.c:127:19: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/kernel/fiq.c: In function ‘disable_fiq’:
arch/arm/kernel/fiq.c:132:20: error: ‘FIQ_START’ undeclared (first use in this function)
The patch changes fiq code to have init_FIQ take FIQ_START from
platforms as a parameter and assign it to variable fiq_start which
is to replace FIQ_START uses in enable_fiq/disable_fiq.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
As the part of the effort to enable SPARE_IRQ for imx platform,
the macro MXC_INTERNAL_IRQS will be removed. The imx serial driver
has a references to it for a decision on flags of request_irq call
based on rtsirq is beyond MXC_INTERNAL_IRQS. However the searching
on imx platform code tells that rtsirq will never be beyond
MXC_INTERNAL_IRQS. That said, the check, consequently the reference
to MXC_INTERNAL_IRQS are not needed, so remove them.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: linux-serial@vger.kernel.org
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Remove unneeded mach/irq.h inclusion from imx platform code.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Remove unneeded mach/irq.h inclusion from i2c-imx driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: linux-i2c@vger.kernel.org
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Call irq_alloc_descs to get the irq_base for mx31ads, and add a legacy
irqdomain using the irq_base, so that the mapping between mx31ads
hardware irq and Linux irq number can be dynamically handled by
irqdomain. As the result, the use of MXC_BOARD_IRQ_START can be
completely removed from mach-mx31ads.c.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Call irq_alloc_descs to get the irq_base for 3ds_debugboard, and add
a legacy irqdomain using the irq_base, so that the mapping between
3ds_debugboard hardware irq and Linux irq number can be dynamically
handled by irqdomain. As the result, the use of MXC_BOARD_IRQ_START
can be completely removed from 3ds_debugboard.c.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Change mxc_expio_init interface a little bit to have gpio than irq
number passed in. With the change, gpio_to_irq can be called inside
mxc_expio_init to get irq number, so that MXC_IRQ_TO_GPIO can be
removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
With commit d1738ae (mfd: Allocate wm835x irq descs dynamically) being
in the tree, there is no need to initialize irq_base field of struct
wm8350_platform_data. Remove it to save one reference to macro
MXC_BOARD_IRQ_START.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
The struct ipu_platform_data is used by platform code to pass
MXC_IPU_IRQ_START to ipu-core driver. We can save it by having
ipu-core driver call irq_alloc_descs to get the irq_base.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Move irq_domain_add_legacy call from imx27-dt.c into avic init function
and have the avic driver adopt irqdomain support for both DT and non-DT
boot.
Now avic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between avic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Move irq_domain_add_legacy call from imx5*-dt.c into tzic init function
and have the tzic driver adopt irqdomain support for both DT and non-DT
boot.
Now tzic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between tzic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
Move irq_domain_add_legacy call from imx*-dt.c into gpio driver and
have the gpio driver adopt irqdomain support for both DT and non-DT
boot.
With all imx platform code converted from static gpio irq number
computation to use run-time gpio_to_irq call, we can now use
irq_alloc_descs and irqdomain support to dynamically get irq_base
and have the mapping between gpio and irq number available without
using virtual_irq_start and MXC_GPIO_IRQ_START.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
This patch changes all the static gpio irq number assigning with
IRQ_GPIOA() ... IRQ_GPIOF() to run-time assigning with gpio_to_irq
call, and in turn eliminates these macros.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
This patch changes all the static gpio irq number assigning with
IOMUX_TO_IRQ() to run-time assigning with gpio_to_irq call, and
in turn eliminates the macro IOMUX_TO_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
|
|
This patch changes all the static gpio irq number assigning with
IMX_GPIO_TO_IRQ() to run-time assigning with gpio_to_irq call, and
in turn eliminates the macro IMX_GPIO_TO_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
On ARM with the 2-level page table format, a PMD entry is represented by
two consecutive section entries covering 2MB of virtual space.
However, static mappings always were allowed to use separate 1MB section
entries. This means in practice that a static mapping may create half
populated PMDs via create_mapping().
Since commit 0536bdf33f (ARM: move iotable mappings within the vmalloc
region) those static mappings are located in the vmalloc area. We must
ensure no such half populated PMDs are accessible once vmalloc() or
ioremap() start looking at the vmalloc area for nearby free virtual
address ranges, or various things leading to a kernel crash will happen.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: "R, Sricharan" <r.sricharan@ti.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Add runtime PM core support to davinci by using the pm_clk
infrastructure of the PM core.
When runtime PM is enabled, the davinci runtime PM implementation will
use the pm_clk layer to enable/disable clocks on demand. When runtime
PM is disabled, the pm_clk core will automatically enable clocks when
the driver is bound and disable clocks when the driver is unbound.
Cc: Mark A. Greer <mgreer@animalcreek.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
[nsekhar@ti.com: pruned list of header file includes and removed some
debug code]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
|
|
While resuming a device belonging to a PM domain,
pm_genpd_runtime_resume() calls __pm_genpd_restore_device() to
restore its state, if necessary. The latter starts the device,
using genpd_start_dev(), restores its state, using
genpd_restore_dev(), and then stops it, using genpd_stop_dev().
However, this last operation is not necessary, because the
device is supposed to be operational after pm_genpd_runtime_resume()
has returned and because of it pm_genpd_runtime_resume() has to
call genpd_start_dev() once again for the "restored" device, which
is inefficient.
To make things more efficient, remove the call to genpd_stop_dev()
from __pm_genpd_restore_device() and the direct call to
genpd_start_dev() from pm_genpd_runtime_resume(). [Of course,
genpd_start_dev() still has to be called by it for devices with the
power.irq_safe flag set, because __pm_genpd_restore_device() is not
executed for them.]
This change has been tested on the SH7372 Mackerel board.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
|
