summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2023-03-05MAINTAINERS: add myself as maintainer for Microchip AT91 sound driversClaudiu Beznea
Codrin is not with Microchip anymore. As I worked lately with Microchip AT91 sound drivers add myself as maintainer for these. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-8-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-pdmc: avoid casting to/from void pointerClaudiu Beznea
Do not cast to and from void pointer. There is no need for this. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-7-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-pdmc: return directly retClaudiu Beznea
Return directly ret instead of having different branches for error and OK paths. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-6-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-pdmc: use FIELD_PREP() where possibleClaudiu Beznea
Use FIELD_PREP() macro where possible instead of driver local defined macros. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-5-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-spdiftx: update debug messageClaudiu Beznea
Previous debug message states that there was a failure and tx was not disabled. Which is not true as the TX in this function could also be enabled. Thus improve a bit the debug message by s/disable/start\/stop/. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-4-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-spdiftx: use regmap_update_bits()Claudiu Beznea
Use regmap_update_bits() instead of regmap_read(), running variable, regmap_write(). There is no need for extra variables and checks around it as regmap_update_bits() already does this. With this code becomes simpler. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-3-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: mchp-spdiftx: use FIELD_PREP() where possibleClaudiu Beznea
Use directly FIELD_PREP() marco where possible. There is no need for the extra wrappers. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230301113807.24036-2-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: maxim,max9867: add "mclk" supportBenjamin Bara
Add basic support for the codecs' mclk. Enable it on SND_SOC_BIAS_ON, disable it on SND_SOC_BIAS_OFF. Signed-off-by: Benjamin Bara <benjamin.bara@skidata.com> Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Link: https://lore.kernel.org/r/20230302-max9867-v2-3-fd2036d5e825@skidata.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: dt-bindings: maxim,max9867: add clocks propertyRichard Leitner
Add clocks property to require a "mclk" definition for the maxim,max9867 codec. Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Link: https://lore.kernel.org/r/20230302-max9867-v2-2-fd2036d5e825@skidata.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: dt-bindings: maxim,max9867: convert txt bindings to yamlRichard Leitner
Convert from max9867.txt to maxim,max9867.yaml and add missing '#sound-dai-cells' property. Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230302-max9867-v2-1-fd2036d5e825@skidata.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: SOF: Intel: MTL: Enable DMI L1Ranjani Sridharan
DMI L1 should be enabled unconditionally after FW boot is complete. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230220075804.4829-4-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: SOF: Intel: hda: Restrict DMI L1 disable workaroundRanjani Sridharan
The workaround to disable DMI L1 should be restricted to only the CAVS IP's. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230220075804.4829-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: SOF: Intel: hda: Do not re-enable L1 if disabled before suspendRanjani Sridharan
We have a workaround in place to address a known issue with host DMA running into xruns when capture streams are running. But when resuming from Sx, we unconditionally re-enable DMI L1 without taking the workaround into account and this could lead to xruns when a suspended capture stream is restarted. To fix this rename the flag l1_support_enabled to l1_disabled in struct sof_intel_hda_dev to save the L1 disabled status which can be set/cleared when we get/put a stream and use the flag to determine if DMI L1 should enabled or not during the post_fw_run op. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230220075804.4829-2-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Add components prefix in structs and function namesLucas Tanure
Add prefixes 8821/35l41 in structs and function names so future platforms can be added and reference the correct sound card. Also include acp5x prefix to cs35l41_conf. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-10-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Centralize strings definitionLucas Tanure
Replace occurrences of strings by their definition, avoiding bugs where the string changed, but not all places have been modified. While at it rename defines to use NAU8821 codec name instead of NUVOTON and align with the other defines. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-9-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Move nau8821 and CPU side code up for future platformLucas Tanure
Move nau8821 and CPU side code up in the source so future platforms can be added. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-8-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Check Bit Clock rate before snd_soc_dai_set_pllLucas Tanure
Check bit clock is valid before setting it with snd_soc_dai_set_pll Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-7-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: use for_each_rtd_components instead of forLucas Tanure
To iterate over components use for_each_rtd_components And compare to component name, so asoc_rtd_to_codec and the dai code can be removed Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-6-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: remove unnecessarily included headersLucas Tanure
Remove unused includes and replace <linux/input.h> by <linux/input-event-codes.h> Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-5-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: use sizeof of variable instead of struct typeLucas Tanure
Use sizeof(*machine) instead of sizeof(struct acp5x_platform_info) There is a possibility of bug when variable type has changed but corresponding struct passed to the sizeof has not. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-4-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Small code refactorLucas Tanure
Small refactor of the code: - sort includes in alphabetical order - sort variables declarations by line length - remove unnecessary "struct snd_soc_card *card" lines - insert blank lines before return - break/unbreak some lines for better read - align defines Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-3-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: amd: vangogh: Remove unnecessary init functionLucas Tanure
Remove empty acp5x_cs35l41_init function Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230217110850.1045250-2-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05MAINTAINERS: add the Freescale QMC audio entryHerve Codina
After contributing the component, add myself as the maintainer for the Freescale QMC audio ASoC component. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-11-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: fsl: Add support for QMC audioHerve Codina
The QMC audio is an ASoC component which provides DAIs that use the QMC (QUICC Multichannel Controller) to transfer the audio data. It provides as many DAIs as the number of QMC channels it references. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Tested-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-10-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05dt-bindings: sound: Add support for QMC audioHerve Codina
The QMC (QUICC mutichannel controller) is a controller present in some PowerQUICC SoC such as MPC885. The QMC audio is an ASoC component that uses the QMC controller to transfer the audio data. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-9-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05MAINTAINERS: add the Freescale QMC controller entryHerve Codina
After contributing the driver, add myself as the maintainer for the Freescale QMC controller. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-8-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05soc: fsl: cpm1: Add support for QMCHerve Codina
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one serial controller using the same TDM physical interface routed from the TSA. It is available in some PowerQUICC SoC such as the MPC885 or MPC866. It is also available on some Quicc Engine SoCs. This current version support CPM1 SoCs only and some enhancement are needed to support Quicc Engine SoCs. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-7-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05dt-bindings: soc: fsl: cpm_qe: Add QMC controllerHerve Codina
Add support for the QMC (QUICC Multichannel Controller) available in some PowerQUICC SoC such as MPC885 or MPC866. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-6-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05powerpc/8xx: Use a larger CPM1 command check maskHerve Codina
The CPM1 command mask is defined for use with the standard CPM1 command register as described in the user's manual: 0 |1 3|4 7|8 11|12 14| 15| RST| - |OPCODE|CH_NUM| - |FLG| In the QMC extension the CPM1 command register is redefined (QMC supplement user's manuel) with the following mapping: 0 |1 3|4 7|8 13|14| 15| RST|QMC OPCODE| 1110|CHANNEL_NUMBER| -|FLG| Extend the check command mask in order to support both the standard CH_NUM field and the QMC extension CHANNEL_NUMBER field. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20230217145645.1768659-5-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05MAINTAINERS: add the Freescale TSA controller entryHerve Codina
After contributing the driver, add myself as the maintainer for the Freescale TSA controller. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-4-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05soc: fsl: cpm1: Add support for TSAHerve Codina
The TSA (Time Slot Assigner) purpose is to route some TDM time-slots to other internal serial controllers. It is available in some PowerQUICC SoC such as the MPC885 or MPC866. It is also available on some Quicc Engine SoCs. This current version support CPM1 SoCs only and some enhancement are needed to support Quicc Engine SoCs. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-3-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05dt-bindings: soc: fsl: cpm_qe: Add TSA controllerHerve Codina
Add support for the time slot assigner (TSA) available in some PowerQUICC SoC such as MPC885 or MPC866. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-2-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: tas571x: add support for TAS5733Kamel Bouhara
This adds support for TAS5733. Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Link: https://lore.kernel.org/r/20230222083300.218523-3-kamel.bouhara@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: tas571x: add tas5733 compatibleKamel Bouhara
This adds the tas5733 to the TAS571X binding. Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230222083300.218523-2-kamel.bouhara@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: sh: rz-ssi: Update interrupt handling for half duplex channelsLad Prabhakar
For half duplex channels we dont have separate interrupts for Tx and Rx instead we have single interrupt Rt (where the signal for Rx and Tx is muxed). To handle such a case install a handler in case we have a dma_rt interrupt specified in the DT for the PIO mode. Note, for backward compatibility we check if the Rx and Tx interrupts are present first instead of checking Rt interrupt. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20230217185225.43310-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names ↵Lad Prabhakar
properties From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being marked as reserved (this applies to RZ/G2L and alike SoC's). This patch updates the binding doc to match the same. While at it also updated the example node. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230217185225.43310-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: dt-bindings: cirrus,cs35l41: Document CS35l41 shared boostLucas Tanure
Describe the properties used for shared boost configuration. Based on David Rhodes shared boost patches. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Rhodes <david.rhodes@cirrus.com> Link: https://lore.kernel.org/r/20230223084324.9076-5-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ALSA: cs35l41: Add shared boost featureLucas Tanure
Shared boost allows two amplifiers to share a single boost circuit by communicating on the MDSYNC bus. The passive amplifier does not control the boost and receives data from the active amplifier. Shared Boost is not supported in HDA Systems. Based on David Rhodes shared boost patches. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Reviewed-by: David Rhodes <david.rhodes@cirrus.com> Link: https://lore.kernel.org/r/20230223084324.9076-4-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: cs35l41: Refactor error release codeLucas Tanure
Add cs35l41_error_release function to handle error release sequences. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: David Rhodes <david.rhodes@cirrus.com> Link: https://lore.kernel.org/r/20230223084324.9076-3-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: cs35l41: Only disable internal boostLucas Tanure
In error situations, only the internal boost case should be disabled and re-enabled. Also, for other boost cases re-enabling the boost to the default internal boost config is incorrect. Fixes: 6450ef559056 ("ASoC: cs35l41: CS35L41 Boosted Smart Amplifier") Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: David Rhodes <david.rhodes@cirrus.com> Link: https://lore.kernel.org/r/20230223084324.9076-2-lucas.tanure@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: codecs: tx-macro: Fix for KASAN: slab-out-of-boundsRavulapati Vishnu Vardhan Rao
When we run syzkaller we get below Out of Bound. "KASAN: slab-out-of-bounds Read in regcache_flat_read" Below is the backtrace of the issue: dump_backtrace+0x0/0x4c8 show_stack+0x34/0x44 dump_stack_lvl+0xd8/0x118 print_address_description+0x30/0x2d8 kasan_report+0x158/0x198 __asan_report_load4_noabort+0x44/0x50 regcache_flat_read+0x10c/0x110 regcache_read+0xf4/0x180 _regmap_read+0xc4/0x278 _regmap_update_bits+0x130/0x290 regmap_update_bits_base+0xc0/0x15c snd_soc_component_update_bits+0xa8/0x22c snd_soc_component_write_field+0x68/0xd4 tx_macro_digital_mute+0xec/0x140 Actually There is no need to have decimator with 32 bits. By limiting the variable with short type u8 issue is resolved. Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com> Link: https://lore.kernel.org/r/20230304080702.609-1-quic_visr@quicinc.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: qcom: q6prm: fix incorrect clk_root passed to ADSPKrzysztof Kozlowski
The second to last argument is clk_root (root of the clock), however the code called q6prm_request_lpass_clock() with clk_attr instead (copy-paste error). This effectively was passing value of 1 as root clock which worked on some of the SoCs (e.g. SM8450) but fails on others, depending on the ADSP. For example on SM8550 this "1" as root clock is not accepted and results in errors coming from ADSP. Fixes: 2f20640491ed ("ASoC: qdsp6: qdsp6: q6prm: handle clk disable correctly") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230302122908.221398-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05ASoC: clarify that SND_SOC_IMX_SGTL5000 is the old driverLuca Ceresoli
Both SND_SOC_IMX_SGTL5000 and SND_SOC_FSL_ASOC_CARD implement the fsl,imx-audio-sgtl5000 compatible string, which is confusing. It took a little research to find out that the latter is much newer and it is supposed to be the preferred choice since several years. Add a clarification note to avoid wasting time for future readers. Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20230303093410.357621-1-luca.ceresoli@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05xfs: fix off-by-one-block in xfs_discard_folio()Dave Chinner
The recent writeback corruption fixes changed the code in xfs_discard_folio() to calculate a byte range to for punching delalloc extents. A mistake was made in using round_up(pos) for the end offset, because when pos points at the first byte of a block, it does not get rounded up to point to the end byte of the block. hence the punch range is short, and this leads to unexpected behaviour in certain cases in xfs_bmap_punch_delalloc_range. e.g. pos = 0 means we call xfs_bmap_punch_delalloc_range(0,0), so there is no previous extent and it rounds up the punch to the end of the delalloc extent it found at offset 0, not the end of the range given to xfs_bmap_punch_delalloc_range(). Fix this by handling the zero block offset case correctly. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=217030 Link: https://lore.kernel.org/linux-xfs/Y+vOfaxIWX1c%2Fyy9@bfoster/ Fixes: 7348b322332d ("xfs: xfs_bmap_punch_delalloc_range() should take a byte range") Reported-by: Pengfei Xu <pengfei.xu@intel.com> Found-by: Brian Foster <bfoster@redhat.com> Signed-off-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <djwong@kernel.org> Signed-off-by: Darrick J. Wong <djwong@kernel.org>
2023-03-05xfs: quotacheck failure can race with background inode inactivationDave Chinner
The background inode inactivation can attached dquots to inodes, but this can race with a foreground quotacheck failure that leads to disabling quotas and freeing the mp->m_quotainfo structure. The background inode inactivation then tries to allocate a quota, tries to dereference mp->m_quotainfo, and crashes like so: XFS (loop1): Quotacheck: Unsuccessful (Error -5): Disabling quotas. xfs filesystem being mounted at /root/syzkaller.qCVHXV/0/file0 supports timestamps until 2038 (0x7fffffff) BUG: kernel NULL pointer dereference, address: 00000000000002a8 .... CPU: 0 PID: 161 Comm: kworker/0:4 Not tainted 6.2.0-c9c3395d5e3d #1 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.16.0-0-gd239552ce722-prebuilt.qemu.org 04/01/2014 Workqueue: xfs-inodegc/loop1 xfs_inodegc_worker RIP: 0010:xfs_dquot_alloc+0x95/0x1e0 .... Call Trace: <TASK> xfs_qm_dqread+0x46/0x440 xfs_qm_dqget_inode+0x154/0x500 xfs_qm_dqattach_one+0x142/0x3c0 xfs_qm_dqattach_locked+0x14a/0x170 xfs_qm_dqattach+0x52/0x80 xfs_inactive+0x186/0x340 xfs_inodegc_worker+0xd3/0x430 process_one_work+0x3b1/0x960 worker_thread+0x52/0x660 kthread+0x161/0x1a0 ret_from_fork+0x29/0x50 </TASK> .... Prevent this race by flushing all the queued background inode inactivations pending before purging all the cached dquots when quotacheck fails. Reported-by: Pengfei Xu <pengfei.xu@intel.com> Signed-off-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <djwong@kernel.org> Signed-off-by: Darrick J. Wong <djwong@kernel.org>
2023-03-05Linux 6.3-rc1v6.3-rc1Linus Torvalds
2023-03-05cpumask: re-introduce constant-sized cpumask optimizationsLinus Torvalds
Commit aa47a7c215e7 ("lib/cpumask: deprecate nr_cpumask_bits") resulted in the cpumask operations potentially becoming hugely less efficient, because suddenly the cpumask was always considered to be variable-sized. The optimization was then later added back in a limited form by commit 6f9c07be9d02 ("lib/cpumask: add FORCE_NR_CPUS config option"), but that FORCE_NR_CPUS option is not useful in a generic kernel and more of a special case for embedded situations with fixed hardware. Instead, just re-introduce the optimization, with some changes. Instead of depending on CPUMASK_OFFSTACK being false, and then always using the full constant cpumask width, this introduces three different cpumask "sizes": - the exact size (nr_cpumask_bits) remains identical to nr_cpu_ids. This is used for situations where we should use the exact size. - the "small" size (small_cpumask_bits) is the NR_CPUS constant if it fits in a single word and the bitmap operations thus end up able to trigger the "small_const_nbits()" optimizations. This is used for the operations that have optimized single-word cases that get inlined, notably the bit find and scanning functions. - the "large" size (large_cpumask_bits) is the NR_CPUS constant if it is an sufficiently small constant that makes simple "copy" and "clear" operations more efficient. This is arbitrarily set at four words or less. As a an example of this situation, without this fixed size optimization, cpumask_clear() will generate code like movl nr_cpu_ids(%rip), %edx addq $63, %rdx shrq $3, %rdx andl $-8, %edx callq memset@PLT on x86-64, because it would calculate the "exact" number of longwords that need to be cleared. In contrast, with this patch, using a MAX_CPU of 64 (which is quite a reasonable value to use), the above becomes a single movq $0,cpumask instruction instead, because instead of caring to figure out exactly how many CPU's the system has, it just knows that the cpumask will be a single word and can just clear it all. Note that this does end up tightening the rules a bit from the original version in another way: operations that set bits in the cpumask are now limited to the actual nr_cpu_ids limit, whereas we used to do the nr_cpumask_bits thing almost everywhere in the cpumask code. But if you just clear bits, or scan for bits, we can use the simpler compile-time constants. In the process, remove 'cpumask_complement()' and 'for_each_cpu_not()' which were not useful, and which fundamentally have to be limited to 'nr_cpu_ids'. Better remove them now than have somebody introduce use of them later. Of course, on x86-64 with MAXSMP there is no sane small compile-time constant for the cpumask sizes, and we end up using the actual CPU bits, and will generate the above kind of horrors regardless. Please don't use MAXSMP unless you really expect to have machines with thousands of cores. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-05Merge tag 'v6.3-p2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fix from Herbert Xu: "Fix a regression in the caam driver" * tag 'v6.3-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: caam - Fix edesc/iv ordering mixup
2023-03-05Merge tag 'x86-urgent-2023-03-05' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 updates from Thomas Gleixner: "A small set of updates for x86: - Return -EIO instead of success when the certificate buffer for SEV guests is not large enough - Allow STIPB to be enabled with legacy IBSR. Legacy IBRS is cleared on return to userspace for performance reasons, but the leaves user space vulnerable to cross-thread attacks which STIBP prevents. Update the documentation accordingly" * tag 'x86-urgent-2023-03-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: virt/sev-guest: Return -EIO if certificate buffer is not large enough Documentation/hw-vuln: Document the interaction between IBRS and STIBP x86/speculation: Allow enabling STIBP with legacy IBRS
2023-03-05Merge tag 'irq-urgent-2023-03-05' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "A set of updates for the interrupt susbsystem: - Prevent possible NULL pointer derefences in irq_data_get_affinity_mask() and irq_domain_create_hierarchy() - Take the per device MSI lock before invoking code which relies on it being hold - Make sure that MSI descriptors are unreferenced before freeing them. This was overlooked when the platform MSI code was converted to use core infrastructure and results in a fals positive warning - Remove dead code in the MSI subsystem - Clarify the documentation for pci_msix_free_irq() - More kobj_type constification" * tag 'irq-urgent-2023-03-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq/msi, platform-msi: Ensure that MSI descriptors are unreferenced genirq/msi: Drop dead domain name assignment irqdomain: Add missing NULL pointer check in irq_domain_create_hierarchy() genirq/irqdesc: Make kobj_type structures constant PCI/MSI: Clarify usage of pci_msix_free_irq() genirq/msi: Take the per-device MSI lock before validating the control structure genirq/ipi: Fix NULL pointer deref in irq_data_get_affinity_mask()