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2017-08-16pinctrl: sh-pfc: r8a77995: Add I2C pins, groups and functionsTakeshi Kihara
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a77995: Add SCIF pins, groups and functionsTakeshi Kihara
This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A77995 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: Fix swapped RX3_B and SCK3_B pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: Initial R8A77995 PFC supportTakeshi Kihara
This patch adds initial pinctrl driver to support for the R8A77995 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: whitespace] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: Add PORT_GP_{10,2[01]} helper macrosYoshihiro Shimoda
This follows the style of existion PORT_GP_X macros and will be used by a follow-up patch for the r8a77995 SoC. Extracted from the initial r8a77995 patch in the BSP by Takeshi Kihara. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7796: Add USB3.0 host pins, groups and functionsTakeshi Kihara
This patch adds USB30 (USB3.0 host) pin, group and function to R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7796: Add USB2.0 host pins, groups and functionsTakeshi Kihara
This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix to reserved MOD_SEL2 bit22Takeshi Kihara
This is a correction because MOD_SEL register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Rename CS1# pin function definitionsTakeshi Kihara
This patch renames the pin function macro definitions of the GPSR1 and IPSR4 registers value for the CS1# pin. This is a correction because GPSR and IPSR register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix to delete FSCLKST pin and IPSR7 bit[15:12] ↵Takeshi Kihara
register definitions This patch fixes the macro definitions of FSCLKST pins function and IPSR7 bit[15:12] register deleted. This is a correction because IPSR register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E or later. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix MOD_SEL register pin assignment for ↵Takeshi Kihara
TCLK{1,2}_{A,B} pins group This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected for IPSR17 bit[27:24]. And renames MOD_SEL2 bit26 value definition name to SEL_TIMER_TMU1. This is a correction because MOD_SEL register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pin ↵Takeshi Kihara
function definitions This patch fixes the implementation incorrect of IPSR register value definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function ↵Takeshi Kihara
definitions This patch fixes the implementation incorrect of IPSR register value definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to ↵Takeshi Kihara
MOD_SEL1 bit10 This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1 bit11 to MOD_SEL1 bit10. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.53E or later. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_ATakeshi Kihara
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value when SCK5_A pin function is selected for IPSR16 bit[31:28]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_DTakeshi Kihara
This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7795 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: 0b0ffc96dbe30fa9 ("pinctrl: sh-pfc: Initial R8A7795 PFC support") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16spi: rockchip: configure CTRLR1 according to size and data frameHuibin Hong
CTRLR1 is number of data frames, when rx only. When data frame is 8 bit, CTRLR1 is len-1. When data frame is 16 bit, CTRLR1 is (len/2)-1. Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16spi: altera: Consolidate TX/RX data register accessLars-Peter Clausen
The patterns for accessing the TX/RX data registers is the same for the IRQ and non-IRQ paths. Consolidate the duplicated code into shared helper functions. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16spi: altera: Switch to SPI core transfer queue managementLars-Peter Clausen
The Altera SPI driver currently uses the spi-bitbang infrastructure for transfer queue management, but non of the bitbang functionality itself. This is because when the driver was written this was the only way to not have to do queue management in the driver itself. Nowadays transfer queue management is available from the SPI driver core itself and using the bitbang infrastructure just adds an additional level of indirection. Switch the driver over to using the core queue management directly. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16x86/intel_rdt/cqm: Improve limbo list processingVikas Shivappa
During a mkdir, the entire limbo list is synchronously checked on each package for free RMIDs by sending IPIs. With a large number of RMIDs (SKL has 192) this creates a intolerable amount of work in IPIs. Replace the IPI based checking of the limbo list with asynchronous worker threads on each package which periodically scan the limbo list and move the RMIDs that have: llc_occupancy < threshold_occupancy on all packages to the free list. mkdir now returns -ENOSPC if the free list and the limbo list ere empty or returns -EBUSY if there are RMIDs on the limbo list and the free list is empty. Getting rid of the IPIs also simplifies the data structures and the serialization required for handling the lists. [ tglx: Rewrote changelog ... ] Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: peterz@infradead.org Cc: eranian@google.com Cc: vikas.shivappa@intel.com Cc: ak@linux.intel.com Cc: davidcc@google.com Link: http://lkml.kernel.org/r/1502845243-20454-3-git-send-email-vikas.shivappa@linux.intel.com
2017-08-16x86/intel_rdt/mbm: Fix MBM overflow handler during CPU hotplugVikas Shivappa
When a CPU is dying, the overflow worker is canceled and rescheduled on a different CPU in the same domain. But if the timer is already about to expire this essentially doubles the interval which might result in a non detected overflow. Cancel the overflow worker and reschedule it immediately on a different CPU in same domain. The work could be flushed as well, but that would reschedule it on the same CPU. [ tglx: Rewrote changelog once again ] Reported-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: peterz@infradead.org Cc: eranian@google.com Cc: vikas.shivappa@intel.com Cc: ak@linux.intel.com Cc: davidcc@google.com Link: http://lkml.kernel.org/r/1502845243-20454-2-git-send-email-vikas.shivappa@linux.intel.com
2017-08-16drm: omapdrm: hdmi: Don't allocate PHY features dynamicallyLaurent Pinchart
There's no need to allocate memory dynamically to duplicate the contents of a const structure, only to store the memory pointer in a const pointer field. Just use the original structures directly. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm: omapdrm: hdmi: Configure the PHY from the HDMI core versionLaurent Pinchart
The OMAP4 and OMAP5 HDMI PHYs have different properties that require specific handling in the HDMI PHY driver. This needs knowledge of the PHY version, which is currently inferred from the DSS version. As part of the effort to remove usage of the DSS version, use the HDMI controller version instead. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm: omapdrm: hdmi: Configure the PLL from the HDMI core versionLaurent Pinchart
The OMAP4 and OMAP5 PLLs have different properties that require specific handling in the HDMI PLL driver. This needs knowledge of the PLL version, which is currently inferred from the DSS version. AS part of the effort to remove usage of the DSS version, use the HDMI controller version instead. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm: omapdrm: hdmi: Pass HDMI core version as integer to HDMI audioLaurent Pinchart
The HDMI audio driver only needs to know which generation of HDMI transmitter it deals with, not the detailed SoC model. Pass the version number as an integer to prepare for removal of the OMAP SoC version from the omapdrm driver. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm: omapdrm: hdmi: Replace OMAP SoC model check with HDMI xmit versionLaurent Pinchart
The HDMI wrapper code only needs to differentiate between major OMAP revisions, which can be obtained from the HDMI transmitter compatible string. Replace the OMAP SoC model checks to prepare for removal of the OMAP SoC version platform data. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm: omapdrm: hdmi: Rename functions and structures to use hdmi_ prefixLaurent Pinchart
The dsi_pll_ops structure and dsi_init_pll_data() function incorrectly use a dsi_ prefix, likely due to copy & paste. Fix it by using the correct hdmi_ prefix. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16drm/omap: add OMAP5 DSIPHY lane-enable supportTomi Valkeinen
We are missing OMAP5 DSIPHY lane-enable support, which has prevented OMAP5 DSI working in mainline. This patch adds the lane-enable similarly to the recently added OMAP4 version. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-08-16drm/omap: use regmap_update_bit() when muxing DSI padsTomi Valkeinen
Use regmap_update_bits instead of regmap_read/write, which simplifies the code. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-08-16powerpc: Fix VSX enabling/flushing to also test MSR_FP and MSR_VECBenjamin Herrenschmidt
VSX uses a combination of the old vector registers, the old FP registers and new "second halves" of the FP registers. Thus when we need to see the VSX state in the thread struct (flush_vsx_to_thread()) or when we'll use the VSX in the kernel (enable_kernel_vsx()) we need to ensure they are all flushed into the thread struct if either of them is individually enabled. Unfortunately we only tested if the whole VSX was enabled, not if they were individually enabled. Fixes: 72cd7b44bc99 ("powerpc: Uncomment and make enable_kernel_vsx() routine available") Cc: stable@vger.kernel.org # v4.3+ Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-16pinctrl: sh-pfc: r8a7795: Add USB 2.0 pins, groups and functionsYoshihiro Shimoda
Add pins, groups, and functions for USB 2.0 on R-Car H3 ES2.0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a7795: Change USB3_{OVC,PWEN} definitionsYoshihiro Shimoda
Since the latest datasheet revises the names, this patch changes the definitions from USB3_{OVC,PWEN} to USB2_CH3_{OVC,PWEN}. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16nvmet-fc: correct use after free on list teardownJames Smart
Use list_for_each_entry_safe to prevent list handling from referencing next pointers directly after list_del's Signed-off-by: James Smart <james.smart@broadcom.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-08-16nvmet: don't overwrite identify sn/fr with 0-bytesMartin Wilck
The merged version of my patch "nvmet: don't report 0-bytes in serial number" fails to remove two lines which should have been replaced, so that the space-padded strings are overwritten again with 0-bytes. Fix it. Fixes: 42de82a8b544 nvmet: don't report 0-bytes in serial number Signed-off-by: Martin Wilck <mwilck@suse.com> Reviewed-by: Sagi Grimberg <sagi@grimbeg.me> Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-08-16parisc: pci memory bar assignment fails with 64bit kernels on dino/cujoThomas Bogendoerfer
For 64bit kernels the lmmio_space_offset of the host bridge window isn't set correctly on systems with dino/cujo PCI host bridges. This leads to not assigned memory bars and failing drivers, which need to use these bars. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: <stable@vger.kernel.org> Acked-by: Helge Deller <deller@gmx.de> Signed-off-by: Helge Deller <deller@gmx.de>
2017-08-15drm/amdkfd: Implement image tiling mode support v2Yong Zhao
v2: Removed hole in ioctl number space Signed-off-by: Yong Zhao <yong.zhao@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdgpu: Add kgd kfd interface get_tile_config() v2Yong Zhao
v2: * Removed amdgpu_amdkfd prefix from static functions * Documented get_tile_config in kgd_kfd_interface.h Signed-off-by: Yong Zhao <yong.zhao@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Adding new IOCTL for scratch memory v2Moses Reuben
v2: * Renamed ALLOC_MEMORY_OF_SCRATCH to SET_SCRATCH_BACKING_VA * Removed size parameter from the ioctl, it was unused * Removed hole in ioctl number space * No more call to write_config_static_mem * Return correct error code from ioctl Signed-off-by: Moses Reuben <moses.reuben@amd.com> Signed-off-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdgpu: Add kgd/kfd interface to support scratch memory v2Moses Reuben
v2: * Shortened headline * Removed write_config_static_mem, it gets initialized by gfx_v?_0_gpu_init * Renamed alloc_memory_of_scratch to set_scratch_backing_va * Made set_scratch_backing_va a void function * Documented set_scratch_backing in kgd_kfd_interface.h Signed-off-by: Moses Reuben <moses.reuben@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdgpu: Program SH_STATIC_MEM_CONFIG globally, not per-VMIDFelix Kuehling
This register only has a single instance in the hardware. Its value applies to all VMIDS. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amd: Update MEC HQD loading code for KFDFelix Kuehling
Various bug fixes and improvements that accumulated over the last two years. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdgpu: Disable GFX PG on CZFelix Kuehling
It's causing problems with user mode queues and the HIQ, and can lead to hard hangs during boot after programming RLC_CP_SCHEDULERS. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Update PM4 packet headersFelix Kuehling
To match current firmware. The map process packet has been extended to support scratch. This is a non-backwards compatible change and it's about two years old. So no point keeping the old version around conditionally. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Clamp EOP queue size correctly on Gfx8Jay Cornwall
Gfx8 HW incorrectly clamps CP_HQD_EOP_CONTROL.EOP_SIZE, which can lead to scheduling deadlock due to SE EOP done counter overflow. Enforce a EOP queue size limit which prevents the CP from sending more than 0xFF events at a time. Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Add more error printing to help bringup v2Yong Zhao
v2: Turned WARN into dev_warn and made the message more helpful Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Handle remaining BUG_ONs more gracefully v2Felix Kuehling
In most cases, BUG_ONs can be replaced with WARN_ON with an error return. In some void functions just turn them into a WARN_ON and possibly an early exit. v2: * Cleaned up error handling in pm_send_unmap_queue * Removed redundant WARN_ON in kfd_process_destroy_delayed Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Allocate gtt_sa_bitmap in long unitsFelix Kuehling
gtt_sa_bitmap is accessed by bitmap functions, which operate on longs. Therefore the array should be allocated in long units. Also round up in case the number of bits is not a multiple of BITS_PER_LONG. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Fix doorbell initialization and finalizationFelix Kuehling
Handle errors in doorbell aperture initialization instead of BUG_ON. iounmap doorbell aperture during finalization. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Remove BUG_ONs for NULL pointer argumentsFelix Kuehling
Remove BUG_ONs that check for NULL pointer arguments that are dereferenced in the same function. Dereferencing the NULL pointer will generate a BUG anyway, so the explicit check is redundant and unnecessary overhead. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Remove usage of alloc(sizeof(struct...Kent Russell
See https://kernel.org/doc/html/latest/process/coding-style.html under "14) Allocating Memory" for rationale behind removing the x=alloc(sizeof(struct) style and using x=alloc(sizeof(*x) instead Signed-off-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15drm/amdkfd: Fix goto usage v2Kent Russell
Remove gotos that do not feature any common cleanup, and use gotos instead of repeating cleanup commands. According to kernel.org: "The goto statement comes in handy when a function exits from multiple locations and some common work such as cleanup has to be done. If there is no cleanup needed then just return directly." v2: Applied review suggestions in create_queue_nocpsch Signed-off-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
generated by cgit (git 2.34.1) at 2025-10-03 09:15:09 +0000