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2025-04-25media: i2c: imx334: add modes for 720p and 480p resolutionsShravan Chippa
Added support for 1280x720@30 and 640x480@30 resolutions Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: imx334: update mode_3840x2160_regs arrayShravan Chippa
The 3840x2160 mode operates with the imx334 reset values. If we switch to other modes and then return to the 3840x2160 mode, it should function correctly. so updated the mode_3840x2160_regs array with the imx334 reset values. Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: imx334: Optimized 4k and 2k mode register arraysShravan Chippa
Optimized the resolution arrays by integrating a common register array. Adjusted the register array values for 1920x1080@30 and 3840x2160@30 resolutions to align with the common register array values. Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: ipu6: Remove workaround for Meteor Lake ES2Hao Yao
There was a hardware bug which need IPU6 driver to disable the ATS. This workaround is not needed anymore as the bug was fixed in hardware level. Additionally, Arrow Lake has the same IPU6 PCI ID and x86 stepping but does not have the bug. Removing the Meteor Lake workaround is also required for the driver to function on Arrow Lake. Signed-off-by: Hao Yao <hao.yao@intel.com> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Fixes: 25fedc021985 ("media: intel/ipu6: add Intel IPU6 PCI device driver") Cc: stable@vger.kernel.org [Sakari Ailus: Added tags and explanation of what is fixed.] Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub9xx: Set serializer temperature rampJai Luthra
For continuous PLL lock, it is recommended to extend the temperature ramp down range of the DS90UB953-Q1 serializer based on the device's initial temperature [1]. The serializer's die temperature is reported only to the deserializer through the sensor status registers, and for UB9702, it is recommended to set the temperature ramp during the link setup sequence, i.e. before we even probe the ub953 driver. Add support to the deserializer driver to configure ub953's temperature ramp. [1]: Section 7.3.1.1 - https://www.ti.com/lit/gpn/ds90ub953-q1 Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Configure serializer using back-channelJai Luthra
For DS90UB9702-Q1, it is recommended to configure some serializer settings over the back-channel before the forward-channel is active. This can only be done if the serializer's I2C address on the FPD-Link bus is populated in the device tree node. Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub953: Move reg defines to a header fileTomi Valkeinen
Move UB953 register defines to a header file. This is done so that the deserializer driver can access the defines, and do some early serializer configuration. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: dt-bindings: ti,ds90ub960: Allow setting serializer addressJai Luthra
The serializer's I2C address on the FPD-Link bus is usually communicated to the deserializer once the forward-channel is established. But in some cases it might be necessary to program the serializer (over the back-channel) before the forward-channel is established. This can be used e.g. to correct serializer configuration which otherwise would prevent the FC to be enabled. To be able to communicate to the serializer before the forward-channel is up, the deserializer driver neds to know the default i2c address of the serializer. Allow setting the serializer i2c address using the 'reg' property. This is optional, and usually not needed. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Update UB9702 init sequencesTomi Valkeinen
Update ub9702 RX port init sequence according to TI's latest (non-public) documentation. The sequence is based on a Python script provided by TI. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Move all RX port init code into ub960_init_rx_ports()Tomi Valkeinen
We have some code in probe() which is related to RX port initialization, and should be in ub960_init_rx_ports(). Move the code there. We also move ub960_reset() so that it is accessible from ub960_init_rx_ports(). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Add RX port iteration supportTomi Valkeinen
The driver does a lot of iteration over the RX ports with for loops. In most cases the driver will skip unused RX ports. Also, in the future patches the FPD-Link IV support will be refreshed with TI's latest init sequences which involves a lot of additional iterations over the RX ports, often only for FPD-Link IV ports. To make the iteration simpler and to make it clearer what we're iterating over (all or only-active, all or only-fpd4), add macros and support functions for iterating the RX ports. Use the macros in the driver, replacing the for loops. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Refresh ub960_init_tx_ports_ub9702()Tomi Valkeinen
Refresh the ub960_init_tx_ports_ub9702() using the latest version of the (non-public) hardware documentation. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Split ub960_init_tx_ports()Tomi Valkeinen
Split ub960_init_tx_ports() to a UB960 and a UB9702 versions to make it easier to update the UB9702 version in the following patch. No funcional changes. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Add UB9702 specific registersTomi Valkeinen
Add UB9702 specific registers which will be used in the following patches. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Move UB9702 registers to a separate sectionTomi Valkeinen
The driver supports both UB960 and UB9702. While devices work in similar ways and have a lot of identical registers, there are also plenty of differences. To clarify the situation a bit, move the UB9702 registers to a separate section and prefix them with UB9702. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub953: Speed-up I2C watchdog timerJai Luthra
On the I2C bus for remote clients (sensors), by default the watchdog timer expires in 1s. To allow for a quicker system bring-up time, TI recommends to speed it up to 50us [1]. [1]: Section 7.3.1.1 - https://www.ti.com/lit/gpn/ds90ub953-q1 Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub913: Add error handling to ub913_log_status()Tomi Valkeinen
Add error handling to ub913_log_status(). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub953: Add error handling to ub953_log_status()Tomi Valkeinen
Add error handling to ub953_log_status(). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub960: Add error handling to multiple placesTomi Valkeinen
The driver is missing checks for i2c read/write errors in many places. Now that we have added the err parameter to the read/write functions in the previous patch, add error handling to all the missing places. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub9xx: Add err parameter to read/write funcsTomi Valkeinen
To make future error handling in the drivers easier, add "int *err" parameter to all the i2c register access functions. It functions the same was as with e.g. CCI reg write/read helpers. This was accomplished with the following semantic patch: @@ identifier FUNC =~ "^ub9.._(rxport_|txport_|ind_)?(read|write|update_bits)(16|_ind)?$"; @@ FUNC(... + , int *err ) { ... int ret; + + if (err && *err) + return *err; ... + if (ret && err) + *err = ret; + return ret; } @@ identifier FUNC =~ "^ub9.._(rxport_|txport_|ind_)?(read|write|update_bits)(16|_ind)?$"; @@ FUNC(... + , NULL ) Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub913: Align ub913_read() with other similar functionsTomi Valkeinen
Adjust the ub913_read() to have similar form than the other similar functions in ub9xx drivers. This makes it easier to deal with all the read/write functions with a semantic patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub913: Fix returned fmt from .set_fmt()Tomi Valkeinen
When setting the sink pad's stream format, set_fmt accidentally changes the returned format's code to 'outcode', while the purpose is to only use the 'outcode' for the propagated source stream format. Fixes: c158d0d4ff15 ("media: i2c: add DS90UB913 driver") Cc: stable@vger.kernel.org Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: i2c: ds90ub953: Fix error printsTomi Valkeinen
ub953_read_ind() and ub953_write_ind() have broken error prints, and the register address is printed incorrectly. Fix the prints. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: dt-bindings: media: i2c: align filenames format with standardDavid Heidelberg
Append missing vendor and align with other sony definitions. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Check decoding is ongoing for motion-jpegMing Qian
As the first frame in "repeat-mode" is the pattern, the pattern done interrupt is ignored by the driver. With small resolution bitstreams, the interrupts might fire too quickly and hardware combine two irqs to once because irq handle have latency. Thus the driver might miss the frame decode done interrupt from the first actual frame. In order to avoid the driver wait for the frame done interrupt that has been combined to the pattern done interrupt and been ignored, driver will check the curr_desc and slot_status registers to figure out if the decoding of actual frame is finished or not. Firstly we check the curr_desc register, - if it is still pointing to the pattern descriptor, the second actual frame is not started, we can wait for its frame-done interrupt. - if the curr_desc has pointed to the frame descriptor, then we check the ongoing bit of slot_status register. - if the ongoing bit is set to 1, the decoding of the actual frame is not finished, we can wait for its frame-done interrupt. - if the ongoing bit is set to 0, the decoding of the actual frame is finished, we can't wait for the second interrupt, but mark it as done. But there is still a small problem, that the curr_desc and slot_status registers are not synchronous. curr_desc is updated when the next_descpt_ptr is loaded, but the ongoing bit of slot_status is set after the 32 bytes descriptor is loaded, there will be a short time interval in between, which may cause fake false. Consider read register is quite slow compared with IP read 32byte from memory, read twice slot_status can avoid this situation. Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Change the pattern size to 128x64Ming Qian
In order to decode a motion-jpeg bitstream, which doesn't provide a DHT, the driver will first decode a pattern jpeg and use the DHT found in the pattern to decode the first actual frame. This mode is called "repeat-mode" and it utilizes linked descriptors. The smallest supported resolution of 64x64 was used for that pattern to not cause unneeded performance delay. This choice, however, can cause a corrupted decoded picture of the first frame after the pattern, when the resolution of that frame is larger than the pattern and is not aligned to 64. By altering the pattern size to 128x64, this corruption can be avoided. That size has been confirmed to be safe by the hardware designers. Additionally, a DMA buffer needs to be allocated to store the decoded picture of the pattern image. Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Cleanup after an allocation errorMing Qian
When allocation failures are not cleaned up by the driver, further allocation errors will be false-positives, which will cause buffers to remain uninitialized and cause NULL pointer dereferences. Ensure proper cleanup of failed allocations to prevent these issues. Fixes: 2db16c6ed72c ("media: imx-jpeg: Add V4L2 driver for i.MX8 JPEG Encoder/Decoder") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Reset slot data pointers when freedMing Qian
Ensure that the slot data pointers are reset to NULL and handles are set to 0 after freeing the coherent memory. This makes he function mxc_jpeg_alloc_slot_data() and mxc_jpeg_free_slot_data() safe to be called multiple times. Fixes: 2db16c6ed72c ("media: imx-jpeg: Add V4L2 driver for i.MX8 JPEG Encoder/Decoder") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Move mxc_jpeg_free_slot_data() aheadMing Qian
Move function mxc_jpeg_free_slot_data() above mxc_jpeg_alloc_slot_data() allowing to call that function during allocation failures. No functional changes are made. Fixes: 2db16c6ed72c ("media: imx-jpeg: Add V4L2 driver for i.MX8 JPEG Encoder/Decoder") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imagination: fix a potential memory leak in e5010_probe()Haoxiang Li
Add video_device_release() to release the memory allocated by video_device_alloc() if something goes wrong. Fixes: a1e294045885 ("media: imagination: Add E5010 JPEG Encoder driver") Cc: stable@vger.kernel.org Signed-off-by: Haoxiang Li <haoxiang_li2024@163.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: amphion: Slightly simplify vpu_core_register()Christophe JAILLET
"vpu_core->msg_buffer_size" is unused out-side of vpu_core_register(). There is no need to save this value in struct vpu_core. Remove it and use a local variable instead. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: verisilicon: Enable NV15 support for Rockchip VDPU981Nicolas Dufresne
This is a "customer" format, though on Rockchip RK3588 it has been verified to be NV15 format, which matches what the GPU and display handles has 10bit pixel formats. Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: imx-jpeg: Drop the first error framesMing Qian
When an output buffer contains error frame header, v4l2_jpeg_parse_header() will return error, then driver will mark this buffer and a capture buffer done with error flag in device_run(). But if the error occurs in the first frames, before setup the capture queue, there is no chance to schedule device_run(), and there may be no capture to mark error. So we need to drop this buffer with error flag, and make the decoding can continue. Fixes: 2db16c6ed72c ("media: imx-jpeg: Add V4L2 driver for i.MX8 JPEG Encoder/Decoder") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-24media: mediatek: vcodec: Enable HEVC main still picture decodeNathan Hebert
Mediatek devices that support HEVC also support the main still picture profile, but today, the main still picture profile is excluded. This removes the skip mask for HEVC, and enables the main still picture profile decoding. Signed-off-by: Nathan Hebert <nhebert@chromium.org> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add support for RZ/G3E SoCLad Prabhakar
The CRU block on the Renesas RZ/G3E SoC is similar to the one found on the Renesas RZ/G2L SoC, with the following differences: - Additional registers rzg3e_cru_regs. - A different irq handler rzg3e_cru_irq. - A different rzg3e_cru_csi2_setup. - A different max input width. - Additional stride register. Introduce rzg3e_cru_info struct to handle differences between RZ/G2L and RZ/G3E and related RZ/G3E functions: - rzg3e_cru_enable_interrupts() - rzg3e_cru_enable_interrupts() - rz3e_fifo_empty() - rzg3e_cru_csi2_setup() - rzg3e_cru_get_current_slot() Add then support for the RZ/G3E SoC CRU block with the new compatible string "renesas,r9a09g047-cru". Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-18-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add function pointer to configure CSILad Prabhakar
Add a `csi_setup` function pointer to the `rzg2l_cru_info` structure and pass it as part of the OF data. On RZ/G3E and RZ/V2H(P) SoCs, additional register configurations are required compared to the RZ/G2L SoC. Modify `rzg2l_cru_csi2_setup()` to be referenced through this function pointer and update the code to use it accordingly. This change is in preparation for adding support for RZ/G3E and RZ/V2H(P) SoCs. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-17-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add function pointer to check if FIFO is emptyLad Prabhakar
Add a `fifo_empty` function pointer to the `rzg2l_cru_info` structure and pass it as part of the OF data. On RZ/G3E and RZ/V2H(P) SoCs, checking if the FIFO is empty requires a different register configuration. Implement `rzg2l_fifo_empty()` and update the code to use it from the function pointer. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-16-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add IRQ handler to OF dataLad Prabhakar
Add `irq_handler` to the `rzg2l_cru_info` structure and pass it as part of the OF data. This prepares for supporting RZ/G3E and RZ/V2H(P) SoCs, which require a different IRQ handler. Update the IRQ request code to use the handler from the OF data. Add `enable_interrupts` and `disable_interrupts` function pointers to the `rzg2l_cru_info` structure and pass them as part of the OF data. This prepares for supporting RZ/G3E and RZ/V2H(P) SoCs, which require different interrupt configurations. Implement `rzg2l_cru_enable_interrupts()` and `rzg2l_cru_disable_interrupts()` functions and update the code to use them instead of directly writing to interrupt registers. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-15-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add image_conv offset to OF dataLad Prabhakar
Add `image_conv` field to the `rzg2l_cru_info` structure to store the register offset for image conversion control. RZ/G2L uses `ICnMC`, while RZ/G3E and RZ/V2H(P) use `ICnIPMC_C0`. Update `rzg2l_cru_initialize_image_conv()` and `rzg2l_cru_csi2_setup()` to use this `image_conv` offset from the OF data, facilitating future support for RZ/G3E and RZ/V2H(P) SoCs. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-14-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Pass resolution limits via OF dataLad Prabhakar
Pass `max_width` and `max_height` as part of the OF data to facilitate the addition of support for RZ/G3E and RZ/V2H(P) SoCs. These SoCs have a maximum resolution of 4096x4096 as compared to 2800x4095 on RZ/G2L SoC. This change prepares the driver for easier integration of these SoCs by defining the resolution limits in the `rzg2l_cru_info` structure. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-13-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: Add register mapping supportLad Prabhakar
Prepare for adding support for RZ/G3E and RZ/V2HP SoCs, which have a CRU-IP that is mostly identical to RZ/G2L but with different register offsets and additional registers. Introduce a flexible register mapping mechanism to handle these variations. Define the `rzg2l_cru_info` structure to store register mappings and pass it as part of the OF match data. Update the read/write functions to check out-of-bound accesses and use indexed register offsets from `rzg2l_cru_info`, ensuring compatibility across different SoC variants. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-12-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: csi2: Add support for RZ/V2H(P) SoCLad Prabhakar
The D-PHY on the RZ/V2H(P) SoC is different from the D-PHY on the RZ/G2L SoC. To handle this difference, function pointers for D-PHY enable/disable have been added, and the `struct rzg2l_csi2_info` pointer is passed as OF data. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-11-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: csi2: Skip system clock for RZ/V2H(P) SoCTommaso Merciai
The RZ/V2H(P) SoC does not require a `system` clock for the CSI-2 interface. To accommodate this, introduce a `has_system_clk` bool flag in the `rzg2l_csi2_info` structure and update the rzg2l_csi2_probe() to conditionally request the clock only when needed. This patch is in preparation for adding support for RZ/V2H(P) SoC. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-10-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: csi2: Introduce SoC-specific D-PHY handlingLad Prabhakar
In preparation for adding support for the RZ/V2H(P) SoC, where the D-PHY differs from the existing RZ/G2L implementation, introduce a new rzg2l_csi2_info structure. This structure provides function pointers for SoC-specific D-PHY enable and disable operations. Modify rzg2l_csi2_dphy_setting() to use these function pointers instead of calling rzg2l_csi2_dphy_enable() and rzg2l_csi2_dphy_disable() directly. Update the device match table to store the appropriate function pointers for each compatible SoC. This change prepares the driver for future extensions without affecting the current functionality for RZ/G2L. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-9-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: rzg2l-core: Use devm_pm_runtime_enable()Tommaso Merciai
Use newly added devm_pm_runtime_enable() into rzg2l_cru_probe() and drop unnecessary pm_runtime_disable() from rzg2l_cru_probe() and rzg2l_csi2_remove(). Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-8-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: rzg2l-core: Use local variable for struct device in ↵Lad Prabhakar
rzg2l_cru_probe() Use a local variable for the struct device pointers. This increases code readability with shortened lines. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-7-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: csi2: Use devm_pm_runtime_enable()Tommaso Merciai
Use newly added devm_pm_runtime_enable() into rzg2l_csi2_probe() and drop error path accordingly. Drop also unnecessary pm_runtime_disable() from rzg2l_csi2_remove(). Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-6-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: rzg2l-cru: csi2: Use local variable for struct device in ↵Lad Prabhakar
rzg2l_csi2_probe() Use a local variable for the struct device pointers. This increases code readability with shortened lines. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-5-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoCTommaso Merciai
The CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC has five interrupts: - image_conv: image_conv irq - axi_mst_err: AXI master error level irq - vd_addr_wend: Video data AXI master addr 0 write end irq - sd_addr_wend: Statistics data AXI master addr 0 write end irq - vsd_addr_wend: Video statistics data AXI master addr 0 write end irq This IP has only one input port 'port@1' similar to the RZ/G2UL CRU. Document the CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 blockTommaso Merciai
Document the CSI-2 block which is part of CRU found in Renesas RZ/G3E SoC. The CSI-2 block on the RZ/G3E SoC is identical to one found on the RZ/V2H(P) SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
generated by cgit (git 2.34.1) at 2025-09-20 20:30:22 +0000