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2014-03-13cputime: Bring cputime -> nsecs conversionFrederic Weisbecker
We already have nsecs_to_cputime(). Now we need to be able to convert the other way around in order to fix a bug on steal time accounting. Cc: Ingo Molnar <mingo@kernel.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
2014-03-13cputime: Default implementation of nsecs -> cputime conversionFrederic Weisbecker
The architectures that override cputime_t (s390, ppc) don't provide any version of nsecs_to_cputime(). Indeed this cputime_t implementation by backend only happens when CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y under which the core code doesn't make any use of nsecs_to_cputime(). At least for now. We are going to make a broader use of it so lets provide a default version with a per usecs granularity. It should be good enough for most usecases. Cc: Ingo Molnar <mingo@kernel.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
2014-03-13cputime: Fix nsecs_to_cputime() return type castFrederic Weisbecker
Even though nsec based cputime_t maps to u64, nsecs_to_cputime() must return a cputime_t value. We want to enforce this kind of cast in order to track down buggy manipulations of cputime_t such as direct access of its values under wrong assumptions on its backend type (nsecs, jiffies, etc...) by core code. Cc: Ingo Molnar <mingo@kernel.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
2014-03-13Merge remote-tracking branch 'asoc/topic/tlv320aic31xx' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/s6000' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/pxa' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/max98095' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/max98088' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/maintainers' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/lm49453' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/lm4857' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/kirkwood' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/jack' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/io' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/intel' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/cirrus' into asoc-nextMark Brown
2014-03-13Merge remote-tracking branch 'asoc/topic/dapm' into asoc-nextMark Brown
2014-03-13Merge tag 'asoc-v3.15' into asoc-nextMark Brown
ASoC: Updates for v3.15 Quite a busy release for ASoC this time, more on janitorial work than exciting new features but welcome nontheless: - Lots of cleanups from Takashi for enumerations; the original API for these was error prone so he's refactored lots of code to use more modern APIs which avoid issues. - Elimination of the ASoC level wrappers for I2C and SPI moving us closer to converting to regmap completely and avoiding some randconfig hassle. - Provide both manually and transparently locked DAPM APIs rather than a mix of the two fixing some concurrency issues. - Start converting CODEC drivers to use separate bus interface drivers rather than having them all in one file helping avoid dependency issues. - DPCM support for Intel Haswell and Bay Trail platforms. - Lots of work on improvements for simple-card, DaVinci and the Renesas rcar drivers. - New drivers for Analog Devices ADAU1977, TI PCM512x and parts of the CSR SiRF SoC. # gpg: Signature made Wed 12 Mar 2014 23:05:45 GMT using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
2014-03-13Merge remote-tracking branch 'asoc/fix/spear' into asoc-linusMark Brown
2014-03-13Merge tag 'asoc-v3.14-rc6' into asoc-linusMark Brown
ASoC: Fixes for v3.14 A few things here: - Avoid memory leaks in error cases with DPCM, this code has never been that well tested in mainline due to the lack of mainline drivers but we now have one queued for the merge window! - Fix the N810 audio driver to load when booted with DT since the platform was converted to DT during the merge window. - Fixes for initialisation of some MFD drivers that are probably unused in mainline # gpg: Signature made Mon 10 Mar 2014 18:21:32 GMT using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
2014-03-13Merge tag 'asoc-v3.15' into asoc-intelMark Brown
ASoC: Updates for v3.15 Quite a busy release for ASoC this time, more on janitorial work than exciting new features but welcome nontheless: - Lots of cleanups from Takashi for enumerations; the original API for these was error prone so he's refactored lots of code to use more modern APIs which avoid issues. - Elimination of the ASoC level wrappers for I2C and SPI moving us closer to converting to regmap completely and avoiding some randconfig hassle. - Provide both manually and transparently locked DAPM APIs rather than a mix of the two fixing some concurrency issues. - Start converting CODEC drivers to use separate bus interface drivers rather than having them all in one file helping avoid dependency issues. - DPCM support for Intel Haswell and Bay Trail platforms. - Lots of work on improvements for simple-card, DaVinci and the Renesas rcar drivers. - New drivers for Analog Devices ADAU1977, TI PCM512x and parts of the CSR SiRF SoC. Conflicts: sound/soc/intel/Kconfig
2014-03-13spi: sh-sci: Prevent NULL pointer dereferenceAxel Lin
If sp->info is NULL, we will hit NULL pointer dereference in probe() while setting bus_num and num_chipselect for master: sp->bitbang.master->bus_num = sp->info->bus_num; sp->bitbang.master->num_chipselect = sp->info->num_chipselect; Thus add NULL test for sp->info in probe() to prevent NULL pointer dereference. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13ASoC: tlv320aic31xx: Add basic codec driver implementationJyri Sarha
This commit adds a bare bones driver support for TLV320AIC31XX family audio codecs. The driver adds basic stereo playback trough headphone and speaker outputs and mono capture trough microphone inputs. The driver is currently missing support at least for mini DSP features and jack detection. I have tested the driver only on TLV320AIC3111, but based on the data sheets TLV320AIC3100, TLV320AIC3110, and TLV320AIC3120 should work Ok too. The base for the implementation was taken from: git@gitorious.org:ti-codecs/ti-codecs.git ajitk/topics/k3.10.1-aic31xx -branch at commit 77504eba0294764e9e63b4a0c696b44db187cd13. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13ASoC: s6105-ipcam: Convert to table based DAPM setupLars-Peter Clausen
Use table based setup to register the DAPM widgets and routes. This on one hand makes the code a bit shorter and cleaner and on the other hand the board level DAPM elements get registered in the card's DAPM context rather than in the CODEC's DAPM context. While we are at it also remove the snd_soc_dapm_enable_pin() in the init callback, since pins are enabled by default. Also drop the snd_soc_dapm_sync() calls, since they are ignored by the core anyway until the card has been fully instantiated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13regulator: tps6586x: Remove unnecessary rdev[] arrayAxel Lin
Now we are using devm_regulator_register(), so we don't need the rdev[] array to store return value of devm_regulator_register. Use a *rdev variable is enough for checking return status. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13arm64: smp: make local symbol staticJingoo Han
Make smp_spin_table_cpu_postboot() static, because this function is used only in this file. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13arm64: debug: make local symbols staticJingoo Han
Make local symbols static, because these are used only in this file. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13ARM64: perf: support dwarf unwinding in compat modeJean Pihet
Add support for unwinding using the dwarf information in compat mode. Using the correct user stack pointer allows perf to record the frames correctly in the native and compat modes. Note that although the dwarf frame unwinding works ok using libunwind in native mode (on ARMv7 & ARMv8), some changes are required to the libunwind code for the compat mode. Those changes are posted separately on the libunwind mailing list. Tested on ARMv8 platform with v8 and compat v7 binaries, the latter are statically built. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13ARM64: perf: add support for frame pointer unwinding in compat modeJean Pihet
When profiling a 32-bit application, user space callchain unwinding using the frame pointer is performed in compat mode. The code is taken over from the AARCH32 code and adapted to work on AARCH64. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13ARM64: perf: add support for perf registers APIJean Pihet
This patch implements the functions required for the perf registers API, allowing the perf tool to interface kernel register dumps with libunwind in order to provide userspace backtracing. Compat mode is also supported. Only the general purpose user space registers are exported, i.e.: PERF_REG_ARM_X0, ... PERF_REG_ARM_X28, PERF_REG_ARM_FP, PERF_REG_ARM_LR, PERF_REG_ARM_SP, PERF_REG_ARM_PC and not the PERF_REG_ARM_V* registers. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13arm64: Add boot time configuration of Intermediate Physical Address sizeRadha Mohan Chintakuntla
ARMv8 supports a range of physical address bit sizes. The PARange bits from ID_AA64MMFR0_EL1 register are read during boot-time and the intermediate physical address size bits are written in the translation control registers (TCR_EL1 and VTCR_EL2). There is no change in the VA bits and levels of translation. Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Will Deacon <Will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-03-13arm64: Do not synchronise I and D caches for special ptesCatalin Marinas
Special pte mappings are not intended to be executable and do not even have an associated struct page. This patch ensures that we do not call __sync_icache_dcache() on such ptes. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Steve Capper <Steve.Capper@arm.com> Tested-by: Laura Abbott <lauraa@codeaurora.org> Tested-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Cc: <stable@vger.kernel.org>
2014-03-13arm64: Make DMA coherent and strongly ordered mappings not executableCatalin Marinas
pgprot_{dmacoherent,writecombine,noncached} don't need to generate executable mappings with side-effects like __sync_icache_dcache() being called when the mapping is in user space. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Tested-by: Laura Abbott <lauraa@codeaurora.org> Tested-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Cc: <stable@vger.kernel.org>
2014-03-13kvm: x86: ignore ioapic polarityGabriel L. Somlo
Both QEMU and KVM have already accumulated a significant number of optimizations based on the hard-coded assumption that ioapic polarity will always use the ActiveHigh convention, where the logical and physical states of level-triggered irq lines always match (i.e., active(asserted) == high == 1, inactive == low == 0). QEMU guests are expected to follow directions given via ACPI and configure the ioapic with polarity 0 (ActiveHigh). However, even when misbehaving guests (e.g. OS X <= 10.9) set the ioapic polarity to 1 (ActiveLow), QEMU will still use the ActiveHigh signaling convention when interfacing with KVM. This patch modifies KVM to completely ignore ioapic polarity as set by the guest OS, enabling misbehaving guests to work alongside those which comply with the ActiveHigh polarity specified by QEMU's ACPI tables. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Gabriel L. Somlo <somlo@cmu.edu> [Move documentation to KVM_IRQ_LINE, add ia64. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-13powerpc: add support for reserved memory defined by device treeMarek Szyprowski
Enable reserved memory initialization from device tree. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-03-13arm64: add support for reserved memory defined by device treeMarek Szyprowski
Enable reserved memory initialization from device tree. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-03-13spi: sirf: Add missing spi_master_{resume,suspend} calls to PM callbacksAxel Lin
This is required since commit 2025172e3280 "spi/bitbang: Use core message pump". spi-bitbang now uses core message pump, so it needs to call spi_master_suspend/ spi_master_resume to stop/start the queue while suspend/resume. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13spi: altera: Use bits_per_word_maskAxel Lin
This driver does not work for bits_per_word greater than 16. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13spi: oc-tiny: Remove unneeded NULL checking for hw->bitbang.masterAxel Lin
We already has NULL test for master after calling spi_alloc_master(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13spi: clps711x: Remove duplicate code to set default bits_per_word and max speedAxel Lin
In the implementation of __spi_validate(), spi core will set transfer bits_per_word and max speed as spi device default if it is not set for this transfer. So we can remove the same logic in spi_clps711x_setup_xfer() and spi_clps711x_transfer_one(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13spi: sc18is602: Convert to let spi core validate transfer speedAxel Lin
Set master->max_speed_hz and master->min_speed_hz then spi core will handle checking transfer speed. So we can remove the same checking in this driver. This patch also remove testing if hz is 0 because spi->max_speed_hz will be default set to master->min_speed_hz if it was not set. So the transfer speed will never set to 0. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13KVM: PPC: Book3S HV: Fix register usage when loading/saving VRSAVEPaul Mackerras
Commit 595e4f7e697e ("KVM: PPC: Book3S HV: Use load/store_fp_state functions in HV guest entry/exit") changed the register usage in kvmppc_save_fp() and kvmppc_load_fp() but omitted changing the instructions that load and save VRSAVE. The result is that the VRSAVE value was loaded from a constant address, and saved to a location past the end of the vcpu struct, causing host kernel memory corruption and various kinds of host kernel crashes. This fixes the problem by using register r31, which contains the vcpu pointer, instead of r3 and r4. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-13KVM: PPC: Book3S HV: Remove bogus duplicate codePaul Mackerras
Commit 7b490411c37f ("KVM: PPC: Book3S HV: Add new state for transactional memory") incorrectly added some duplicate code to the guest exit path because I didn't manage to clean up after a rebase correctly. This removes the extraneous material. The presence of this extraneous code causes host crashes whenever a guest is run. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-13ASoC: Intel: don't select RT5640 if !I2CStephen Warren
The rt5640 driver won't compile without I2C enabled. Hence, the Intel Haswell and Baytrail+RT5640 ASoC drivers must also depend on I2C, since these select RT5640. This solves: sound/soc/codecs/rt5640.c:2220:1: warning: data definition has no type or storage class [enabled by default] sound/soc/codecs/rt5640.c:2220:1: error: type defaults to ‘int’ in declaration of ‘module_i2c_driver’ [-Werror=implicit-int] sound/soc/codecs/rt5640.c:2220:1: warning: parameter names (without types) in function declaration [enabled by default] sound/soc/codecs/rt5640.c:2210:26: warning: ‘rt5640_i2c_driver’ defined but not used [-Wunused-variable] Reported-by: Jim Davis <jim.epost@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13ASoC: pxa: tosa: Convert to table based DAPM and control setupLars-Peter Clausen
Use table based setup to register the controls and DAPM widgets and routes. This on one hand makes the code a bit shorter and cleaner and on the other hand the board level DAPM elements get registered in the card's DAPM context rather than in the CODEC's DAPM context. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13ASoC: pxa: magician: Convert to table based DAPM and control setupLars-Peter Clausen
Use table based setup to register the controls and DAPM widgets and routes. This on one hand makes the code a bit shorter and cleaner and on the other hand the board level DAPM elements get registered in the card's DAPM context rather than in the CODEC's DAPM context. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13Merge branch 'topic/dapm' of ↵Mark Brown
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-pxa
2014-03-13ASoC: snappercl15: Convert to table based DAPM setupLars-Peter Clausen
Use table based setup to register the DAPM widgets and routes. This on one hand makes the code a bit shorter and cleaner and on the other hand the board level DAPM elements get registered in the card's DAPM context rather than in the CODEC's DAPM context. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13ASoC: ams-delta: Fix compile errorLars-Peter Clausen
snd_soc_dapm_mutex_unlock() wants a pointer to the DAPM context, not the CODEC. Fixes: 03510ca07 ("ASoC: ams-delta: Update locking around use of DAPM pin API") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-13MAINTAINERS: add xtfpga platform sectionMax Filippov
This section will list xtfpga platform-specific drivers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>