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2020-05-05ARM: OMAP4: Make L4SEC clock domain SWSUP onlyTero Kristo
Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only') made DRA7 SoC L4SEC clock domain SWSUP only because of power state transition issues detected with HWSUP mode. Based on experimentation similar issue exists on OMAP4, so do the same change for OMAP4 also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: omap5: add DES crypto accelerator nodeTero Kristo
OMAP5 contains a single DES crypto accelerator instance. Add node for this in DT to enable it. We keep the node disabled for now, as it appears OMAP5 platform is running out of available DMA channels, and DES is the least interesting crypto accelerator available on the device. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: omap5: add SHA crypto accelerator nodeTero Kristo
Add the single available SHA crypto accelerator device for OMAP5 SoC. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: omap5: add aes2 entryTero Kristo
OMAP5 has AES hardware cryptographic accelerator, add AES2 instance for it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: omap5: add aes1 entryTero Kristo
OMAP5 has AES hardware cryptographic accelerator, add AES1 instance for it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7-ipu-dsp-common: Add watchdog timers to IPU and DSP nodesSuman Anna
The watchdog timer information has been added to all the IPU and DSP remote processor device nodes in the DRA7xx/AM57xx SoC families. The data has been added to the two common dra7-ipu-dsp-common and dra74-ipu-dsp-common dtsi files that can be included by all the desired board files. The following timers are chosen as the watchdog timers, as per the usage on the current firmware images: IPU2: GPTimers 4 & 9 (one for each Cortex-M4 core) IPU1: GPTimers 7 & 8 (one for each Cortex-M4 core) DSP1: GPTimer 10 DSP2: GPTimer 13 Each of the IPUs has two Cortex-M4 processors and so uses a timer each for providing watchdog support on that processor irrespective of whether the IPU is running in SMP-mode or non-SMP node. The chosen timers also need to be unique from the ones used by other processors (regular timers or watchdog timers) so that they can be supported simultaneously. The MPU-side drivers will use this data to initialize the watchdog timer(s), and listen for any watchdog triggers. The BIOS-side code on these processors needs to configure/refresh the corresponding timer properly to not throw a watchdog error. The watchdog timers are optional in general, but are mandatory to be added to support watchdog error recovery on a particular processor. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: am571x-idk: Add CMA pools and enable IPUs & DSP1 rprocsSuman Anna
The CMA reserved memory nodes have been added for both the IPUs and the DSP1 remoteproc devices on the AM571x IDK board. These nodes are assigned to the respective rproc device nodes, and both the IPUs and the DSP1 remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The addresses chosen are the same as the respective processors on the DRA72 EVM board to maintain firmware compatibility between the two boards. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: am572x-idk-common: Add CMA pools and enable IPU & DSP rprocsSuman Anna
The CMA reserved memory nodes have been added for all the IPU and DSP remoteproc devices in the am572x-idk-common.dtsi file that is common to both the AM572x and AM574x IDK boards. These nodes are assigned to the respective rproc device nodes, and all the IPU and DSP remote processors are enabled. The current CMA pools and sizes are defined statically for each device. The addresses chosen are the same as the respective processors on the AM57xx EVM board to maintain firmware compatibility between the two boards. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: beagle-x15-common: Add CMA pools and enable IPU & DSP rprocsSuman Anna
The CMA reserved memory nodes have been added for all the IPU and DSP remoteproc devices on all the AM57xx BeagleBoard-X15 boards. These nodes are assigned to the respective rproc device nodes, and all the IPU and DSP remote processors are enabled for all these boards. The current CMA pools and sizes are defined statically for each device. The addresses chosen are the same as the respective processors on the DRA7 EVM board to maintain firmware compatibility between the two boards. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra76-evm: Add CMA pools and enable IPU & DSP rprocsSuman Anna
The CMA reserved memory nodes have been added for all the IPU and the DSP remoteproc devices on the DRA76 EVM board, and assigned to the respective rproc device nodes. These match the configuration used on the DRA7 EVM board. Both the CMA nodes and the corresponding rproc nodes are also enabled to enable these processors on the DRA76 EVM board. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra71-evm: Add CMA pools and enable IPUs & DSP1 rprocsSuman Anna
The CMA reserved memory nodes have been added for both the IPUs and the DSP1 remoteproc devices on DRA71 EVM board. These nodes are assigned to the respective rproc device nodes, and both the IPUs and the DSP1 remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The addresses chosen are the same as the respective processors on the DRA72 EVM board to maintain firmware compatibility between the two boards. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra72-evm-revc: Add CMA pools and enable IPUs & DSP1 rprocsSuman Anna
The CMA reserved memory nodes have been added for both the IPUs and the DSP1 remoteproc devices on the DRA72 EVM rev C board, and assigned to the respective rproc device nodes. These match the configuration used on the DRA72 EVM board. Both the CMA nodes and the corresponding rproc nodes are also enabled to enable these processors on the DRA72 EVM rev C board. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra72-evm: Add CMA pools and enable IPUs & DSP1 rprocsSuman Anna
The CMA reserved memory nodes have been added for both the IPUs and the DSP1 remoteproc devices on DRA72 EVM board. These nodes are assigned to the respective rproc device nodes, and both the IPUs and the DSP1 remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The addresses chosen are the same as the respective processors on the DRA7 EVM board to maintain firmware compatibility between the two boards. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7-evm: Add CMA pools and enable IPU & DSP rprocsSuman Anna
The CMA reserved memory nodes have been added for all the IPU and DSP remoteproc devices on DRA7 EVM board. These nodes are assigned to the respective rproc device nodes, and all the IPU and DSP remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7-ipu-dsp-common: Add timers to IPU and DSP nodesSuman Anna
The BIOS System Tick timers have been added for all the IPU and DSP remoteproc devices in the DRA7 SoC family. The data is added to the two common dra7-ipu-dsp-common and dra74-ipu-dsp-common dtsi files that are included by all the desired board files. The following timers are chosen, as per the timers used on the current firmware images: IPU2: GPTimer 3 IPU1: GPTimer 11 DSP1: GPTimer 5 DSP2: GPTimer 6 The timers are optional, but are mandatory to support advanced device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, if needed. Each of the IPUs has two Cortex-M4 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7-ipu-dsp-common: Add mailboxes to IPU and DSP nodesSuman Anna
Add the required 'mboxes' property to all the IPU and DSP remote processors (IPU1, IPU2, DSP1 and DSP2) in the two available common dtsi files - dra7-ipu-dsp-common and dra74-ipu-dsp-common dtsi files. The latter file is for platforms having DRA74x/DRA76x/AM572x/AM574x SoCs which do have a DSP2 processor in addition to the other common remote processors. The common data is added to the former file, and the DSP2 only data is added to the latter file. The mailboxes are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the remote processors. Each of the remote processors uses a single sub-mailbox node, the IPUs are assumed to be running in SMP-mode. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7-ipu-dsp-common: Move mailboxes into common filesSuman Anna
The System Mailboxes 5 and 6 and their corresponding child sub-mailbox (IPC 3.x) nodes are enabled in each of the DRA7xx and AM57xx board dts files individually at present. These mailboxes enable the Remote Processor Messaging (RPMsg) communication stack between the MPU host processor and each of the IPU1, IPU2, DSP1 and DSP2 remote processors. Move these nodes into two common dtsi files - dra7-ipu-dsp-common and dra74-ipu-dsp-common files, which are then included in various board dts files. These files can be used to add all the common configuration properties (except memory data) required by remote processor nodes. The memory pools and the remote processor nodes themselves are to be enabled in the actual board dts files. The first file is to used by platforms using DRA72x/DRA71x/AM571x/AM570x SoCs, and the second file is to be used by platforms using DRA74x/DRA76x/AM572x/AM574x SoCs. The second file includes the first file and contains additional data only applicable for DSP2 remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA72x: Add aliases for rproc nodesSuman Anna
Add aliases for all the 3 remote processor nodes common to all DRA72x/DRA71x/AM571x/AM570x boards. The aliases uses the stem "rproc", and are defined in the order of the most common processors on the DRA72x family. The ids are same as DRA74x except for the missing DSP2. The aliases can be overridden, if needed, in the respective derivative board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA74x: Add aliases for rproc nodesSuman Anna
Add aliases for all the IPU and DSP remoteproc processor nodes common to all DRA74x/DRA76x/AM572x/AM574x boards. The aliases uses the stem "rproc". The aliases are defined in the order of the most common processors on the DRA74x family. The aliases can be overridden, if needed, in the respective derivative board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA74x: Add DSP2 processor device nodeSuman Anna
The DRA7xx family of SoCs can contain upto two identical DSP processor subsystems. The second DSP processor subsystem is present only on the DRA74x/DRA76x variants. The processor device DT node has therefore been added in disabled state for this processor subsystem in the DRA74x specific DTS file. NOTE: 1. The node does not have any mailboxes, timers or CMA region assigned, they should be added in the respective board dts files. 2. The node should also be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: converted to support ti-sysc from legacy hwmod] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA7: Add common IPU and DSP nodesSuman Anna
The DRA7xx family of SOCs have two IPUs and upto two DSP processor subsystems in general. The IPU processor subsystem contains dual-core ARM Cortex-M4 processors, while the DSP processor subsystem is based on the TI's standard TMS320C66x DSP CorePac core. The IPUs are very similar to those on OMAP5. Two IPUs and one DSP processor subsystems is the most common configuration. The processor device DT nodes have been added for these processor subsystems, with the internal memories added through 'reg' and 'reg-names' properties. The IPUs only have an L2 RAM, whereas the DSPs have L1P, L1D and L2 RAM memories. NOTE: 1. The nodes do not have any mailboxes, timers or CMA regions assigned, they should be added in the respective board dts files. 2. The nodes haven been disabled by default and the enabling of these nodes is also left to the respective board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: convert to ti-sysc support from legacy hwmod] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7: add timer_sys_ck entries for IPU/DSP timersTero Kristo
With this, the clocksource driver can setup the timers properly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05Merge branch 'omap-for-v5.8/dt-timer' into omap-for-v5.8/dtTony Lindgren
2020-05-05ARM: dts: Add 32KHz clock as default clock sourceLokesh Vutla
Clocksource to timer configured in pwm mode can be selected using the DT property ti,clock-source. There are few pwm timers which are not selecting the clock source and relying on default value in hardware or selected by driver. Instead of relying on default value, always select the clock source from DT. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-04-21ARM: dts: am57xx-idk-common: add tc358778 bridgeTomi Valkeinen
AM5 IDK boards have TC358778 DPI-to-DSI bridge. Two different DSI panel models are used with the AM5 IDKs, and these panels are added with DT overlays. The AM5 IDKs can also be used without any panel. Add TC358778 data to the am57xx-idk-common.dtsi, but set the status to disabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-04-21ARM: dts: am5729: beaglebone-ai: adding device treeJason Kridner
BeagleBoard.org BeagleBone AI is an open source hardware single board computer based on the Texas Instruments AM5729 SoC featuring dual-core 1.5GHz Arm Cortex-A15 processor, dual-core C66 digital signal processor (DSP), quad-core embedded vision engine (EVE), Arm Cortex-M4 processors, dual programmable realtime unit industrial control subsystems and more. The board features 1GB DDR3L, USB3.0 Type-C, USB HS Type-A, microHDMI, 16GB eMMC flash, 1G Ethernet, 802.11ac 2/5GHz, Bluetooth, and BeagleBone expansion headers. For more information, refer to: https://beaglebone.ai This patch introduces the BeagleBone AI device tree. Note that the device use the "ti,tpd12s016" component which is software compatible with "ti,tpd12s015". Thus we only use the latter driver. Signed-off-by: Jason Kridner <jdk@ti.com> Signed-off-by: Caleb Robey <c-robey@ti.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Cc: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-04-12Linux 5.7-rc1v5.7-rc1Linus Torvalds
2020-04-12MAINTAINERS: sort field names for all entriesLinus Torvalds
This sorts the actual field names too, potentially causing even more chaos and confusion at merge time if you have edited the MAINTAINERS file. But the end result is a more consistent layout, and hopefully it's a one-time pain minimized by doing this just before the -rc1 release. This was entirely scripted: ./scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS --order Requested-by: Joe Perches <joe@perches.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-04-12MAINTAINERS: sort entries by entry nameLinus Torvalds
They are all supposed to be sorted, but people who add new entries don't always know the alphabet. Plus sometimes the entry names get edited, and people don't then re-order the entry. Let's see how painful this will be for merging purposes (the MAINTAINERS file is often edited in various different trees), but Joe claims there's relatively few patches in -next that touch this, and doing it just before -rc1 is likely the best time. Fingers crossed. This was scripted with /scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS but then I also ended up manually upper-casing a few entry names that stood out when looking at the end result. Requested-by: Joe Perches <joe@perches.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-04-12Merge tag 'x86-urgent-2020-04-12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A set of three patches to fix the fallout of the newly added split lock detection feature. It addressed the case where a KVM guest triggers a split lock #AC and KVM reinjects it into the guest which is not prepared to handle it. Add proper sanity checks which prevent the unconditional injection into the guest and handles the #AC on the host side in the same way as user space detections are handled. Depending on the detection mode it either warns and disables detection for the task or kills the task if the mode is set to fatal" * tag 'x86-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: KVM: VMX: Extend VMXs #AC interceptor to handle split lock #AC in guest KVM: x86: Emulate split-lock access as a write in emulator x86/split_lock: Provide handle_guest_split_lock()
2020-04-12Merge tag 'timers-urgent-2020-04-12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull time(keeping) updates from Thomas Gleixner: - Fix the time_for_children symlink in /proc/$PID/ so it properly reflects that it part of the 'time' namespace - Add the missing userns limit for the allowed number of time namespaces, which was half defined but the actual array member was not added. This went unnoticed as the array has an exessive empty member at the end but introduced a user visible regression as the output was corrupted. - Prevent further silent ucount corruption by adding a BUILD_BUG_ON() to catch half updated data. * tag 'timers-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: ucount: Make sure ucounts in /proc/sys/user don't regress again time/namespace: Add max_time_namespaces ucount time/namespace: Fix time_for_children symlink
2020-04-12Merge tag 'sched-urgent-2020-04-12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fixes/updates from Thomas Gleixner: - Deduplicate the average computations in the scheduler core and the fair class code. - Fix a raise between runtime distribution and assignement which can cause exceeding the quota by up to 70%. - Prevent negative results in the imbalanace calculation - Remove a stale warning in the workqueue code which can be triggered since the call site was moved out of preempt disabled code. It's a false positive. - Deduplicate the print macros for procfs - Add the ucmap values to the SCHED_DEBUG procfs output for completness * tag 'sched-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/debug: Add task uclamp values to SCHED_DEBUG procfs sched/debug: Factor out printing formats into common macros sched/debug: Remove redundant macro define sched/core: Remove unused rq::last_load_update_tick workqueue: Remove the warning in wq_worker_sleeping() sched/fair: Fix negative imbalance in imbalance calculation sched/fair: Fix race between runtime distribution and assignment sched/fair: Align rq->avg_idle and rq->avg_scan_cost
2020-04-12Merge tag 'perf-urgent-2020-04-12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Thomas Gleixner: "Three fixes/updates for perf: - Fix the perf event cgroup tracking which tries to track the cgroup even for disabled events. - Add Ice Lake server support for uncore events - Disable pagefaults when retrieving the physical address in the sampling code" * tag 'perf-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/core: Disable page faults when getting phys address perf/x86/intel/uncore: Add Ice Lake server uncore support perf/cgroup: Correct indirection in perf_less_group_idx() perf/core: Fix event cgroup tracking
2020-04-12Merge tag 'locking-urgent-2020-04-12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Thomas Gleixner: "Three small fixes/updates for the locking core code: - Plug a task struct reference leak in the percpu rswem implementation. - Document the refcount interaction with PID_MAX_LIMIT - Improve the 'invalid wait context' data dump in lockdep so it contains all information which is required to decode the problem" * tag 'locking-urgent-2020-04-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: locking/lockdep: Improve 'invalid wait context' splat locking/refcount: Document interaction with PID_MAX_LIMIT locking/percpu-rwsem: Fix a task_struct refcount
2020-04-12Merge tag '5.7-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds
Pull cifs fixes from Steve French: "Ten cifs/smb fixes: - five RDMA (smbdirect) related fixes - add experimental support for swap over SMB3 mounts - also a fix which improves performance of signed connections" * tag '5.7-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6: smb3: enable swap on SMB3 mounts smb3: change noisy error message to FYI smb3: smbdirect support can be configured by default cifs: smbd: Do not schedule work to send immediate packet on every receive cifs: smbd: Properly process errors on ib_post_send cifs: Allocate crypto structures on the fly for calculating signatures of incoming packets cifs: smbd: Update receive credits before sending and deal with credits roll back on failure before sending cifs: smbd: Check send queue size before posting a send cifs: smbd: Merge code to track pending packets cifs: ignore cached share root handle closing errors
2020-04-12Merge tag 'nfs-for-5.7-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds
Pull NFS client bugfix from Trond Myklebust: "Fix an RCU read lock leakage in pnfs_alloc_ds_commits_list()" * tag 'nfs-for-5.7-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: pNFS: Fix RCU lock leakage
2020-04-11Merge tag 'nios2-v5.7-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2 Pull nios2 updates from Ley Foon Tan: - Remove nios2-dev@lists.rocketboards.org from MAINTAINERS - remove 'resetvalue' property - rename 'altr,gpio-bank-width' -> 'altr,ngpio' - enable the common clk subsystem on Nios2 * tag 'nios2-v5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2: MAINTAINERS: Remove nios2-dev@lists.rocketboards.org arch: nios2: remove 'resetvalue' property arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio' arch: nios2: Enable the common clk subsystem on Nios2
2020-04-11Merge tag 'dma-mapping-5.7-1' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds
Pull dma-mapping fixes from Christoph Hellwig: - fix an integer truncation in dma_direct_get_required_mask (Kishon Vijay Abraham) - fix the display of dma mapping types (Grygorii Strashko) * tag 'dma-mapping-5.7-1' of git://git.infradead.org/users/hch/dma-mapping: dma-debug: fix displaying of dma allocation type dma-direct: fix data truncation in dma_direct_get_required_mask()
2020-04-11Merge tag 'kbuild-v5.7-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: - raise minimum supported binutils version to 2.23 - remove old CONFIG_AS_* macros that we know binutils >= 2.23 supports - move remaining CONFIG_AS_* tests to Kconfig from Makefile - enable -Wtautological-compare warnings to catch more issues - do not support GCC plugins for GCC <= 4.7 - fix various breakages of 'make xconfig' - include the linker version used for linking the kernel into LINUX_COMPILER, which is used for the banner, and also exposed to /proc/version - link lib-y objects to vmlinux forcibly when CONFIG_MODULES=y, which allows us to remove the lib-ksyms.o workaround, and to solve the last known issue of the LLVM linker - add dummy tools in scripts/dummy-tools/ to enable all compiler tests in Kconfig, which will be useful for distro maintainers - support the single switch, LLVM=1 to use Clang and all LLVM utilities instead of GCC and Binutils. - support LLVM_IAS=1 to enable the integrated assembler, which is still experimental * tag 'kbuild-v5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (36 commits) kbuild: fix comment about missing include guard detection kbuild: support LLVM=1 to switch the default tools to Clang/LLVM kbuild: replace AS=clang with LLVM_IAS=1 kbuild: add dummy toolchains to enable all cc-option etc. in Kconfig kbuild: link lib-y objects to vmlinux forcibly when CONFIG_MODULES=y MIPS: fw: arc: add __weak to prom_meminit and prom_free_prom_memory kbuild: remove -I$(srctree)/tools/include from scripts/Makefile kbuild: do not pass $(KBUILD_CFLAGS) to scripts/mkcompile_h Documentation/llvm: fix the name of llvm-size kbuild: mkcompile_h: Include $LD version in /proc/version kconfig: qconf: Fix a few alignment issues kconfig: qconf: remove some old bogus TODOs kconfig: qconf: fix support for the split view mode kconfig: qconf: fix the content of the main widget kconfig: qconf: Change title for the item window kconfig: qconf: clean deprecated warnings gcc-plugins: drop support for GCC <= 4.7 kbuild: Enable -Wtautological-compare x86: update AS_* macros to binutils >=2.23, supporting ADX and AVX2 crypto: x86 - clean up poly1305-x86_64-cryptogams.S by 'make clean' ...
2020-04-11mailmap: Add Sedat Dilek (replacement for expired email address)Sedat Dilek
I do not longer work for credativ Germany. Please, use my private email address instead. This is for the case when people want to CC me on patches sent from my old business email address. Signed-off-by: Sedat Dilek <sedat.dilek@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-04-11pNFS: Fix RCU lock leakageTrond Myklebust
Another brown paper bag moment. pnfs_alloc_ds_commits_list() is leaking the RCU lock. Fixes: a9901899b649 ("pNFS: Add infrastructure for cleaning up per-layout commit structures") Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
2020-04-11KVM: VMX: Extend VMXs #AC interceptor to handle split lock #AC in guestXiaoyao Li
Two types of #AC can be generated in Intel CPUs: 1. legacy alignment check #AC 2. split lock #AC Reflect #AC back into the guest if the guest has legacy alignment checks enabled or if split lock detection is disabled. If the #AC is not a legacy one and split lock detection is enabled, then invoke handle_guest_split_lock() which will either warn and disable split lock detection for this task or force SIGBUS on it. [ tglx: Switch it to handle_guest_split_lock() and rename the misnamed helper function. ] Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lkml.kernel.org/r/20200410115517.176308876@linutronix.de
2020-04-11KVM: x86: Emulate split-lock access as a write in emulatorXiaoyao Li
Emulate split-lock accesses as writes if split lock detection is on to avoid #AC during emulation, which will result in a panic(). This should never occur for a well-behaved guest, but a malicious guest can manipulate the TLB to trigger emulation of a locked instruction[1]. More discussion can be found at [2][3]. [1] https://lkml.kernel.org/r/8c5b11c9-58df-38e7-a514-dc12d687b198@redhat.com [2] https://lkml.kernel.org/r/20200131200134.GD18946@linux.intel.com [3] https://lkml.kernel.org/r/20200227001117.GX9940@linux.intel.com Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lkml.kernel.org/r/20200410115517.084300242@linutronix.de
2020-04-11x86/split_lock: Provide handle_guest_split_lock()Thomas Gleixner
Without at least minimal handling for split lock detection induced #AC, VMX will just run into the same problem as the VMWare hypervisor, which was reported by Kenneth. It will inject the #AC blindly into the guest whether the guest is prepared or not. Provide a function for guest mode which acts depending on the host SLD mode. If mode == sld_warn, treat it like user space, i.e. emit a warning, disable SLD and mark the task accordingly. Otherwise force SIGBUS. [ bp: Add a !CPU_SUP_INTEL stub for handle_guest_split_lock(). ] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lkml.kernel.org/r/20200410115516.978037132@linutronix.de Link: https://lkml.kernel.org/r/20200402123258.895628824@linutronix.de
2020-04-11kbuild: fix comment about missing include guard detectionMasahiro Yamada
The keyword here is 'twice' to explain the trick. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-10Merge branch 'akpm' (patches from Andrew)Linus Torvalds
Merge yet more updates from Andrew Morton: - Almost all of the rest of MM (memcg, slab-generic, slab, pagealloc, gup, hugetlb, pagemap, memremap) - Various other things (hfs, ocfs2, kmod, misc, seqfile) * akpm: (34 commits) ipc/util.c: sysvipc_find_ipc() should increase position index kernel/gcov/fs.c: gcov_seq_next() should increase position index fs/seq_file.c: seq_read(): add info message about buggy .next functions drivers/dma/tegra20-apb-dma.c: fix platform_get_irq.cocci warnings change email address for Pali Rohár selftests: kmod: test disabling module autoloading selftests: kmod: fix handling test numbers above 9 docs: admin-guide: document the kernel.modprobe sysctl fs/filesystems.c: downgrade user-reachable WARN_ONCE() to pr_warn_once() kmod: make request_module() return an error when autoloading is disabled mm/memremap: set caching mode for PCI P2PDMA memory to WC mm/memory_hotplug: add pgprot_t to mhp_params powerpc/mm: thread pgprot_t through create_section_mapping() x86/mm: introduce __set_memory_prot() x86/mm: thread pgprot_t through init_memory_mapping() mm/memory_hotplug: rename mhp_restrictions to mhp_params mm/memory_hotplug: drop the flags field from struct mhp_restrictions mm/special: create generic fallbacks for pte_special() and pte_mkspecial() mm/vma: introduce VM_ACCESS_FLAGS mm/vma: define a default value for VM_DATA_DEFAULT_FLAGS ...
2020-04-10Merge tag 'docs-5.7-2' of git://git.lwn.net/linuxLinus Torvalds
Pull Documentation fixes from Jonathan Corbet: "A handful of late-arriving fixes for the documentation tree" * tag 'docs-5.7-2' of git://git.lwn.net/linux: Documentation: android: binderfs: add 'stats' mount option Documentation: driver-api/usb/writing_usb_driver.rst Updates documentation links docs: driver-api: address duplicate label warning Documentation: sysrq: fix RST formatting docs: kernel-parameters.txt: Fix broken references docs: kernel-parameters.txt: Remove nompx docs: filesystems: fix typo in qnx6.rst
2020-04-10Merge tag 'for-linus-5.7-ofs1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux Pull orangefs updates from Mike Marshall: "A fix and two cleanups. Fix: - Christoph Hellwig noticed that some logic I added to orangefs_file_read_iter introduced a race condition, so he sent a reversion patch. I had to modify his patch since reverting at this point broke Orangefs. Cleanups: - Christoph Hellwig noticed that we were doing some unnecessary work in orangefs_flush, so he sent in a patch that removed the un-needed code. - Al Viro told me he had trouble building Orangefs. Orangefs should be easy to build, even for Al :-). I looked back at the test server build notes in orangefs.txt, just in case that's where the trouble really is, and found a couple of typos and made a couple of clarifications" * tag 'for-linus-5.7-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux: orangefs: clarify build steps for test server in orangefs.txt orangefs: don't mess with I_DIRTY_TIMES in orangefs_flush orangefs: get rid of knob code...
2020-04-10Merge tag 'xtensa-20200410' of git://github.com/jcmvbkbc/linux-xtensaLinus Torvalds
Pull xtensa updates from Max Filippov: - replace setup_irq() by request_irq() - cosmetic fixes in xtensa Kconfig and boot/Makefile * tag 'xtensa-20200410' of git://github.com/jcmvbkbc/linux-xtensa: arch/xtensa: fix grammar in Kconfig help text xtensa: remove meaningless export ccflags-y xtensa: replace setup_irq() by request_irq()
2020-04-10Merge tag 'for-linus-5.7-rc1b-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull more xen updates from Juergen Gross: - two cleanups - fix a boot regression introduced in this merge window - fix wrong use of memory allocation flags * tag 'for-linus-5.7-rc1b-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: x86/xen: fix booting 32-bit pv guest x86/xen: make xen_pvmmu_arch_setup() static xen/blkfront: fix memory allocation flags in blkfront_setup_indirect() xen: Use evtchn_type_t as a type for event channels