Age | Commit message (Collapse) | Author |
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Appears to be compatible with GM107.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Appears to be compatible with GM200.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Appears to be compatible with GK104.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Appears to be compatible with GM200.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Appears to be compatible with GK104.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The GPU executes DEVINIT itself now, which makes our lives a bit easier.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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No real surprises here so far.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Appears to be compatible with GP100.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Will be required for Turing.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The token will also contain runlist ID on Turing, so instead expose it as
an opaque value from NVKM so the client doesn't need to care.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The GPU saves off some stuff to the address specified in this part of RAMFC
when the channel faults, so we should probably point it at a valid address.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The trick we used (and still use for older GPUs) doesn't work on Turing.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Turing will require different code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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We're about to be adding more of them.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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We will need to bash different registers on Turing.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Will be used by SVM code to allow direct (without going through MMU) memcpy
using the GPU copy engines.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Will be used to match fault buffer entries with a channel.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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This is needed for Turing, but we're supposed to wait for completion after
re-writing the value on older GPUs anyway.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Aside from being a nice cleanup, these will to allow the upcoming direct
page mapping interfaces to play nicely with normal mappings.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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The GPU will continually fire interrupts while a fault buffer GET != PUT,
and to stop the spurious interrupts while the handler does its thing, we
were disabling the fault buffer temporarily.
This is not actually a great idea to begin with, and made worse by Volta
resetting GET/PUT when it's reactivated. So, let's not do that.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Will allow more shared fault buffer handling code between Pascal/Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Various structures are accessed by the GPU through BAR2 for some reason
on newer GPUs. This commit makes it more convenient to handle.
Will be used for GP100- fault buffers, and GV100- fault method buffers.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Will be used for Turing.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Turing GPUs can have more than one.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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This makes debugging with DP tracing a lot harder to interpret, so name
each i2c based off the name of the encoder that it's for
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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We need to actually make sure we check this on resume since otherwise we
won't know whether or not the topology is still there once we've
resumed, which will cause us to still think the topology is connected
even after it's been removed if the removal happens mid-suspend.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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With this, nvbios /sys/kernel/debug/dri/*/vbios.rom now works!
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Since we already expose the vbios.rom file here, why not also expose the
strap_peek?
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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As part of commit cfea88a4d866 ("drm/nouveau: Start using new drm_dev
initialization helpers"), the initialization of the Nouveau DRM device
was reworked and along the way the platform driver initialization was
left incomplete. Add a call to nouveau_drm_device_init() to make sure
all of the structures are properly initialized.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Adding brackets allows to multiply the register value,
masked by TS1_RAMP_COEFF_MASK, by an ADJUST value
properly and not to multiply ADJUST by register value and
then mask the whole.
Fixes: 1d693155 ("thermal: add stm32 thermal driver")
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: David Hernandez Sanchez <david.hernandezsanchez@st.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Calling stm_thermal_read_factory_settings before clocking
internal peripheral causes bad register values and makes
temperature computation wrong.
Calling stm_thermal_read_factory_settings inside
stm_thermal_prepare fixes this problem as internal
peripheral is well clocked at this stage.
Fixes: 1d693155 ("thermal: add stm32 thermal driver")
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: David Hernandez Sanchez <david.hernandezsanchez@st.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Without this patch the thermal driver is broken on hi3660.
The dual sensors support patchset was partially merged, unfortunately
the dual thermal zones definition is not available in the DT yet, so
when the driver tries to register all the sensors that fails.
By reducing to 1 the number of sensors on the hi3660, we switch back
to the previous functionnality.
Fixes: 8c6c36846f11 (thermal/drivers/hisi: Add the dual clusters sensors for hi3660)
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Without this patch, the thermal driver on hi6220 and hi3660 is broken.
That is due because part of the posted patchset was merged but a small
change in the DT was dropped.
The hi6220 and hi3660 do not have an interrupt name in the DT, so
finding interrupt by name fails.
Fix this by returning back to the platform_get_irq() function call.
Fixes: 2cffaeff083f (thermal/drivers/hisi: Use platform_get_irq_byname)
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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This patch adds implementation for global suspend/resume for
devfreq framework. System suspend will next use these functions.
Suggested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Suggested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
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The patch prepares devfreq device for handling suspend/resume
functionality. The new fields will store needed information during this
process. Devfreq framework handles opp-suspend DT entry and there is no
need of modyfications in the drivers code. It uses atomic variables to
make sure no race condition affects the process.
Suggested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Suggested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
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The refactoring is needed for the new client in devfreq: suspend.
To avoid code duplication, move it to the new local function
devfreq_set_target.
Suggested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Suggested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
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Reduce size of duplicated comments by switching to use SPDX identifier.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Add documentation for the new attributes for systems of type MQM87xx,
MSN34xx, MSN37xx. It includes the attributes related to ComEx resets,
system platform reset, JTAG interface enabling, additional CPLD device.
All the above system are equipped with ComEX board, have JTAG selector
and extra CPLD.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
[dvhart: Change kernel version from 5.0 to 4.21 until we know for sure]
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Allow mlxreg-io platform driver activation for the next generation
systems, in particular for MQM87xx, MSN34xx, MSN37xx types, which have:
- extended reset causes bits related to ComEx reset, voltage devices
firmware upgrade, system platform reset;
- additional CPLD device;
- JTAG select capability;
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Exchange LED configuration between msn201x and next generation systems
types.
Bug was introduced when LED driver activation was added to mlx-platform.
LED configuration for the three new system MQMB7, MSN37, MSN34 was
assigned to MSN21 and vice versa. This bug affects MSN21 only and
likely requires backport to v4.19.
Fixes: 1189456b1cce ("platform/x86: mlx-platform: Add LED platform driver activation")
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Shift by one the registers for tachometers (7 - 12).
This fix is relevant for the same new systems MQMB7, MSN37, MSN34,
which are about to be released to the customers.
At the moment, none of them is at customers sites. The customers will
not suffer from this change.
This fix is necessary, because register used before for tachometer 7
has been than reserved for the second PWM for newer systems, which are
not supported yet in mlx-platform driver. So registers of tachometers
7-12 have been shifted by one.
Fixes: 0378123c5800 ("platform/x86: mlx-platform: Add mlxreg-fan platform driver activation")
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Rename product names for next generation systems QMB7, SN37, SN34 to
respectively MQMB7, MSN37, MSN34.
All these systems are about to be released to the customers.
At the moment, none of them is at customers sites. The customers will
not suffer from this change.
The names have been changed due to marketing decision.
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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Add definitions for new registers:
- CPLD3 version - next generation systems are equipped with three CPLD;
- Two reset cause registers, which store the system reset reason (like
system failures, upgrade failures and so on;
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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