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2018-03-27net/mlx5e: Remove rq_headroom field from paramsTariq Toukan
It can be derived from other params, calculate it via the dedicated function when needed. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Remove RQ MPWQE fields from paramsTariq Toukan
Introduce functions to calculate them when needed. They can be derived from other params. This will simplify transition between RQ configurations. In general, any parameter that is not explicitly set or controlled, but derived from other parameters, should not have a control-path field itself, but a getter function. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Use no-offset function in skb header copyTariq Toukan
In copying skb header to skb->data, replace the call to skb_copy_to_linear_data_offset() with a zero offset with the call to the no-offset function skb_copy_to_linear_data(). Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Separate dma base address and offset in dma_sync callTariq Toukan
Pass the base dma address and offset to dma_sync_single_range_for_cpu(), instead of doing the pre-calculation. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Remove unused define MLX5_MPWRQ_STRIDES_PER_PAGETariq Toukan
Clean it up as it's not in use. Fixes: d9d9f156f380 ("net/mlx5e: Expand WQE stride when CQE compression is enabled") Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Disable Striding RQ when PCI is slower than linkTariq Toukan
We turn the feature off for servers with PCI BW bounded by a threshold (16G) and lower than MAX LINK BW. This improves the effectiveness of CQE compression feature, that is defaulted to ON for the same case. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27net/mlx5e: Unify slow PCI heuristicTariq Toukan
Get the link/pci speed query and logic into a single function. Unify the heuristics and use a single PCI threshold (16G) for all. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-03-27Merge tag 'scsi-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "Two driver fixes (ibmvfc, iscsi_tcp) and a USB fix for devices that give the wrong return to Read Capacity and cause a huge log spew. The remaining five patches all try to fix commit 84676c1f21e8 ("genirq/affinity: assign vectors to all possible CPUs") which broke the non-mq I/O path" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: iscsi_tcp: set BDI_CAP_STABLE_WRITES when data digest enabled scsi: sd: Remember that READ CAPACITY(16) succeeded scsi: ibmvfc: Avoid unnecessary port relogin scsi: virtio_scsi: unify scsi_host_template scsi: virtio_scsi: fix IO hang caused by automatic irq vector affinity scsi: core: introduce force_blk_mq scsi: megaraid_sas: fix selection of reply queue scsi: hpsa: fix selection of reply queue
2018-03-28pwm: rcar: Add suspend/resume supportYoshihiro Shimoda
This patch adds suspend/resume support for Renesas PWM driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: rcar: Use PM Runtime to control module clockHien Dang
Runtime PM API (pm_runtime_get_sync/pm_runtime_put) should be used to control module clock instead of clk_prepare_enable and clk_disable_unprepare. Signed-off-by: Hien Dang <hien.dang.eb@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28dt-bindings: pwm: rcar: Add bindings for R-Car M3N supportYoshihiro Shimoda
This patch adds bindings for R-Car M3N. No driver update is needed. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: rcar: Fix a condition to prevent mismatch value setting to dutyRyo Kodama
This patch fixes an issue that is possible to set mismatch value to duty for R-Car PWM if we input the following commands: # cd /sys/class/pwm/<pwmchip>/ # echo 0 > export # cd pwm0 # echo 30 > period # echo 30 > duty_cycle # echo 0 > duty_cycle # cat duty_cycle 0 # echo 1 > enable --> Then, the actual duty_cycle is 30, not 0. So, this patch adds a condition into rcar_pwm_config() to fix this issue. Signed-off-by: Ryo Kodama <ryo.kodama.vz@renesas.com> [shimoda: revise the commit log and add Fixes and Cc tags] Fixes: ed6c1476bf7f ("pwm: Add support for R-Car PWM Timer") Cc: Cc: <stable@vger.kernel.org> # v4.4+ Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: sysfs: Use put_device() instead of kfree()Arvind Yadav
Never directly free @dev after calling device_register(), even if it returned an error! Always use put_device() to give up the reference initialized. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28dt-bindings: pwm: sunxi: Add new compatible stringsAndre Przywara
The PWM controllers found in the Allwinner A64 and H5 SoCs are fully compatible to the PWM controllers found in the A13 and H3. Add new compatible strings for those SoCs to the binding document, so that they can be safely used, together with a fallback string (preferably "allwinner,sun5i-a13-pwm"). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: sun4i: Simplify controller mappingAndre Przywara
At the moment we assign our supported compatible strings to a respective instance of our sun4i_pwm_data structure, even though some of them are the same. To avoid further clutter, split out the three different combinations of features we have at the moment and name them accordingly. This should make it more obvious which compatible string to use for new SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: sun4i: Drop unused .has_rdy memberAndre Przywara
Commit a054c4d68408 ("pwm: sun4i: Drop legacy callbacks") dropped the only user of the .has_rdy member in our sun4i_pwm_data struct. Consequently we don't need to store this anymore for the various SoCs, which paves the way for further simplifications. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: sun4i: Properly check current stateAlexandre Belloni
Correctly extract the prescaler value from CTRL_REG before comparing it to PWM_PRESCAL_MASK. Also, check that both PWM_CLK_GATING and PWM_EN to ensure the PWM is enabled instead of relying on only one of those. Fixes: 93e0dfb2c52f ("pwm: sun4i: Improve hardware read out") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: Remove depends on AVR32Corentin Labbe
AVR32 is gone, so no more need to depend on it. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: stm32: LPTimer: Use 3 cells ->of_xlate()Gerald Baeza
STM32 Low-Power Timer supports generic 3 cells PWM to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28dt-bindings: pwm-stm32-lp: Add #pwm-cellsGerald Baeza
STM32 Low-Power Timer supports generic 3 cells PWM to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: stm32: Protect common prescaler for all channelsFabrice Gasnier
There may be a race, when configuring two PWM channels, with different prescaler values, when there's no active channel yet. Add mutex lock to avoid concurrent access on PWM apply state. This is also precursor patch for PWM capture support. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: stm32: Remove unused struct deviceFabrice Gasnier
dev is never assigned or used. Remove it. Fixes: 7edf7369205b ("pwm: Add driver for STM32 plaftorm") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Improve precision in rate calculationSean Wang
Add a way that turning resolution from in nanosecond into in picosecond to improve noticeably almost 4.5% precision. It's necessary to hold the new resolution with type u64 and thus related operations on u64 are applied instead in those rate calculations. And the patch has a dependency on [1]. [1] http://lists.infradead.org/pipermail/linux-mediatek/2018-March/012225.html Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Remove redundant MODULE_ALIAS entriesSean Wang
MODULE_ALIAS exports information to allow the module to be auto-loaded at boot for the drivers registered using legacy platform registration. However, currently the driver is always used by DT-only platform, MODULE_ALIAS is redundant and should be removed properly. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623Sean Wang
Since the offset for both registers, PWMDWIDTH and PWMTHRES, used to control PWM4 or PWM5 are distinct from the other PWMs, whose wrong programming on PWM hardware causes waveform cannot be output as expected. Thus, the patch adds the extra condition for fixing up the weird case to let PWM4 or PWM5 able to work on MT7623. v1 -> v2: use pwm45_fixup naming instead of pwm45_quirk v2 -> v3: add more tags for Reviewed-by, Fixes, and Cc stable Cc: stable@vger.kernel.org Fixes: caf065f8fd58 ("pwm: Add MediaTek PWM support") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: Zhi Mao <zhi.mao@mediatek.com> Cc: John Crispin <john@phrozen.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: jz4740: Enable for all Ingenic SoCsPaul Cercueil
This driver works perfectly with all the versions of the SoCs from Ingenic that are supported upstream. This makes the driver usable on JZ4740, JZ4770 and JZ4780 SoCs. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: jz4740: Add support for devicetreePaul Cercueil
Add support for probing the pwm-jz4740 directly from devicetree. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: jz4740: Implement ->set_polarity()Paul Cercueil
This permits clients of this driver to specify the polarity to use for their PWM channel. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27IB/core: Refer to RoCE port property to decide building cacheParav Pandit
IB core maintains the GID cache entries for the GID table. This cache table has to be maintained regardless of HCA's support of GID table. For IB and iWarp ports, cache is created by querying the HCA. For RoCE cache is created based on netdev events. Therefore just refer to the RoCE port property of the {device, port} to decide whether to build cache by querying HCA or from netdev events. There is no need to check if HCA support GID table or not. ib_cache_update() referred to RoCE attribute before validating port. Though in all current callers port is valid, it is incorrect to query RoCE port property before validating the port. Therefore, rdma_protocol_roce() check is done after rdma_is_port_valid() verifies that port is valid. Fixes: 115b68aa6ea4 ("IB/ocrdma: Removed GID add/del null routines") Reviewed-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27IB/core: Search GID only for IB link layerParav Pandit
Even though API is only used by IPoIB driver, its incorrect to refer RoCE GID table property to search for GID. Look for only IB link layer to search for the GID. Fixes: dbb12562f7c2 ("IB/{core, ipoib}: Simplify ib_find_gid to search only for IB link layer") Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27IB/core: Refer to RoCE port property instead of GID table propertyParav Pandit
ib_find_gid_by_filter() searches GID with filter only for RoCE link layer regardless of HCA's support for GID table. Therefore, right way to lookup is compare RoCE port property and not the GID table property. Fixes: 99b27e3b5da0 ("IB/cache: Add ib_find_gid_by_filter cache API") Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27IB/core: Generate GID change event regardless of RoCE GID table propertyParav Pandit
Due to following reasons, GID table event is generated regardless of GID table property. 1. GID table cache is maintained at ib core layer regardless of link layer. 2. GID change event has no relation with IB link layer. 3. GID change event also doesn't depend on whether HCA supports GID table or not. Fixes: f3906bd36087 ("IB/core: Refactor GID cache's ib_dispatch_event") Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27IB/cm: Block processing alternate path handling RoCE Rx cm messagesParav Pandit
Due to below reasons, it is better to not support alternate path receive messages for RoCE in near term. 1. Alternate path for RoCE is not supported at rdmacm layer. 2. It is not supported in uverbs/core layer for RoCE. 3. Alternate path for IPv6 for link local address cannot resolve route determinstically without a valid incoming interface id whose usecase make sense only with dual port mode. 4. init_av_from_path while processing LAP messages for IB and RoCE can lead to adding duplicate entry of AV into the port list, leads to list corruption. 5. rdma-core userspace a well known userspace implementation has removed support of libucm which use ucm.ko module, which is the only module that can trigger alternate path related messages. 6. ucm kernel module is requested to be removed from the IB core in patch [1]. [1] https://patchwork.kernel.org/patch/10268503/ Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-28pwm: jz4740: Make disable operation compatible with TCU2 modeMaarten ter Huurne
On the JZ4750 and later SoCs, channel 1 and 2 operate in a different way (TCU2 mode) as the other channels. If a TCU2 mode counter is stopped before its PWM functionality is disabled, the output is not guaranteed to return to the initial level. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28pwm: imx: Let PWM be active during suspendFabio Estevam
On a imx6q-cubox-i board, which has an LED driven by PWM, when the system goes into suspend the PWM block is disabled by default, then the PWM pin goes to logic level zero and turn on the LED during suspend, which is not really the behaviour we want to see. By keeping the PWM enabled during suspend via STOPEN bit, the pwm-leds driver sets the brightness to zero in suspend and then the LED is turned off as expected. So always set the STOPEN to fix the PWM behaviour in suspend. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27rxrpc: Trace call completionDavid Howells
Add a tracepoint to track rxrpc calls moving into the completed state and to log the completion type and the recorded error value and abort code. Signed-off-by: David Howells <dhowells@redhat.com>
2018-03-27rxrpc, afs: Use debug_ids rather than pointers in tracesDavid Howells
In rxrpc and afs, use the debug_ids that are monotonically allocated to various objects as they're allocated rather than pointers as kernel pointers are now hashed making them less useful. Further, the debug ids aren't reused anywhere nearly as quickly. In addition, allow kernel services that use rxrpc, such as afs, to take numbers from the rxrpc counter, assign them to their own call struct and pass them in to rxrpc for both client and service calls so that the trace lines for each will have the same ID tag. Signed-off-by: David Howells <dhowells@redhat.com>
2018-03-27rxrpc: Trace resendDavid Howells
Add a tracepoint to trace packet resend events and to dump the Tx annotation buffer for added illumination. Signed-off-by: David Howells <dhowells@rdhat.com>
2018-03-27dt-bindings: pwm: renesas-tpu: Correct SoC part numbers and family namesGeert Uytterhoeven
R8A73A4 (not R8A77A4) is R-Mobile APE6, R8A7740 is R-Mobile (not R-Car) A1. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27dt-bindings: pwm: renesas-tpu: Correct example TPU register block sizeGeert Uytterhoeven
The Timer Pulse Unit on R-Mobile A1 has registers that lie outside the declared register block. Enlarge the register block size to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <simon.horman@netronome.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27dt-bindings: pwm: rcar: Document r8a774[35] PWM bindingsFabrizio Castro
This patch adds compatible strings specific to r8a774[35], no driver change is needed as the fallback compatible string will activate the right code. Also, this patch replaces the example with a DT snippet used for adding PWM0 support to an r8a7743 based platform as the r8a7743 is now the first platform fully compatible with this driver and its PWM DT nodes refer to up-to-date code. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27dt-bindings: pwm: renesas-tpu: Document r8a774[35] supportFabrizio Castro
Document r8a774[35] specific compatible strings. No driver change is needed as the fallback compatible string "renesas,tpu" activates the right code in the driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27pwm: atmel-tcb: Delete an error message for a failed memory allocationMarkus Elfring
Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-28KVM: PPC: Book3S HV: Use __gfn_to_pfn_memslot() in page fault handlerPaul Mackerras
This changes the hypervisor page fault handler for radix guests to use the generic KVM __gfn_to_pfn_memslot() function instead of using get_user_pages_fast() and then handling the case of VM_PFNMAP vmas specially. The old code missed the case of VM_IO vmas; with this change, VM_IO vmas will now be handled correctly by code within __gfn_to_pfn_memslot. Currently, __gfn_to_pfn_memslot calls hva_to_pfn, which only uses __get_user_pages_fast for the initial lookup in the cases where either atomic or async is set. Since we are not setting either atomic or async, we do our own __get_user_pages_fast first, for now. This also adds code to check for the KVM_MEM_READONLY flag on the memslot. If it is set and this is a write access, we synthesize a data storage interrupt for the guest. In the case where the page is not normal RAM (i.e. page == NULL in kvmppc_book3s_radix_page_fault(), we read the PTE from the Linux page tables because we need the mapping attribute bits as well as the PFN. (The mapping attribute bits indicate whether accesses have to be non-cacheable and/or guarded.) Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2018-03-27pwm: puv3: Delete an error message for a failed memory allocationMarkus Elfring
Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27pwm: stm32: Adopt SPDX identifierBenjamin Gaignard
Add SPDX identifier to make it easier to determine the license of the file. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-03-27IB/core: Protect against concurrent access to hardware statsMark Bloch
Currently access to hardware stats buffer isn't protected, this can result in multiple writes and reads at the same time to the same memory location. This can lead to providing an incorrect value to the user. Add a mutex to protect against it. Fixes: b40f4757daa1 ("IB/core: Make device counter infrastructure dynamic") Signed-off-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27RDMA/hns: ensure for-loop actually iterates and free's buffersColin Ian King
The current for-loop zeros variable i and only loops once, hence not all the buffers are free'd. Fix this by setting i correctly. Detected by CoverityScan, CID#1463415 ("Operands don't affect result") Fixes: a5073d6054f7 ("RDMA/hns: Add eq support of hip08") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-03-27ipc/smack: Tidy up from the change in type of the ipc security hooksEric W. Biederman
Rename the variables shp, sma, msq to isp. As that is how the code already refers to those variables. Collapse smack_of_shm, smack_of_sem, and smack_of_msq into smack_of_ipc, as the three functions had become completely identical. Collapse smack_shm_alloc_security, smack_sem_alloc_security and smack_msg_queue_alloc_security into smack_ipc_alloc_security as the three functions had become identical. Collapse smack_shm_free_security, smack_sem_free_security and smack_msg_queue_free_security into smack_ipc_free_security as the three functions had become identical. Requested-by: Casey Schaufler <casey@schaufler-ca.com> Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-03-27ipc: Directly call the security hook in ipc_ops.associateEric W. Biederman
After the last round of cleanups the shm, sem, and msg associate operations just became trivial wrappers around the appropriate security method. Simplify things further by just calling the security method directly. Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>