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2021-03-23clk: socfpga: merge ARCH_SOCFPGA and ARCH_STRATIX10Krzysztof Kozlowski
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23clk: socfpga: build together Stratix 10, Agilex and N5X clock driversKrzysztof Kozlowski
On a multiplatform kernel there is little benefit in splitting each clock driver per platform because space savings are minimal. Such split also complicates the code, especially after adding compile testing. Build all arm64 Intel SoCFPGA clocks together with one entry in Makefile. This also removed duplicated line in the Makefile (selecting common part of clocks per platform). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23net: stmmac: merge ARCH_SOCFPGA and ARCH_STRATIX10Krzysztof Kozlowski
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23mfd: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10Krzysztof Kozlowski
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. The side effect is that the MFD_ALTERA_A10SR will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23ARM: socfpga: introduce common ARCH_INTEL_SOCFPGAKrzysztof Kozlowski
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23clk: socfpga: allow building N5X clocks with ARCH_N5XKrzysztof Kozlowski
The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor changes. Also the clock drivers are the same. However the clock drivers won't be build without ARCH_AGILEX. One could assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not modeled in Kconfig. In current stage the ARCH_N5X is simply unbootable. Add a separate Kconfig entry for clocks used by both ARCH_N5X and ARCH_AGILEX so the necessary objects will be built if either of them is selected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-22pwm: Add Raspberry Pi Firmware based PWM busNicolas Saenz Julienne
Adds support to control the PWM bus available in official Raspberry Pi PoE HAT. Only RPi's co-processor has access to it, so commands have to be sent through RPi's firmware mailbox interface. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Thierry Reding <thierry.reding@gmail.com>
2021-03-22dt-bindings: pwm: Add binding for RPi firmware PWM busNicolas Saenz Julienne
The PWM bus controlling the fan in RPi's official PoE hat can only be controlled by the board's co-processor. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Rob Herring <robh@kernel.org>
2021-03-22input: raspberrypi-ts: Release firmware handle when not neededNicolas Saenz Julienne
There is no use for the firmware interface after getting the touch buffer address, so release it. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-22staging: vchiq: Release firmware handle on unbindNicolas Saenz Julienne
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-22soc: bcm: raspberrypi-power: Release firmware handle on unbindNicolas Saenz Julienne
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-22reset: raspberrypi: Release firmware handle on unbindNicolas Saenz Julienne
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-22gpio: raspberrypi-exp: Release firmware handle on unbindNicolas Saenz Julienne
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-03-22clk: bcm: rpi: Release firmware handle on unbindNicolas Saenz Julienne
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> drivers/clk/bcm/clk-raspberrypi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
2021-03-22firmware: raspberrypi: Introduce devm_rpi_firmware_get()Nicolas Saenz Julienne
It'll simplify the firmware handling for most consumers. Suggested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-03-22firmware: raspberrypi: Keep count of all consumersNicolas Saenz Julienne
When unbinding the firmware device we need to make sure it has no consumers left. Otherwise we'd leave them with a firmware handle pointing at freed memory. Keep a reference count of all consumers and introduce rpi_firmware_put() which will permit automatically decrease the reference count upon unbinding consumer drivers. Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2021-03-17soc: mediatek: add mtk mutex support for MT8183Yongqiang Niu
Add mtk mutex support for MT8183 SoC. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://lore.kernel.org/r/20210129092209.2584718-8-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-15Merge branch 'ib-iio-scmi-5.12-rc2-take3' of ↵Sudeep Holla
git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into for-next/scmi * 'ib-iio-scmi-5.12-rc2-take3' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: iio/scmi: Adding support for IIO SCMI Based Sensors
2021-03-15scmi-cpufreq: Get opp_shared_cpus from opp-v2 for EMNicola Mazzucato
By design, SCMI performance domains define the granularity of performance controls, they do not describe any underlying hardware dependencies (although they may match in many cases). It is therefore possible to have some platforms where hardware may have the ability to control CPU performance at different granularity and choose to describe fine-grained performance control through SCMI. In such situations, the energy model would be provided with inaccurate information based on controls, while it still needs to know the performance boundaries. To restore correct functionality, retrieve information of CPUs under the same performance domain from operating-points-v2 in DT, and pass it on to EM. Link: https://lore.kernel.org/r/20210218222326.15788-3-nicola.mazzucato@arm.com Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-03-15scmi-cpufreq: Remove deferred probeNicola Mazzucato
The current implementation of the scmi_cpufreq_init() function returns -EPROBE_DEFER when the OPP table is not populated. In practice the cpufreq core cannot handle this error code. Therefore, fix the return value and clarify the error message. Link: https://lore.kernel.org/r/20210218222326.15788-2-nicola.mazzucato@arm.com Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-03-15tee: optee: add invoke_fn tracepointsJisheng Zhang
Add tracepoints to retrieve information about the invoke_fn. This would help to measure how many invoke_fn are triggered and how long it takes to complete one invoke_fn call. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-03-15firmware: imx: scu-pd: do not power off console domainDong Aisheng
Do not power off console domain in runtime pm. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15soc: imx: add i.MX51/i.MX53 unique id supportSebastian Reichel
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM, which can be used as SoC serial number. The same feature is already implemented for i.MX6/i.MX7, so this complements support to earlier SoCs. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-13iio/scmi: Adding support for IIO SCMI Based SensorsJyoti Bhayana
This change provides ARM SCMI Protocol based IIO device. This driver provides support for Accelerometer and Gyroscope using SCMI Sensor Protocol extensions added in the SCMIv3.0 ARM specification Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Jyoti Bhayana <jbhayana@google.com> Link: https://lore.kernel.org/r/20210212172235.507028-2-jbhayana@google.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20210309231259.78050-2-jbhayana@google.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-11dt-bindings: firmware: scm: Add sc7280 supportRajendra Nayak
Add compatible for sc7280 SoC Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1615461961-17716-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: rpmh-rsc: Fold WARN_ON() into if conditionStephen Boyd
Move the WARN_ON() into the if condition so the compiler can see that the branch is unlikely() and possibly optimize it better. Cc: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200521060425.24285-4-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: rpmh-rsc: Loop over fewer bits in irq handlerStephen Boyd
readl() returns a u32, and BITS_PER_LONG is different on 32-bit vs. 64-bit architectures. Let's loop over the possible bits set in that type instead of looping over more bits than we ever may need to. Cc: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200521060425.24285-3-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: rpmh-rsc: Remove tcs_is_free() APIStephen Boyd
This API does very little. Let's replace all the callsites with the normal operations that would be done on top of the bitmap that tcs_in_use is. This simplifies and reduces the code size. Reviewed-by: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200521060425.24285-2-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: smem: Update max processor countSibi Sankar
Update max processor count to reflect the number of co-processors on SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1615269111-25559-2-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: aoss: Add AOSS QMP support for SC7280Sai Prakash Ranjan
Add AOSS QMP support for SC7280 SoC. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/d311b75428da7d87638208490fa9a64b5ef15d6f.1614244789.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11dt-bindings: soc: qcom: aoss: Add SC7280 compatibleSai Prakash Ranjan
Add SC7280 AOSS QMP compatible to the list of possible bindings. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/8584e915f42405a7a4a799133a09d0d4aa65d2a8.1614244789.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: llcc: Add configuration data for SC7280Sai Prakash Ranjan
Add LLCC configuration data for SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/348fcb76ea837c043f2e493c6df8aa5ebb182c92.1614244789.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11dt-bindings: arm: msm: Add LLCC for SC7280Sai Prakash Ranjan
Add LLCC compatible for SC7280 SoC. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/f3b32d437d7c1165a74ceec2cd52ff56b496e5a3.1614244789.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: Fix typos in the file qmi_encdec.cBhaskar Chowdhury
Rudimentory spelling fixes throughout the file. s/descibing/describing/ s/inforation/information/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Link: https://lore.kernel.org/r/20210306213542.19413-1-unixbhaskar@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: rpmhpd: Add sc7280 powerdomainsRajendra Nayak
Add the power domains exposed by RPMH in the Qualcomm Technologies Inc sc7280 platform Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1614664092-9394-2-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11dt-bindings: power: rpmpd: Add sc7280 to rpmpd bindingRajendra Nayak
Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm Technologies Inc sc7280 platform. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1614664092-9394-1-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11soc: qcom: rpmhpd: Add SM8350 power domainsVinod Koul
This adds the power domains found in SM8350 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210210104257.339462-2-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11dt-bindings: power: Add rpm power domain bindings for SM8350Vinod Koul
Add RPM power domain bindings for the SM8350 SoC Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210210104257.339462-1-vkoul@kernel.org [bjorn: Added dt-bindings include file changes from the driver patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-10PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driverTony Lindgren
After updating pci-dra7xx driver to probe with ti-sysc and genpd, I noticed that dra7xx_pcie_probe() would not run if a power-domains property was configured for the interconnect target module. Turns out that module_platform_driver_probe uses platform_driver_probe(), while builtin_platform_driver uses platform_driver_register(). Only platform_driver_register() works for deferred probe as noted in the comments for __platform_driver_probe() in drivers/base/platform.c with a line saying "Note that this is incompatible with deferred probing". With module_platform_driver_probe, we have platform_driver_probe() produce -ENODEV error at device_initcall() level, and no further attempts are done. Let's fix this by using module_platform_driver instead. Note this is not an issue currently as we probe devices with simple-bus, and only is needed as we start probing the device with ti-sysc, or when probed with simple-pm-bus. Note that we must now also remove __init for probe related functions to avoid a section mismatch warning. Cc: linux-pci@vger.kernel.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10clk: ti: omap5: Add missing gpmc and ocmc clkctrlTony Lindgren
The gpmc clock is needed to update omap5 to boot with genpd with the related devicetree patches. The ocmc clock is currently not used but let's add it so we have all the clocks for the l3main2 defined. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10soc: ti: omap-prm: Allow hardware supported retention when idleTony Lindgren
When moving the l4 interconnect instances to probe with simple-pm-bus and genpd, we will have l4per and core domains stop idling unless we configure the domain bits to allow retention when idle. As the TI SoCs have hardware autoidle capabilities, this is safe to do. The domains will only enter retention on WFI when none of the devices on the domain block autoidle in the hardware. This follows what we are already currently doing. Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Init both prm and prcm nodes early for clocksTony Lindgren
We need to probe both prm and prcm nodes early for clocks as they are needed by system timers. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10bus: ti-sysc: Check for old incomplete dtbTony Lindgren
Let's be nice and show an error on the SoCs about old imcomplete devicetree if the dtb is still using "simple-bus" instead of "simple-pm-bus" for the root OCP node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Detect more modules for debuggingTony Lindgren
We want to see what the interconnect target module names are for debugging. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices firstTony Lindgren
We want to probe l4_wkup and l4_cfg interconnect devices first to avoid issues with missing resources. Otherwise we attempt to probe l4_per devices first causing pointless deferred probe and also annoyingh renumbering of the MMC devices for example. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Fix initializing module_pa for modules without sysc registerTony Lindgren
We have interconnect target modules with no known registers using only clocks and resets, but we still want to detect them based on the module IO range. So let's call sysc_parse_and_check_child_range() earlier so we have module_pa properly initialized. Fixes: 2928135c93f8 ("bus: ti-sysc: Support modules without control registers") Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08Merge branch 'fixes-rc2' into fixesTony Lindgren
2021-03-08ARM: dts: Fix moving mmc devices with aliases for omap4 & 5Tony Lindgren
Fix moving mmc devices with dts aliases as discussed on the lists. Without this we now have internal eMMC mmc1 show up as mmc2 compared to the earlier order of devices. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable raceTony Lindgren
We have a duplicate legacy clock defined for sha2md5_fck that can sometimes race with clk_disable() with the dts configured clock for OMAP4_SHA2MD5_CLKCTRL when unused clocks are disabled during boot causing an "Unhandled fault: imprecise external abort". Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08soc: renesas: rmobile-sysc: Mark fwnode when PM domain is addedGeert Uytterhoeven
Currently, there are two drivers binding to the R-Mobile System Controller (SYSC): - The rmobile-sysc driver registers PM domains from a core_initcall(), and does not use a platform driver, - The optional rmobile-reset driver registers a reset handler, and does use a platform driver. As fw_devlink only considers devices, commit bab2d712eeaf9d60 ("PM: domains: Mark fwnodes when their powerdomain is added/removed") works only for PM Domain drivers where the DT node is a real device node, and not for PM Domain drivers using a hierarchical representation inside a subnode. Hence if fw_devlink is enabled, probing of on-chip devices that are part of the SYSC PM domain is deferred until the optional rmobile-reset driver has been bound. If the rmobile-reset driver is not available, this will never happen, and thus lead to complete system boot failures. Fix this by explicitly marking the fwnode initialized. Suggested-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20210216123958.3180014-1-geert+renesas@glider.be
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