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The comment introduced with the recently added pinctrl_gpio_range.pins
element was wrong. This corrects it.
Thanks to Patrice Chotard for pointing this out.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This updates the GPIO range documentation with the API changes
for sparse/random/arbitrary pin-to-GPIO mappings.
Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The stubs for the !PINCTRL case were placed in the wrong
part of the file, causing breakage in linux-next when compiling
SH without pinctrl. Fix it up by moving the stubs to the right
place.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Traditionally, GPIO ranges are based on consecutive ranges of both GPIO
and pin numbers. This patch allows for GPIO ranges with arbitrary lists
of pin numbers.
Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The MCSPI controller has a built-in FIFO buffer to unload the DMA or interrupt
handler and improve data throughput. This patch adds FIFO buffer support for SPI
transfers in DMA mode.
For SPI transfers in DMA mode, the largest possible FIFO buffer size will be
calculated and set up. The FIFO won't be used for the SPI transfers in DMA mode
if: calculated FIFO buffer size is less then 2 bytes or the FIFO buffer size
isn't multiple of the SPI word length.
Signed-off-by: Illia Smyrnov <illia.smyrnov@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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devel-stable
This includes the following series sent earlier to the list:
- nommu-fixes
- R7 Support
- MPU support
I've left out the ARCH_MULTIPLATFORM/!MMU stuff that Arnd and I were
discussing today until we've reached a conclusion/that's had some more
review.
This is rebased (and re-tested) on your devel-stable branch because
otherwise there were going to be conflicts with Uwe's V7M work now that
you've merged that. I've included the fix for limiting MPU to CPU_V7.
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The handle_epsw() function calculated the first register in the wrong way,
so that it always used r0 by mistake. Now the code uses the common helper
function for decoding the registers of rre functions instead to avoid such
mistakes.
Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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This patch is based on an original patch of David Hildenbrand.
The perf core implementation calls architecture specific code in order
to ask for specific information for a particular sample:
perf_instruction_pointer()
When perf core code asks for the instruction pointer, architecture
specific code must detect if a KVM guest was running when the sample
was taken. A sample can be associated with a KVM guest when the PSW
supervisor state bit is set and the PSW instruction pointer part
contains the address of 'sie_exit'.
A KVM guest's instruction pointer information is then retrieved via
gpsw entry pointed to by the sie control-block.
perf_misc_flags()
perf code code calls this function in order to associate the kernel
vs. user state infomation with a particular sample. Architecture
specific code must also first detectif a KVM guest was running
at the time the sample was taken.
Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Lets use the common waitqueue for kvm cpus on s390. By itself it is
just a cleanup, but it should also improve the accuracy of diag 0x44
which is implemented via kvm_vcpu_on_spin. kvm_vcpu_on_spin has
an explicit check for waiting on the waitqueue to optimize the
yielding.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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cleanup of arch specific code to use common code provided vcpu slab cache
instead of kzalloc() provided memory
Signed-off-by: Michael Mueller <mimu@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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This patch enables kvm to give large pages to the guest. The heavy
lifting is done by the hardware, the host only has to take care
of the PFMF instruction, which is also part of EDAT-1.
We also support the non-quiescing key setting facility if the host
supports it, to behave similar to the interpretation of sske.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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From time to time we need to set the guest storage key. Lets
provide a helper function that handles the changes with all the
right locking and checking.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Now that there is a way to tell the powerdomain core about
missing voltage domain auto-scaling control in SoCs', get rid of the dummy
voltage domain data populated for AM33xx devices.
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Afzal Mohammed <afzal@ti.com> # am335x evm
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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to a pwrdm
The powerdomain framework currently expects all powerdomains to be associated with
a corresponding voltagedomain. For some SoCs' (like the already existing AM33xx
family, or for the upcoming AM437x and DRA7 SoCs') which
do not have a Voltage controller/Voltage Processor (neither the SR I2C
bus to communicate with the PMIC) there is no need for a Powerdomain to have
a voltage domain association since there is no auto-scaling of voltages possible
using the voltage FSM.
Extend the arch operations to add an api which the powerdomain core can
then use to identify if a voltdm lookup and association for a powerdomain
is really needed.
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Afzal Mohammed <afzal@ti.com> # am335x evm
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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The support for the MPU is currently implemented only for R-class
(PMSAv7/R). Since the merge of V7M support in to the kernel it is possible
to select MPU support on V7M.
This patch ensures that until MPU support for M-class processors is
implemented, the MPU can only be selected with R-class CPUs
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Without an MMU it is possible for userspace programs to start executing code
in places that they have no business executing. The MPU allows some level of
protection against this.
This patch protects the vectors page from access by userspace processes.
Userspace tasks that dereference a null pointer are already protected by an
svc at 0x0 that kills them. However when tasks use an offset from a null
pointer (eg a function in a null struct) they miss this carefully placed svc
and enter the exception vectors in user mode, ending up in the kernel.
This patch causes programs that do this to receive a SEGV instead of happily
entering the kernel in user-mode, and hence avoid a 'Bad Mode' panic.
As part of this change it is necessary to make sigreturn happen via the
stack when there is not an sa_restorer function. This change is invisible to
userspace, and irrelevant to code compiled using a uClibc toolchain, which
always uses an sa_restorer function.
Because we don't get to remap the vectors in !MMU kuser_helpers are not
in a defined location, and hence aren't usable. This means we don't need to
worry about keeping them accessible from PL0
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC: Nicolas Pitre <nico@linaro.org>
CC: Catalin Marinas <catalin.marinas@arm.com>
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Allows the user to select MPU support when compiling for ARM processors
that support the PMSAv7.
This ensures that CONFIG_SMP depends on the MPU in the case that no MMU
is present.
CONFIG_SMP_ON_UP is not implemented for nommu, so introduce an MMU
dependency there.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
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This patch removed several unused variables.
Signed-off-by: Jon Ernst <jonernst07@gmx.com>
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
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Add the f2fs_remount function call which will be used
during the filesystem remounting. This function
will help us to change the mount options specific to
f2fs.
Also modify the f2fs background_gc mount option, which
will allow the user to dynamically trun on/off the
garbage collection in f2fs based on the background_gc
value. If background_gc=on, Garbage collection will
be turned off & if background_gc=off, Garbage collection
will be truned on.
By default the garbage collection is on in f2fs.
Change Log:
v2: Incorporated the review comments by Gu Zheng.
Removing the restore part for VFS flags
Updating comments with proper flag conditions
Display GC background option as ON/OFF
Revised conditions to stop GC in case of remount
v1: Initial changes for adding remount_fs callback
support.
Cc: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Namjae Jeon <namjae.jeon@samsung.com>
Signed-off-by: Pankaj Kumar <pankaj.km@samsung.com>
Reviewed-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
[Jaegeuk Kim: change /** with /* for the coding style]
Signed-off-by: Jaegeuk Kim <jaegeuk.kim@samsung.com>
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This switches the code using a local remapping of the
system controller to enable the U300 board to be
self-powered over to making the U300-specific syscon
compatible with the MFD generic syscon driver, selecting
the generic syscon driver, and augmenting the board
power code to pick the regmap and manipulate the syscon
from the regmap side of things.
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Enable MMC_UNSAFE_RESUME to be accomplish a proper suspend/resume cycle
for SD/SDIO/(e)MMC.
ARMMMCI host driver supports clock gating through runtime PM, thus
MMC_CLKGATE is not needed. Moreover ARMMMCI can do scatter-gather which
means we can explicity disable MMC_BLOCK_BOUNCE, since it's default
enabled, to skip unnecessary bounce buffer copying.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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In the past we controlled the selection of DMA for a certain
host by a boolean switch in the platform data. Currently
there is no way to enable DMA on a PL022 probed from the
device tree. Let's default to trying to obtain DMA channels
in the DT case, and then we can always fail (and thus fall
back to PIO mode).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This deletes the dependency on any platform data for
the COH901 pin controller. There is only one user in the
kernel, and if we at some point want to support more
variants, they shall provide their variant info through
the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This converts the last of the U300 clocks to being probed from
the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This moves the slow, fast, AHB bridge and "rest" clocks on
the U300 system controller over to registration from the
device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We have used the default clock associated with the block
for a long time, only heuristics in the clock system has
made this work anyway. This needs to be done away with as
we start probing this driver and its clocks exclusively
from the device tree.
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This converts the fixed and fixed-factor clocks in the U300
platform to register themselves from the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that the core file is the only one actually using any
of the base addresses, we can delete that header and move
the base address definitions into the one and only core
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds a device tree node for the U300 system controller
and remaps this dynamically instead of using hard-coded
virtual addresses. The board power set-up code is altered
to fetch a reference to the syscon using ampersand <&syscon>
notation. This way of passing a pointer to the syscon will
also be used by the clocks.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Removing some boilerplate by using module_spi_driver instead of calling
register and unregister in the otherwise empty init/exit functions.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Two files remain in <mach/*> for U300: timex.h and
uncompress.h. The former is done away with by using
defaults, the latter is unused in multiplatform.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that we removed our dependency on <mach/*> the U300
can be converted to mutliplatform. Remove the invalid restriction
that U300 would not support AUTO_ZRELADDR (it does) and update
the defconfig in the process.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This register base file is now only used in the machine
itself so move it down into mach-u300.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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All IRQs are now obtained from the device tree, and this file
is unused, so delete it.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This file is now unused and can be deleted.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Get rid of the <mach/syscon.h> header as a prerequisite for
multiplatform support. Do this by pushing the registers down
to their respective drivers and deleting the unused remainder.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This rids the dependency to <mach/hardware.h> (which is an
implicit dependency to <mach/u300-regs.h>) from the U300
debug macro. Take this opportunity to update the file
header.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This moves the U300 debug macro to the debug headers to
make way for multiplatform support.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We have now transferred all the U300 peripherals to the device
tree, so we just select USE_OF, and delete all static board data,
then require that this platform shall be booted using the device
tree and nothing else.
This gets rid of the MMCI (PL180), PL022, and serial PL011
platform data entries and more.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This registers the U300 FSMC flash controller from the
device tree, and defines the three partitions. Skip the
BBT scan as in the current platform data.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the COH 901 318 DMA controller to the U300
device tree. All devices now converted to device tree
so far will start to find their DMA channels.
Note that the U300 is not yet using the device tree
to obtain DMA channels, but this is a first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds DMA channel assignments to the MMC/SD-controller
and the two UARTs already in the U300 device tree, as we
have now defined a way to obtain DMA channels from the
device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for probing the COH 901 318 DMA controller
and channels from the device tree.
Contains portions of a sketch patch from Arnd Bergmann.
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for the U300 MMC/SD card slot from the device
tree boot. No other changes needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that we have enabled board power and the AB3100 regulators,
put the regulator data into the device tree and enable it so
we can start to tie regulators to devices. To begin with we're
only supplying the power to the board itself.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for setting up the board power from the
device tree on the U300. We use a board-specific node in the
device tree for the S365 board and bind a regulator for the
board power to this node.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the COH 901 331 RTC to the U300 device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This add devicetree probe support to the COH 901 331 RTC
driver.
Cc: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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