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2022-09-28rust: import upstream `alloc` crateMiguel Ojeda
This is a subset of the Rust standard library `alloc` crate, version 1.62.0, licensed under "Apache-2.0 OR MIT", from: https://github.com/rust-lang/rust/tree/1.62.0/library/alloc/src The files are copied as-is, with no modifications whatsoever (not even adding the SPDX identifiers). For copyright details, please see: https://github.com/rust-lang/rust/blob/1.62.0/COPYRIGHT The next patch modifies these files as needed for use within the kernel. This patch split allows reviewers to double-check the import and to clearly see the differences introduced. Vendoring `alloc`, at least for the moment, allows us to have fallible allocations support (i.e. the `try_*` versions of methods which return a `Result` instead of panicking) early on. It also gives a bit more freedom to experiment with new interfaces and to iterate quickly. Eventually, the goal is to have everything the kernel needs in upstream `alloc` and drop it from the kernel tree. For a summary of work on `alloc` happening upstream, please see: https://github.com/Rust-for-Linux/linux/issues/408 The following script may be used to verify the contents: for path in $(cd rust/alloc/ && find . -type f -name '*.rs'); do curl --silent --show-error --location \ https://github.com/rust-lang/rust/raw/1.62.0/library/alloc/src/$path \ | diff --unified rust/alloc/$path - && echo $path: OK done Reviewed-by: Kees Cook <keescook@chromium.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28rust: add C helpersMiguel Ojeda
Introduces the source file that will contain forwarders to C macros and inlined functions. Initially this only contains a single helper, but will gain more as more functionality is added to the `kernel` crate in the future. Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Geoffrey Thomas <geofft@ldpreload.com> Signed-off-by: Geoffrey Thomas <geofft@ldpreload.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Sven Van Asbroeck <thesven73@gmail.com> Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Co-developed-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: increase maximum kernel symbol length to 512Miguel Ojeda
Rust symbols can become quite long due to namespacing introduced by modules, types, traits, generics, etc. For instance, the following code: pub mod my_module { pub struct MyType; pub struct MyGenericType<T>(T); pub trait MyTrait { fn my_method() -> u32; } impl MyTrait for MyGenericType<MyType> { fn my_method() -> u32 { 42 } } } generates a symbol of length 96 when using the upcoming v0 mangling scheme: _RNvXNtCshGpAVYOtgW1_7example9my_moduleINtB2_13MyGenericTypeNtB2_6MyTypeENtB2_7MyTrait9my_method At the moment, Rust symbols may reach up to 300 in length. Setting 512 as the maximum seems like a reasonable choice to keep some headroom. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Petr Mladek <pmladek@suse.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: support "big" kernel symbolsMiguel Ojeda
Rust symbols can become quite long due to namespacing introduced by modules, types, traits, generics, etc. Increasing to 255 is not enough in some cases, therefore introduce longer lengths to the symbol table. In order to avoid increasing all lengths to 2 bytes (since most of them are small, including many Rust ones), use ULEB128 to keep smaller symbols in 1 byte, with the rest in 2 bytes. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: add static relationship between `KSYM_NAME_LEN{,_BUFFER}`Miguel Ojeda
This adds a static assert to ensure `KSYM_NAME_LEN_BUFFER` gets updated when `KSYM_NAME_LEN` changes. The relationship used is one that keeps the new size (512+1) close to the original buffer size (500). Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: avoid hardcoding buffer sizeBoqun Feng
This introduces `KSYM_NAME_LEN_BUFFER` in place of the previously hardcoded size of the input buffer. It will also make it easier to update the size in a single place in a later patch. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: use `ARRAY_SIZE` instead of hardcoded sizeBoqun Feng
This removes one place where the `500` constant is hardcoded. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Geert Stappers <stappers@stappers.nl> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28wifi: rtw89: 8852b: configure DLE memPing-Ke Shih
Configure DLE (data link engine) memory size for operating modes. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-10-pkshih@realtek.com
2022-09-28wifi: rtw89: check DLE FIFO size with reserved sizePing-Ke Shih
For SCC mode, some FIFO are reserved, so compare the quantity after minus the reserved size. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-9-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: correct register of report IMRPing-Ke Shih
The register of report IMR is chip specific, so add a field to strut to correct them. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-8-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: set power cut closed for 8852bePing-Ke Shih
Entering LPS with PCIe APHY power cut closed would cause PCIe link issue. To avoid the combinational issue, keep PCIe APHY power cut always on. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-7-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: add to do PCI auto calibrationPing-Ke Shih
8852be needs this with n times calibration to correct hardware clock. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-6-pkshih@realtek.com
2022-09-28wifi: rtw89: 8852b: implement chip_ops::{enable,disable}_bb_rfPing-Ke Shih
Implement to power on/off BB and RF via MAC registers. Add return type of chip_ops::disable_bb_rf, because it could fail to disable. Also, correct naming of register 0x0200 used by the ops as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-5-pkshih@realtek.com
2022-09-28wifi: rtw89: add DMA busy checking bits to chip infoPing-Ke Shih
8852B has less DMA channels, so its checking bits are different from other chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-4-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: define DMA channel mask to avoid unsupported channelsPing-Ke Shih
Six channels are unsupported by 8852b, so mask them out to prevent to access undefined registers in this chip. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-3-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: mask out unsupported TX channelsPing-Ke Shih
8852BE doesn't support some TX channels, so mask them out, or it access undefined registers. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-2-pkshih@realtek.com
2022-09-28iwlegacy: Replace zero-length arrays with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/223 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIvzc0jsYLigO8a@work
2022-09-28ipw2x00: Replace zero-length array with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/220 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIeULWc17XSIglv@work
2022-09-28wifi: iwlwifi: Track scan_cmd allocation size explicitlyKees Cook
In preparation for reducing the use of ksize(), explicitly track the size of scan_cmd allocations. This also allows for noticing if the scan size changes unexpectedly. Note that using ksize() was already incorrect here, in the sense that ksize() would not match the actual allocation size, which would trigger future run-time allocation bounds checking. (In other words, memset() may know how large scan_cmd was allocated for, but ksize() will return the upper bounds of the actually allocated memory, causing a run-time warning about an overflow.) Cc: Gregory Greenman <gregory.greenman@intel.com> Cc: Kalle Valo <kvalo@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Luca Coelho <luciano.coelho@intel.com> Cc: Johannes Berg <johannes.berg@intel.com> Cc: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Cc: Miri Korenblit <miriam.rachel.korenblit@intel.com> Cc: Ilan Peer <ilan.peer@intel.com> Cc: linux-wireless@vger.kernel.org Cc: netdev@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220923220853.3302056-1-keescook@chromium.org
2022-09-28Merge tag 'amd-drm-next-6.1-2022-09-23' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.1-2022-09-23: amdgpu: - SDMA fix - Add new firmware types to debugfs/IOCTL version queries - Misc spelling and grammar fixes - Misc code cleanups - DCN 3.2.x fixes - DCN 3.1.x fixes - CS cleanup - Gang submit support - Clang fixes - Non-DC audio fix - GPUVM locking fixes - Vega10 PWN fan speed fix amdkgd: - MQD manager cleanup - Misc spelling and grammar fixes UAPI: - Add new firmware types to the FW version query IOCTL Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220923215729.6061-1-alexander.deucher@amd.com
2022-09-28Merge tag 'drm-misc-next-2022-09-23' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.1: UAPI Changes: Cross-subsystem Changes: - dma-buf: Improve signaling when debugging Core Changes: - Backlight handling improvements - format-helper: Add drm_fb_build_fourcc_list() - fourcc: Kunit tests improvements - modes: Add DRM_MODE_INIT() macro - plane: Remove drm_plane_init(), Allocate planes with drm_universal_plane_alloc() - plane-helper: Add drm_plane_helper_atomic_check() - probe-helper: Add drm_connector_helper_get_modes_fixed() and drm_crtc_helper_mode_valid_fixed() - tests: Conversion to parametrized tests, test name consistency Driver Changes: - amdgpu: Fix for a VRAM eviction issue - ast: Resolution handling improvements - mediatek: small code improvements for DP - omap: Refcounting fix, small improvements - rockchip: RK3568 support, Gamma support for RK3399 - sun4i: Build failure fix when !OF - udl: Multiple fixes here and there - vc4: HDMI hotplug handling improvements - vkms: Warning fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20220923073943.d43tne5hni3iknlv@houat
2022-09-27dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typosAndrew Halaney
pipegmux and SuperSpeed are the proper spelling for those terms. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921153155.279182-1-ahalaney@redhat.com
2022-09-27clk: qcom: Add global clock controller driver for SM6375Konrad Dybcio
Add support for the global clock controller found on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-3-konrad.dybcio@somainline.org
2022-09-27dt-bindings: clock: add SM6375 QCOM global clock bindingsKonrad Dybcio
Add device tree bindings for global clock controller for SM6375 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-2-konrad.dybcio@somainline.org
2022-09-27clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bitKonrad Dybcio
This is used on at least SM6375 and its variations. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-1-konrad.dybcio@somainline.org
2022-09-28ARM: config: aspeed_g5: Enable PECIJoel Stanley
Intel systems use PECI, so provide build coverage for the driver stack. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Remove appended DTB and ATAGJoel Stanley
These machines boot using FIT and have done so since support was merged, so neither option is used. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed: Refresh defconfigsJoel Stanley
Remove the unused CONFIG_BLK_DEV_BSG option. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: config: aspeed: Enable namespacesJoel Stanley
Used by OpenBMC due to systemd. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Enable IPV6 optionsJoel Stanley
Match the aspeed_g5 defconfig and what is used in OpenBMC. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Enable OCC and NBD driversJoel Stanley
These are used by OpenBMC machines such as palmetto. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Enable MCTP stackJoel Stanley
Enable the MCTP core along with the serial and i2c drivers. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add PL2303 USB serial driverJoel Stanley
Used by P10 machines. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add TPM TIS I2C driverJoel Stanley
It is used by the rainier and other p10bmc machines. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add mp5023 driverJoel Stanley
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed: Add support for USB flash drivesAdriana Kobylak
Add support to detect USB flash drives and create the /dev/sd* devices. Also add support for vfat to support USB drives formatted as FAT32. This support will be used to enable firmware updates via USB flash drives where the firmware image is stored in the USB drive and it's plugged into the BMC USB port. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Tested-by: Adriana Kobylak <anoo@us.ibm.com> Link: https://lore.kernel.org/r/20211112202931.2379145-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600-evb-a1: Add compatibleJoel Stanley
The AST2600 EVB A1 is an AST2600 EVB. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600evb: Fix compatible stringJoel Stanley
The AST2600 EVB is not an A1. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600-evb: Enable Quad SPI RX tranfersCédric Le Goater
Now that the pinctrl definitions of the ast2600 SoC have been fixed, see commit 925fbe1f7eb6 ("dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group"), it is safe to activate QSPI on the ast2600 evb. Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220603073705.1624351-1-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed-g6: Enable more UART controllersKen Chen
Setup the configuration of UART6, UART7, UART8, and UART9 in aspeed-g6.dtsi. Signed-off-by: Ken Chen <j220584470k@gmail.com> Link: https://lore.kernel.org/r/20220805090957.470434-1-j220584470k@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: yosemitev2: Disable the EEPROM driverKarthikeyan Pasupathi
Removed NIC EEPROM driver IPMB-12 channel and enabled it as generic i2c EEPROM. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Link: https://lore.kernel.org/r/20220914115307.GA339@hcl-ThinkPad-T495 Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Add AMD DaytonaX BMCKonstantin Aladyshev
Add initial version of device tree for the BMC in the AMD DaytonaX platform. AMD DaytonaX platform is a customer reference board (CRB) with an Aspeed ast2500 BMC manufactured by AMD. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220921210950.10568-3-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28dt-bindings: arm: aspeed: document AMD DaytonaXKonstantin Aladyshev
Document AMD DaytonaX board compatible. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220921210950.10568-2-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Yosemite V2: Enable OCP debug cardKarthikeyan Pasupathi
Added IPMB-13 channel for Debug Card communication which improves the readability of the machine and makes it easier to debug the server and it will display some pieces of information about the server like "system info", "Critical sensors" and "critical sel". Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220926124313.GA8400@hcl-ThinkPad-T495 Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: mtjade: Remove gpio-keys entriesQuan Nguyen
Remove the gpio-keys entries from the Ampere's Mt. Jade BMC device tree. The user space applications are going to change from using libevdev to libgpiod. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Link: https://lore.kernel.org/r/20220915080828.2894070-1-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Add device tree for Ampere's Mt. Mitchell BMCQuan Nguyen
The Mt. Mitchell BMC is an ASPEED AST2600-based BMC for the Mt. Mitchell hardware reference platform with AmpereOne(TM) processor. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Phong Vo <phong@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220817071539.176110-3-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28dt-bindings: arm: aspeed: document Ampere Mt.Mitchell BMC compatiblesQuan Nguyen
Document Ampere Mt.Mitchell BMC board compatible. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817071539.176110-2-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-27clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscsRajendra Nayak
The USB controllers on sc7280 do not retain the state when the system goes into low power state and the GDSCs are turned off. This results in the controllers reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSCs so they only transition to retention state in low power. Since sc7280 only supports cx (parent of usb gdscs) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-3-quic_rjendra@quicinc.com
2022-09-27clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdscRajendra Nayak
The USB controller on sc7180 does not retain the state when the system goes into low power state and the GDSC is turned off. This results in the controller reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSC so it only transitions to retention state in low power. Since sc7180 only supports cx (parent of usb gdsc) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-2-quic_rjendra@quicinc.com
2022-09-27clk: qcom: gdsc: Fix the handling of PWRSTS_RET supportRajendra Nayak
GDSCs cannot be transitioned into a Retention state in SW. When either the RETAIN_MEM bit, or both the RETAIN_MEM and RETAIN_PERIPH bits are set, and the GDSC is left ON, the HW takes care of retaining the memory/logic for the domain when the parent domain transitions to power collapse/power off state. On some platforms where the parent domains lowest power state itself is Retention, just leaving the GDSC in ON (without any RETAIN_MEM/RETAIN_PERIPH bits being set) will also transition it to Retention. The existing logic handling the PWRSTS_RET seems to set the RETAIN_MEM/RETAIN_PERIPH bits if the cxcs offsets are specified but then explicitly turns the GDSC OFF as part of _gdsc_disable(). Fix that by leaving the GDSC in ON state. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920111517.10407-1-quic_rjendra@quicinc.com
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