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Add "#pwm-cells" property to "pwm@e6e31000" device node.
This silences the following DTC compiler warning:
Warning (pwms_property): Missing property '#pwm-cells' in node
/soc/pwm@e6e31000 or bad phandle (referred from /backlight:pwms[0])
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add "#phy-cells" property to "usb-phy@e65ee000" device node.
This silences the following DTC compiler warning:
Warning (phys_property): Missing property '#phy-cells' in node
/soc/usb-phy@e65ee000 or bad phandle (referred from
/soc/usb@ee020000:phys[0])
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Remove "reg" property from cache-controller-0 device node as it does not
have any unit address.
This silences the following DTC compiler warning:
Warning (unit_address_vs_reg): Node /cpus/cache-controller-0 has a reg
or ranges property, but no unit name
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add "#address-cells" and "#size-cells" properties to all place-holder nodes
that have children nodes defined by salvator-x[s].dtsi device tree.
This silences the following DTC compiler warnings:
Warning (reg_format): "reg" property in /soc/.. has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /soc/...
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /soc/...
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add "reg" properties to place-holder nodes with unit address defined for
R-Car M3-N SoC.
This silences the following DTC compiler warning:
Warning (unit_address_vs_reg): Node /soc/... has a unit name,
but no reg property
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add GPIO nodes to r8a77965 SoC device tree file.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add SCIF[0-5] device nodes for M3-N (r8a77965) SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add basic support for R-Car Salvator-X M3-N (R8A77965) board.
Based on original work from:
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Basic support for the Gen 3 R-Car M3-N SoC.
Based on original work from:
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add configuration option for the R-Car M3-N (R8A77965) SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Describe frequencies, other than the default for CA53 cores. This is a
pre-requisite for using providing alternative frequencies for use with
CPUFreq with these cores.
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Describe frequencies, other than the default for CA53 cores. This is a
pre-requisite for using providing alternative frequencies for use with
CPUFreq with these cores.
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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sdhci for rk3399-sapphire works for eMMC but keep-power-in-suspend
is an optional property for SDIO.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Now that we have added support for pre-pended Broadcom tags with commit
11606039604c ("net: dsa: b53: Support prepended Broadcom tags") we can
switch all the Northstar Plus reference boards to use port 8 for the CPU
port. This allows us to prepare room for supporting the Flow Accelerator
2 NAPT offload, and frees up port 5 to be made fully configurable for
the modes that it supports: internal, SGMII, RGMII etc.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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It's currently marked disabled, as it's not useful without a panel
associated with it and the GPIO pins routed to ALT2.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
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"debounce-inteval" was never supported.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Add emif node for keystone2 devices, which is used for ECC support.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
[t-kristo@ti.com: made emif enabled by default for all keystone2 devices]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a watchdog node for keystone-k2g, with the corresponding clock and
power domain handles.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
Pull "AT91 DT for 4.17" from Alexandre Belloni:
Not much this cycle, mainly changes on the Axentia boards from Peter and
a cleanup from Bartosz:
- use 'atmel' as at24 manufacturer
- device addition and fixes for axentia boards
- fix sama5d4 pinctrl compatible
* tag 'at91-ab-4.17-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: use 'atmel' as at24 manufacturer for at91sam9263ek
ARM: dts: at91: use 'atmel' as at24 manufacturer for at91-sama5d2_ptc_ek
ARM: dts: at91: use 'atmel' as at24 manufacturer for at91sam9g20ek
ARM: dts: at91: use 'atmel' as at24 manufacturer for at91sam9260ek
ARM: dts: at91: use 'atmel' as at24 manufacturer for sama5d34ek
ARM: dts: at91: sama5d4: fix pinctrl compatible string
ARM: dts: at91: tse850: make the sound dai cell count explicit
ARM: dts: at91: nattis: add lvds-encoder
ARM: dts: at91: nattis: use up-to-date mtd partitions
ARM: dts: at91: tse850: use the correct compatible for the eeprom
ARM: dts: at91: nattis: use the correct compatible for the eeprom
ARM: dts: at91: sam9rl: Properly assign copyright
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next/dt
Pull "mvebu dt64 for 4.17 (part 1)" from Gregory CLEMENT:
- convert to the SPDX-License-Identifier
- add missing clocks (for the registers) on some of the peripherals
- use the new nand driver
- add more uart for Armada 7K/8K SoCs
* tag 'mvebu-dt64-4.17-1' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: armada-cp110: Add apb_pclk clock for the uart nodes
arm64: dts: marvell: use reworked NAND controller driver on Armada 8K
arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
ARM64: dts: marvell: armada-cp110: Add registers clock for sata node
arm64: dts: marvell: armada-8080-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-8040-mcbin: use SPDX-License-Identifier
arm64: dts: marvell: armada-8040-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-7040-db: use SPDX-License-Identifier
arm64: dts: marvell: armada-3720-espressobin: use SPDX-License-Identifier
arm64: dts: marvell: armada-3720-db: use SPDX-License-Identifier
arm64: dts: marvell: use SPDX-License-Identifier for Armada SoCs
arm64: dts: marvell: mcbin: fix board name typo
arm64: dts: marvell: mcbin: enable uart headers
arm64: dts: marvell: add CP110 uart peripherals
ARM64: dts: marvell: armada-cp110: Add registers clock for I2C nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes
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Pull "mvebu dt for 4.17 (part 1)" from Gregory CLEMENT:
Most of them are small fixes or cleanup.
Only the change on the clearfog will have a noticeable effect allowing
to use the i2c at an higher frequency.
* tag 'mvebu-dt-4.17-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada388-clearfog: increase speed of i2c0 to 400kHz
arm: dts: kirkwood: fix error in #sound-dai-cells size
ARM: dts: kirkwood: Fix "debounce-interval" property misspelling
ARM: dts: armada: netgear-rn*: fix rtc node name
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into next/dt
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.17" from Wei Xu:
- Add XGE CPLD control support for hip07 SoC
- Disable the SMMU on hip06 and hip07 SoCs becuase of
the hardware limitation
- Enable HS200 mode for the MMC controller on hi6220 hikey board
- Remove "cooling-{min|max}-level" this kind unused properties
for hi6220 SoC
- Add watchdog node for hi6220 SoC
- Remove "CPU_NAP" idle state on hikey960 board since it is
not stable and useless with the updated firmware
* tag 'hisi-arm64-dt-for-4.17' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Hi3660: Remove 'CPU_NAP' idle state
arm64: dts: hi6220: enable watchdog
ARM64: dts: hi6220: Remove "cooling-{min|max}-level" for CPU nodes
arm64: dts: hikey: Enable HS200 mode on eMMC
arm64: dts: hisi: Disable hisilicon smmu node on hip06/hip07
arm64: dts: hisi: add hns-dsaf cpld control for the hip07 SoC
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next/dt
Pull "arm: Xilinx(Zynq and ZynqMP) DT changes for v4.17" from Michal Simek:
- Use SPDX license identifier
- Add Xilinx ZynqMP boards
zcu100-revC, zcu102-revA/revB/rev1.0, zcu104-revA, zcu106-revA,
zcu111-revA, zc1751 dc1/dc2/dc3/dc4
- Add Xilinx Zynq boards
cc108, zc770 dc1/dc2/dc3/dc4
- Add Digilent Zybo Z7
- Minor fixes in current DTSes
* tag 'xilinx-dt-for-4.17' of https://github.com/Xilinx/linux-xlnx: (22 commits)
arm: dts: zynq: Add Digilent Zybo Z7 board
arm: zynq: Add support for Xilinx zc770 xm013 dc4 board
arm: zynq: Add support for Xilinx zc770 xm012 dc3 board
arm: zynq: Add support for Xilinx zc770 xm011 dc2 board
arm: zynq: Add support for Xilinx zc770 xm010 dc1 board
arm: zynq: Add Xilinx cc108 board
arm: zynq: Add missing address node name in microzed board
arm: dts: zynq: Use SPDX-License-Identifier
arm: zynq: Use i2c-mux instead of i2cswitch for pca9548
arm64: zynqmp: Add support for Xilinx zc1751
arm64: zynqmp: Add support for Xilinx zc12XX boards
arm64: zynqmp: Add support for Xilinx zcu111-revA
arm64: zynqmp: Add support for Xilinx zcu106-revA
arm64: zynqmp: Add support for Xilinx zcu104-revA
arm64: zynqmp: Add support for Xilinx zcu102
arm64: zynqmp: Add support for Xilinx zcu100-revC
dt-bindings: xilinx: Add description for ZynqMP
arm64: zynqmp: Add 8-bit bus width property for ep108
arm64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts
arm64: zynqmp: Add SPDX license identifier
...
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Fix that USB initialization fails as below runtime log is present during
booting on bananapi-r2 board by adding missing regulators the USB device
requires. Current regulators USB device uses are being updated with the
correct ones to reflect real configurations which are all from fixed
regulators rather than MT6323 one's output.
xhci-mtk 1a1c0000.usb: 1a1c0000.usb supply vbus not found, using dummy regulator
xhci-mtk 1a240000.usb: 1a240000.usb supply vbus not found, using dummy regulator
Cc: stable@vger.kernel.org
Fixes: f4ff257cd160 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
[mb: update kernel log in commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The ACLK_VIO is a parent clock used by a several children,
its suggested clock rate is 400MHz. Right now it gets 400MHz
because it sources from CPLL(800M) and divides by 2 after reset.
It's good not to rely on default values like this, so let's
explicitly set it.
NOTE: it's expected that at least one board may override cru node and
set the CPLL to 1.6 GHz. On that board it will be very important to be
explicit about aclk-vio being 400 MHz.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Update binding document for more mt7623[A,N] reference boards being
supported.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The A23/A33 reference tablet design has a DC barrel tied to the ACIN
of the PMIC. And being a tablet, it has a Li-Po battery.
Enable both power supplies in the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The A33-OLinuXino routes the SoC's headphone output to a headphone jack,
and the microphone input to a microphone jack. Power to the microphone
is provided by MBIAS.
This patch enables the various parts of the codec, and adds widgets and
routes for simple-card.
HBIAS is connected to the microphone jack as well, but in a manner that
is confusing and likely does not provide power. This part is left out
of this patch.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The A33-OLinuXino has a DC jack wired to the onboard PMIC's ACIN pins.
There is also a battery connector, wired to the PMIC's battery charger.
Enable the power supplies for both these components.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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None of the common regulators defined in sunxi-common-regulators.dtsi
are used for the A33-OLinuXino.
Drop the include.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Normal GPIO usage does not need an additional pinmix setting. Exclusive
usage of the pin will be guaranteed by the driver.
Drop the extra pinmux settings.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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DTC warnings will be seen if these examples are used in a real dts file
due to a mismatch in the unit address notation.
Align the unit address notation to what is done in the real dts files
as per commit f81d7af79575 ("arm64: dts: fsl: fix ifc simple-bus unit
address format warnings")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to the i.MX25 reference manuals, each SSI has four FIFOs. All
of those FIFOs can store up to 15 entries.
The fsl_ssi driver's internal default for the FIFO depth in 8. Set our
non-default FIFO depth explicitly in the Device Tree.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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add mmc device nodes and proper setup for used pins
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Jimin Wang <jimin.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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add xhci node and usb3 phy nodes
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Tested-by: Jumin Li <jumin.li@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds SATA support fot MT7622.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds PCIe support for MT7622.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
[mb: fix type in commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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add ethernet device nodes which enable GMAC1 with SGMII interface
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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add nodes for NOR flash, parallel Nand flash with error correction code
support.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: RogerCC Lin <rogercc.lin@mediatek.com>
Cc: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add watchdog, rtc, auxadc, cir, efuse, rng, uart[1-4], pwm, i2c[0-2],
spi[0-1], btif and thermal related nodes.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
Cc: Zhiyong Tao <zhiyong.tao@mediatek.com>
Cc: Zhi Mao <zhi.mao@mediatek.com>
Cc: Jun Gao <jun.gao@mediatek.com>
Cc: Leilk Liu <leilk.liu@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch also cleans up two oscillators that provide clocks for MT7623.
Switch the uart clocks to the real ones while at it.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add clocks, regulators and opp information into cpu nodes.
In addition, the power supply for cpu nodes is deployed on
mt7622-rfb1 board.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Enable pwrap and MT6380 on mt7622-rfb1 board. Also add all mt6380
regulator nodes in an alone file to allow similar boards using MT6380
able to resue the configuration.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Acked-by: Philippe Ombredanne <pombredanne@nexb.com>
[mb: add missing space]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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add pinctrl device nodes and rfb1 board, additionally include all pin
groups possible being used on rfb1 board and available gpio keys.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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add power domain controller nodes
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add clock controller nodes for MT7622 and include header for topckgen,
infracfg, pericfg, apmixedsys, ethsys, sgmiisys, pciesys and ssusbsys
for those devices nodes to be added afterwards.
In addition, provides an oscillator node for the source of PLLs and dummy
clock for PWARP to complement missing support of clock gate for the
wrapper circuit in the driver.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This patch adds new cpu, codec subnodes according to the updated
"google,snow-audio-max98091" DT bindings and the I2S clock tree
configuration so sound on the HDMI interface can be also supported.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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This patch adds new cpu, codec subnodes according to the updated
"google,snow-audio-max98090" DT bindings and the I2S clock tree
configuration so sound on the HDMI interface can also be supported.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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This patch adds new cpu, codec subnodes according to the updated
"google,snow-audio-max98095" DT bindings and the I2S clock tree
configuration so sound on the HDMI interface can also be supported.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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