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2019-09-03Merge tag 'gpio-v5.4-updates-for-linus' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpio: updates for v5.4 - use a helper variable for &pdev->dev in gpio-em - tweak the ifdefs in GPIO headers - fix function links in HTML docs - remove an unneeded error message from ixp4xx - use the optional clk_get in gpio-mxc instead of checking the return value - a couple improvements in pca953x - allow to build gpio-lpc32xx on non-lpc32xx targets
2019-09-03Documenation: switching-sched: Remove notes about elevator argumentMarcos Paulo de Souza
This argument was ignored since blk-mq was set as default, so remove it from documentation. Reviewed-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> .txt file is now .rst Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-09-03Merge tag 'imx-bindings-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings update for 5.4 - Add SoC bindings for i.MX8MN. - Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc. - Add vendor prefix for Anvo-Systems and Einfochips. - Update LPUART bindings for i.MX8QXP clock requirement. - Update imx-weim bindings for optional burst clock mode support. - Update EEPROM bindings for Anvo ANV32E61W device support. * tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles dt-bindings: eeprom: at25: Add Anvo ANV32E61W dt-bindings: vendor-prefixes: Add Anvo-Systems dt-bindings: arm: fsl: add Hummingboard Pulse dt-bindings: arm: imx: add imx8mq nitrogen support dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string dt-bindings: arm: imx: Add the soc binding for i.MX8MN dt-bindings: bus: imx-weim: document optional burst clock mode dt-bindings: arm: fsl: Add the pico-pi-imx8m board dt-bindings: arm: Document i.MX8QXP AI_ML board binding dt-bindings: Add Vendor prefix for Einfochips dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board dt-bindings: serial: lpuart: add the clock requirement for imx8qxp dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board Link: https://lore.kernel.org/r/20190825153237.28829-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03block: elevator.c: Remove now unused elevator= argumentMarcos Paulo de Souza
Since the inclusion of blk-mq, elevator argument was not being considered anymore, and it's utility died long with the legacy IO path, now removed too. Reviewed-by: Hannes Reinecke <hare@suse.com> Reviewed-by: Bob Liu <bob.liu@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Fold with doc removal patch. Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-09-03Merge tag 'aspeed-5.4-devicetree' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.4 New machines: - Facebook Wedge100, Wedge40 and Minipack - Lenovo Hr855xg2 - Wistron Mihawk There's a few other updates, notably some changes to to use the newly added SDHCI driver. * tag 'aspeed-5.4-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: swift: Add eMMC device ARM: dts: aspeed: Enable first MMC slot on AST2500 EVB ARM: dts: aspeed: Describe SD controllers ARM: dts: aspeed: Add Mihawk BMC platform ARM: dts: aspeed: fp5280g2: Fix power supply address ARM: dts: aspeed: tiogapass: Add Riser card ARM: dts: aspeed: tiogapass: Move battery sensor ARM: dts: aspeed: Add Facebook Wedge100 BMC ARM: dts: aspeed: Add Facebook Wedge40 BMC ARM: dts: aspeed: swift: Fix FSI GPIOs ARM: dts: aspeed: Add SGPM pinmux ARM: dts: aspeed: tiogapass: Add VR devices ARM: dts: aspeed: Add Lenovo Hr855xg2 BMC ARM: dts: aspeed: Add Facebook Minipack BMC Link: https://lore.kernel.org/r/CACPK8XfKHpNYXNE_VRaLeGUQa7-hkmUS0nsPfaeSLE4sckKFHg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'omap-for-v5.4/dt-take2-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt dts changes for omap variants for v5.4 Remove regulator-boot-off properties that we never had in the mainline kernel so they won't do anything. We add stdout-path for gta04, and make am335x-boneblue use am335x-osd335x-common.dtsi file. * tag 'omap-for-v5.4/dt-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-boneblue: Use of am335x-osd335x-common.dtsi ARM: dts: gta04: define chosen/stdout-path ARM: dts: omap3-n950-n9: Remove regulator-boot-off property ARM: dts: am335x-cm-t335: Remove regulator-boot-off property Link: https://lore.kernel.org/r/pull-1566599057-142651@atomide.com-2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03block: mq-deadline: Fix queue restart handlingDamien Le Moal
Commit 7211aef86f79 ("block: mq-deadline: Fix write completion handling") added a call to blk_mq_sched_mark_restart_hctx() in dd_dispatch_request() to make sure that write request dispatching does not stall when all target zones are locked. This fix left a subtle race when a write completion happens during a dispatch execution on another CPU: CPU 0: Dispatch CPU1: write completion dd_dispatch_request() lock(&dd->lock); ... lock(&dd->zone_lock); dd_finish_request() rq = find request lock(&dd->zone_lock); unlock(&dd->zone_lock); zone write unlock unlock(&dd->zone_lock); ... __blk_mq_free_request check restart flag (not set) -> queue not run ... if (!rq && have writes) blk_mq_sched_mark_restart_hctx() unlock(&dd->lock) Since the dispatch context finishes after the write request completion handling, marking the queue as needing a restart is not seen from __blk_mq_free_request() and blk_mq_sched_restart() not executed leading to the dispatch stall under 100% write workloads. Fix this by moving the call to blk_mq_sched_mark_restart_hctx() from dd_dispatch_request() into dd_finish_request() under the zone lock to ensure full mutual exclusion between write request dispatch selection and zone unlock on write request completion. Fixes: 7211aef86f79 ("block: mq-deadline: Fix write completion handling") Cc: stable@vger.kernel.org Reported-by: Hans Holmberg <Hans.Holmberg@wdc.com> Reviewed-by: Hans Holmberg <hans.holmberg@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-09-03Merge tag 'v5.3-next-dts64' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8183: - fix pwrap interrupt number - add i2c notes dt-bindings: - add compatible for mt6779 - add mt6779 uart and sysirq compatible * tag 'v5.3-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: irq: mtk, sysirq: add support for mt6779 dt-bindings: mtk-uart: add mt6779 uart bindings dt-bindings: mediatek: add support for mt6779 reference board arm64: dts: mt8183: add I2C nodes arm64: dts: mt8183: fix pwrap gic number Link: https://lore.kernel.org/r/def8fb77-fce4-097d-7ae2-8c4670bc09c1@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'v5.3-next-dts32' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt add support for the mt7629 reference board * tag 'v5.3-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: dts: mediatek: add basic support for MT7629 SoC Link: https://lore.kernel.org/r/e236f659-2851-21b8-1873-314cd72ed6be@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'sunxi-dt-for-5.4-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Allwinner DT changes for 5.4 Our usual pile of patches for the next release, which include mostly: - More fixes thanks to the DT validation using the YAML bindings - IR receiver support on the H6 - SPDIF support on the H6 - I2C Support on the H6 - CSI support on the A20 - RTC support on the H6 - New Boards: Lichee Zero Plus, Tanix TX6, A64-Olinuxino-eMMC * tag 'sunxi-dt-for-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (40 commits) arm64: dts: allwinner: orange-pi-3: Enable WiFi ARM: dts: sunxi: Add missing watchdog clocks ARM: dts: sunxi: Add missing watchdog interrupts arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree ARM: dts: sun7i: Add CSI0 controller arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC) dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC ARM: dts: v3s: Change the timers compatible ARM: dts: h3: Change the timers compatible ARM: dts: a83t: Change the timers compatible ARM: dts: a23/a33: Change the timers compatible ARM: dts: sun6i: Add missing timers interrupts ARM: dts: sun5i: Add missing timers interrupts ARM: dts: sun4i: Add missing timers interrupts dt-bindings: mfd: Convert Allwinner GPADC bindings to a schema arm64: dts: allwinner: h6: Introduce Tanix TX6 board dt-bindings: arm: sunxi: Add compatible for Tanix TX6 board arm64: allwinner: h6: add I2C nodes dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node. ARM: dts: sunxi: Add mdio bus sub-node to GMAC ... Link: https://lore.kernel.org/r/d97e6252-9dd7-4cf5-a3cf-56f78b0ca455.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03rsi: fix a double free bug in rsi_91x_deinit()Hui Peng
`dev` (struct rsi_91x_usbdev *) field of adapter (struct rsi_91x_usbdev *) is allocated and initialized in `rsi_init_usb_interface`. If any error is detected in information read from the device side, `rsi_init_usb_interface` will be freed. However, in the higher level error handling code in `rsi_probe`, if error is detected, `rsi_91x_deinit` is called again, in which `dev` will be freed again, resulting double free. This patch fixes the double free by removing the free operation on `dev` in `rsi_init_usb_interface`, because `rsi_91x_deinit` is also used in `rsi_disconnect`, in that code path, the `dev` field is not (and thus needs to be) freed. This bug was found in v4.19, but is also present in the latest version of kernel. Fixes CVE-2019-15504. Reported-by: Hui Peng <benquike@gmail.com> Reported-by: Mathias Payer <mathias.payer@nebelwelt.net> Signed-off-by: Hui Peng <benquike@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03Merge tag 'renesas-dt-bindings-for-v5.4-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.4 (take two) - Renesas DT binding doc filename cleanups, - R-Car Gen3 and RZ/G1 updates for the R-Car CAN and CANFD DT bindings. * tag 'renesas-dt-bindings-for-v5.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: can: rcar_can: document r8a77470 support dt-bindings: can: rcar_canfd: document r8a77995 support dt-bindings: can: rcar_can: document r8a77995 support dt-bindings: can: rcar_can: document r8a77990 support dt-bindings: rcar-{csi2,vin}: Rename bindings documentation files dt-bindings: rcar-imr: Rename bindings documentation file dt-bindings: Rename file of DT bindings for Renesas memory controllers Link: https://lore.kernel.org/r/20190823123643.18799-6-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Revert "rt2800: enable TX_PIN_CFG_LNA_PE_ bits per band"Stanislaw Gruszka
This reverts commit 9ad3b55654455258a9463384edb40077439d879f. As reported by Sergey: "I got some problem after upgrade kernel to 5.2 version (debian testing linux-image-5.2.0-2-amd64). 5Ghz client stopped to see AP. Some tests with 1metre distance between client-AP: 2.4Ghz -22dBm, for 5Ghz - 53dBm !, for longer distance (8m + walls) 2.4 - 61dBm, 5Ghz not visible." It was identified that rx signal level degradation was caused by 9ad3b5565445 ("rt2800: enable TX_PIN_CFG_LNA_PE_ bits per band"). So revert this commit. Cc: <stable@vger.kernel.org> # v5.1+ Reported-and-tested-by: Sergey Maranchuk <slav0nic0@gmail.com> Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03rt2x00: clear up IV's on key removalStanislaw Gruszka
After looking at code I realized that my previous fix 95844124385e ("rt2x00: clear IV's on start to fix AP mode regression") was incomplete. We can still have wrong IV's after re-keyring. To fix that, clear up IV's also on key removal. Fixes: 710e6cc1595e ("rt2800: do not nullify initialization vector data") Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> tested-by: Emil Karlson <jekarl@iki.fi> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03iwlwifi: assign directly to iwl_trans->cfg in QuZ detectionLuca Coelho
We were erroneously assigning the new configuration to a local variable cfg, but that was not being assigned to anything, so the change was getting lost. Assign directly to iwl_trans->cfg instead. Fixes: 5a8c31aa6357 ("iwlwifi: pcie: fix recognition of QuZ devices") Cc: stable@vger.kernel.org # 5.2 Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03mwifiex: Fix three heap overflow at parsing element in cfg80211_ap_settingsWen Huang
mwifiex_update_vs_ie(),mwifiex_set_uap_rates() and mwifiex_set_wmm_params() call memcpy() without checking the destination size.Since the source is given from user-space, this may trigger a heap buffer overflow. Fix them by putting the length check before performing memcpy(). This fix addresses CVE-2019-14814,CVE-2019-14815,CVE-2019-14816. Signed-off-by: Wen Huang <huangwenabc@gmail.com> Acked-by: Ganapathi Bhat <gbhat@marvell.comg> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03mt76: mt76x0e: disable 5GHz band for MT7630EStanislaw Gruszka
MT7630E hardware does support 5GHz, but we do not properly configure phy for 5GHz channels. Scanning at this band not only do not show any APs but also can hang the firmware. Since vendor reference driver do not support 5GHz we don't know how properly configure 5GHz channels. So disable this band for MT7630E . Cc: stable@vger.kernel.org Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03mt76: mt76x0e: don't use hw encryption for MT7630EStanislaw Gruszka
Since 41634aa8d6db ("mt76: only schedule txqs from the tx tasklet") I can observe firmware hangs on MT7630E on station mode: tx stop functioning after minor activity (rx keep working) and on module unload device fail to stop with messages: [ 5446.141413] mt76x0e 0000:06:00.0: TX DMA did not stop [ 5449.176764] mt76x0e 0000:06:00.0: TX DMA did not stop Loading module again results in failure to associate with AP. Only machine power off / power on cycle can make device work again. It's unclear why commit 41634aa8d6db causes the problem, but it is related to HW encryption. Since issue is a firmware hang, that is super hard to debug, just disable HW encryption as fix for the issue. Fixes: 41634aa8d6db ("mt76: only schedule txqs from the tx tasklet") Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-09-03Merge tag 'renesas-arm64-dt-for-v5.4-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM64 DT updates for v5.4 (take two) - Sort nodes in various SoC and board DTSes, - HDMI sound for HiHope RZ/G2M and R-Car M3-N Salvator-X(S) boards, - Limit EtherAVB to 100Mbps on the Ebisu and Draak boards, - Small fixes and improvements. * tag 'renesas-arm64-dt-for-v5.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits) arm64: dts: renesas: Update 'vsps' properties for readability arm64: dts: renesas: r8a77965-salvator-x(s): Enable HDMI sound arm64: dts: renesas: r8a774c0: Fix register range of display node arm64: dts: renesas: r8a77970: Sort nodes arm64: dts: renesas: r8a7796: Sort nodes arm64: dts: renesas: r8a774c0: Sort nodes arm64: dts: renesas: r8a774c0: cat874: Sort nodes arm64: dts: renesas: r8a774a1: Sort nodes arm64: dts: renesas: r8a77980: Fix IPMMU-VC0 base address arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps arm64: dts: renesas: hihope-common: Add HDMI audio support arm64: dts: renesas: r8a774c0: cat874: Add definition for 12V regulator arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1 arm64: dts: renesas: r8a77995: Sort nodes arm64: dts: renesas: r8a77995: draak: Sort nodes arm64: dts: renesas: r8a77990: Sort nodes arm64: dts: renesas: r8a77990: ebisu: Sort nodes arm64: dts: renesas: r8a77980: v3hsk: Sort nodes arm64: dts: renesas: r8a77980: condor: Sort nodes arm64: dts: renesas: r8a77970: v3msk: Sort nodes ... Link: https://lore.kernel.org/r/20190823123643.18799-4-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'renesas-arm-dt-for-v5.4-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.4 - Fix HSCIF PM Domain on R-Car H1, - PMU support for RZ/G1C. * tag 'renesas-arm-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: r8a77470: Add PMU device node ARM: dts: r8a7779: Use SYSC "always-on" PM Domain for HSCIF Link: https://lore.kernel.org/r/20190823123643.18799-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03iommu: Don't use sme_active() in generic codeJoerg Roedel
Switch to the generic function mem_encrypt_active() because sme_active() is x86 specific and can't be called from generic code on other platforms than x86. Fixes: 2cc13bb4f59f ("iommu: Disable passthrough mode when SME is active") Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-09-03Merge tag 'amlogic-dt64' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.4 Highlights - new SoCs (G12B family): S922X, A311D - new SoCs (SM1 family): S905X3 - new board: SEI Robotics SEI610 (SM1/S905X3) - new board: Khadas VIM3 (G12B/A311D) - DVFS/CPUfreq support on G12[AB] family * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (40 commits) arm64: dts: add support for SM1 based SEI Robotics SEI610 dt-bindings: arm: amlogic: add SEI Robotics SEI610 bindings dt-bindings: arm: amlogic: add SM1 bindings arm64: dts: meson-g12b-odroid-n2: enable DVFS arm64: dts: meson-g12b-khadas-vim3: add initial device-tree dt-bindings: arm: amlogic: fix x96-max/sei510 section in amlogic.yaml arm64: dts: amlogic: g12 CPU timers stop in suspend arm64: dts: meson-g12b: support a311d and s922x cpu operating points dt-bindings: arm: amlogic: add support for the Khadas VIM3 dt-bindings: arm: amlogic: add bindings for the Amlogic G12B based A311D SoC dt-bindings: arm: amlogic: add bindings for G12B based S922X SoC arm64: dts: meson: add video decoder entries arm64: dts: meson-gx: add video decoder entry dt-bindings: media: amlogic,vdec: add default compatible arm64: dts: meson: add ethernet fifo sizes arm64: dts: meson-g12b: add cpus OPP tables arm64: dts: meson-g12a: enable DVFS on G12A boards arm64: dts: meson-g12a: add cpus OPP table arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmux arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi ... Link: https://lore.kernel.org/r/7hr25fbi4v.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'amlogic-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: Amlogic updates for v5.4 Highlights - odroid-c1: use MAC address from efuse - add VDD_EE regulator to several boards * tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: odroidc1: use the MAC address stored in the eFuse ARM: dts: meson8b: mxq: add the VDDEE regulator ARM: dts: meson8b: odroidc1: add the VDDEE regulator ARM: dts: meson8b: ec100: add the VDDEE regulator ARM: dts: meson8b: add the PWM_D output pin ARM: dts: meson8b: add ethernet fifo sizes Link: https://lore.kernel.org/r/7hzhk3bi96.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'socfpga_dts_updates_for_v5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.4 - Add reset properties for various peripherals - QSPI OCP and DMA on Arria10 - DMA on Agilex/Stratix10 - Update NAND controller bindings to match driver update - Add NAND controller to Stratix10 - VINING FPGA board fixups - Update button mapping - Adjust GMAC1 clock and TXD skew settings - Add missing reset-names for dma controller * tag 'socfpga_dts_updates_for_v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: add missing reset-names for dma ARM: dts: socfpga: Adjust GMAC1 clock and TXD lines skew on VINING FPGA ARM: dts: socfpga: Fix up button mapping on VINING FPGA arm64: dts: stratix10: Add NAND device node ARM: dts: socfpga: update to new Denali NAND binding arm64: dts: agilex/stratix10: Add reset properties for DMA ARM: dts: socfpga: add reset properties for DMA ARM: dts: socfpga: add the QSPI OCP reset property on arria10 Link: https://lore.kernel.org/r/20190819141659.26414-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'v5.4-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt PWM-Fan and nor-flash for the RockPro64, a better display mode for the Kevin Chromebook and a new board the Leez P710 SBC. * tag 'v5.4-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC arm64: dts: rockchip: enable internal SPI flash for RockPro64. arm64: dts: rockchip: Add PWM fan for RockPro64 arm64: dts: rockchip: Specify override mode for kevin panel Link: https://lore.kernel.org/r/20190819141659.26414-1-dinguyen@kernel.org Link: https://lore.kernel.org/r/2362486.gYoCZEsBuK@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03iommu/vt-d: Remove global page flush supportJacob Pan
Global pages support is removed from VT-d spec 3.0. Since global pages G flag only affects first-level paging structures and because DMA request with PASID are only supported by VT-d spec. 3.0 and onward, we can safely remove global pages support. For kernel shared virtual address IOTLB invalidation, PASID granularity and page selective within PASID will be used. There is no global granularity supported. Without this fix, IOTLB invalidation will cause invalid descriptor error in the queued invalidation (QI) interface. Fixes: 1c4f88b7f1f9 ("iommu/vt-d: Shared virtual address in scalable mode") Reported-by: Sanjay K Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-09-03iommu/arm-smmu-v3: Fix build error without CONFIG_PCI_ATSYueHaibing
If CONFIG_PCI_ATS is not set, building fails: drivers/iommu/arm-smmu-v3.c: In function arm_smmu_ats_supported: drivers/iommu/arm-smmu-v3.c:2325:35: error: struct pci_dev has no member named ats_cap; did you mean msi_cap? return !pdev->untrusted && pdev->ats_cap; ^~~~~~~ ats_cap should only used when CONFIG_PCI_ATS is defined, so use #ifdef block to guard this. Fixes: bfff88ec1afe ("iommu/arm-smmu-v3: Rework enabling/disabling of ATS for PCI masters") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-09-03Merge tag 'v5.4-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt A lot more love for Veyron devices with cleanups in the display and wifi areas and also a 100ms speedup as a delay isn't needed anymore. New boards are Tiger and Fievel from the Veyron family and the Mecer Xtreme Mini S6, which I think is the first consumer-grade rk3229-based device in the kernel. * tag 'v5.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: add device tree for Mecer Xtreme Mini S6 Revert "ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators" ARM: dts: rockchip: Add pin names for rk3288-veyron fievel ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger} ARM: dts: rockchip: Cleanup style around assignment operator ARM: dts: rockchip: add veyron-tiger board ARM: dts: rockchip: add veyron-fievel board dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-{fievel,tiger} ARM: dts: rockchip: consolidate veyron panel and backlight settings ARM: dts: rockchip: move rk3288-veryon display settings into a separate file ARM: dts: rockchip: Limit WiFi TX power on rk3288-veyron-jerry ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings ARM: dts: rockchip: Specify rk3288-veyron-chromebook's display timings Link: https://lore.kernel.org/r/1611583.rKl1eQBRh8@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'samsung-dt-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.4 1. Add AHCI to Exynos5250, 2. Add camera and GPU power domains to Exynos5422, 3. Minor cleanup. * tag 'samsung-dt-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Add CAM power domain to Exynos5422/5800 ARM: dts: exynos: Add G3D power domain to Exynos542x ARM: dts: exynos: Move MSC power domain to the right (sorted) place ARM: dts: exynos: Add port map to Exynos5250 AHCI node ARM: dts: exynos: Use space after '=' in exynos4412-itop-scp-core Link: https://lore.kernel.org/r/20190816163042.6604-2-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'omap-for-v5.4/soc-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SoC changes for omap variants for v5.4 The first change moves platform-specific asm-offsets.h to arch/arm/mach-omap2 to fix iessu with parallel build with CONFIG_IKHEADERS, and the second change removes a useless kfree. Note that the first change causes a trivial merge conflict with the iommu changes for arch/arm/mach-omap2/Makefile. * tag 'omap-for-v5.4/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init() ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2 Link: https://lore.kernel.org/r/pull-1567016893-318461@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'at91-5.4-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC for 5.4 - MAINTAINERS updates - a generated headers parallel build fix * tag 'at91-5.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: mailmap: map old company name to new one @microchip.com MAINTAINERS: at91: remove the TC entry MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91 Link: https://lore.kernel.org/r/20190825203222.GA22800@piout.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'imx-soc-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC changes for 5.4: - Drop AR8031 PHY TX delay adjusting from i.MX7D machine code, as it's superfluous due to the recent changes to Atheros AT803X driver. - Select TIMER_IMX_SYS_CTR for arm64 ARCH_MXC platform, since the system counter is needed as broadcast timer for cpuidle support. * tag 'imx-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: stop adjusting ar8031 phy tx delay arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms Link: https://lore.kernel.org/r/20190825153237.28829-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'aspeed-5.4-arch' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/soc ASPEED architecture updates for 5.4 This adds support for the new ASPEED AST2600 BMC SoC. * tag 'aspeed-5.4-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: aspeed: Enable SMP boot ARM: aspeed: Add ASPEED AST2600 architecture ARM: aspeed: Select timer in each SoC dt-bindings: arm: cpus: Add ASPEED SMP Link: https://lore.kernel.org/r/CACPK8Xc1aSp5fXL3cEzC9SJsCXG2JwsSPpQrW3a09dkvhCyHHA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'vexpress-update-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/soc ARMv7 Vexpress update for v5.4 Single cleanup patch handling type checks using cppcheck tool (bitwise shift by more than 31 on a 32 bit type) * tag 'vexpress-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: vexpress: Cleanup cppcheck shifting warning Link: https://lore.kernel.org/r/20190814172441.26143-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03s390/base: remove unused s390_base_mcck_handlerVasily Gorbik
s390_base_mcck_handler was used during system reset if diag308 set was not available. But after commit d485235b0054 ("s390: assume diag308 set always works") is a dead code and could be removed. Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2019-09-03s390/sclp: Fix bit checked for has_siplPhilipp Rudo
Fixes: c9896acc7851 ("s390/ipl: Provide has_secure sysfs attribute") Cc: stable@vger.kernel.org # 5.2+ Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Philipp Rudo <prudo@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2019-09-03spi: spi-fsl-dspi: Fix race condition in TCFQ/EOQ interruptVladimir Oltean
When the driver is working in TCFQ/EOQ mode (i.e. interacts with the SPI controller's FIFOs directly) the following sequence of operations happens: - The first byte of the tx buffer gets pushed to the TX FIFO (dspi->len gets decremented). This triggers the train of interrupts that handle the rest of the bytes. - The dspi_interrupt handles a TX confirmation event. It reads the newly available byte from the RX FIFO, checks the dspi->len exit condition, and if there's more to be done, it kicks off the next interrupt in the train by writing the next byte to the TX FIFO. Now the problem is that the wait queue is woken up one byte too early, because dspi->len becomes 0 as soon as the byte has been pushed into the TX FIFO. Its interrupt has not yet been processed and the RX byte has not been put from the FIFO into the buffer. Depending on the timing of the wait queue wakeup vs the handling of the last dspi_interrupt, it can happen that the main SPI message pump thread has already returned back into the spi_device driver. When the rx buffer is on stack (which it can be, because in this mode, the DSPI doesn't do DMA), the last interrupt will perform a memory write into an rx buffer that has been freed. This manifests as stack corruption. The solution is to only wake up the wait queue when dspi_rxtx says so, i.e. after it has processed the last TX confirmation interrupt and collected the last RX byte. Fixes: c55be3059159 ("spi: spi-fsl-dspi: Use poll mode in case the platform IRQ is missing") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190903105708.32273-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03spi: uniphier: introduce polling modeKeiji Hayashibara
Introduce new polling mode for short size transfer. Either the estimated transfer time is estimated to exceed 200us, or polling loop actually exceeds 200us, it switches to irq mode. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Link: https://lore.kernel.org/r/1567488661-11428-4-git-send-email-hayashibara.keiji@socionext.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03spi: uniphier: remove unnecessary codeKeiji Hayashibara
This commit removed if() because priv->is_save_param is always true. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Link: https://lore.kernel.org/r/1567488661-11428-3-git-send-email-hayashibara.keiji@socionext.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03spi: uniphier: fix wrong register overwriteKeiji Hayashibara
When it changes the spi mode, the register is overwritten incorrectly. This commit fixes this register overwrite. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Link: https://lore.kernel.org/r/1567488661-11428-2-git-send-email-hayashibara.keiji@socionext.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03regulator: add missing 'static inline' to a helper's stubBartosz Golaszewski
The build fails when CONFIG_REGULATOR is not selected because the stub for regulator_bulk_set_supply_names() is missing the 'static inline' attribute. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Link: https://lore.kernel.org/r/20190902151332.28058-1-brgl@bgdev.pl Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03irqdomain: Add the missing assignment of domain->fwnode for named fwnodeDexuan Cui
Recently device pass-through stops working for Linux VM running on Hyper-V. git-bisect shows the regression is caused by the recent commit 467a3bb97432 ("PCI: hv: Allocate a named fwnode ..."), but the root cause is that the commit d59f6617eef0 forgets to set the domain->fwnode for IRQCHIP_FWNODE_NAMED*, and as a result: 1. The domain->fwnode remains to be NULL. 2. irq_find_matching_fwspec() returns NULL since "h->fwnode == fwnode" is false, and pci_set_bus_msi_domain() sets the Hyper-V PCI root bus's msi_domain to NULL. 3. When the device is added onto the root bus, the device's dev->msi_domain is set to NULL in pci_set_msi_domain(). 4. When a device driver tries to enable MSI-X, pci_msi_setup_msi_irqs() calls arch_setup_msi_irqs(), which uses the native MSI chip (i.e. arch/x86/kernel/apic/msi.c: pci_msi_controller) to set up the irqs, but actually pci_msi_setup_msi_irqs() is supposed to call msi_domain_alloc_irqs() with the hbus->irq_domain, which is created in hv_pcie_init_irq_domain() and is associated with the Hyper-V chip hv_msi_irq_chip. Consequently, the irq line is not properly set up, and the device driver can not receive any interrupt. Fixes: d59f6617eef0 ("genirq: Allow fwnode to carry name information only") Fixes: 467a3bb97432 ("PCI: hv: Allocate a named fwnode instead of an address-based one") Reported-by: Lili Deng <v-lide@microsoft.com> Signed-off-by: Dexuan Cui <decui@microsoft.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/PU1P153MB01694D9AF625AC335C600C5FBFBE0@PU1P153MB0169.APCP153.PROD.OUTLOOK.COM
2019-09-03x86/mm: Remove the unused set_memory_wt() functionChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190826075558.8125-5-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03x86/mm: Remove set_pages_x() and set_pages_nx()Christoph Hellwig
These wrappers don't provide a real benefit over just using set_memory_x() and set_memory_nx(). Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190826075558.8125-4-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03x86/mm: Remove the unused set_memory_array_*() functionsChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190826075558.8125-3-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03x86/mm: Unexport set_memory_x() and set_memory_nx()Christoph Hellwig
No module currently messed with clearing or setting the execute permission of kernel memory, and none really should. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190826075558.8125-2-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03Merge tag 'v5.3-rc7' into x86/mm, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03perf/x86: Make more stuff staticValdis Klētnieks
When building with C=2, sparse makes note of a number of things: arch/x86/events/intel/rapl.c:637:30: warning: symbol 'rapl_attr_update' was not declared. Should it be static? arch/x86/events/intel/cstate.c:449:30: warning: symbol 'core_attr_update' was not declared. Should it be static? arch/x86/events/intel/cstate.c:457:30: warning: symbol 'pkg_attr_update' was not declared. Should it be static? arch/x86/events/msr.c:170:30: warning: symbol 'attr_update' was not declared. Should it be static? arch/x86/events/intel/lbr.c:276:1: warning: symbol 'lbr_from_quirk_key' was not declared. Should it be static? And they can all indeed be static. Signed-off-by: Valdis Kletnieks <valdis.kletnieks@vt.edu> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/128059.1565286242@turing-police Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03sched/uclamp: Always use 'enum uclamp_id' for clamp_id valuesPatrick Bellasi
The supported clamp indexes are defined in 'enum clamp_id', however, because of the code logic in some of the first utilization clamping series version, sometimes we needed to use 'unsigned int' to represent indices. This is not more required since the final version of the uclamp_* APIs can always use the proper enum uclamp_id type. Fix it with a bulk rename now that we have all the bits merged. Signed-off-by: Patrick Bellasi <patrick.bellasi@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Michal Koutny <mkoutny@suse.com> Acked-by: Tejun Heo <tj@kernel.org> Cc: Alessio Balsini <balsini@android.com> Cc: Dietmar Eggemann <dietmar.eggemann@arm.com> Cc: Joel Fernandes <joelaf@google.com> Cc: Juri Lelli <juri.lelli@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Morten Rasmussen <morten.rasmussen@arm.com> Cc: Paul Turner <pjt@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Perret <quentin.perret@arm.com> Cc: Rafael J . Wysocki <rafael.j.wysocki@intel.com> Cc: Steve Muckle <smuckle@google.com> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Todd Kjos <tkjos@google.com> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lkml.kernel.org/r/20190822132811.31294-7-patrick.bellasi@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-09-03sched/uclamp: Update CPU's refcount on TG's clamp changesPatrick Bellasi
On updates of task group (TG) clamp values, ensure that these new values are enforced on all RUNNABLE tasks of the task group, i.e. all RUNNABLE tasks are immediately boosted and/or capped as requested. Do that each time we update effective clamps from cpu_util_update_eff(). Use the *cgroup_subsys_state (css) to walk the list of tasks in each affected TG and update their RUNNABLE tasks. Update each task by using the same mechanism used for cpu affinity masks updates, i.e. by taking the rq lock. Signed-off-by: Patrick Bellasi <patrick.bellasi@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Michal Koutny <mkoutny@suse.com> Acked-by: Tejun Heo <tj@kernel.org> Cc: Alessio Balsini <balsini@android.com> Cc: Dietmar Eggemann <dietmar.eggemann@arm.com> Cc: Joel Fernandes <joelaf@google.com> Cc: Juri Lelli <juri.lelli@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Morten Rasmussen <morten.rasmussen@arm.com> Cc: Paul Turner <pjt@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Perret <quentin.perret@arm.com> Cc: Rafael J . Wysocki <rafael.j.wysocki@intel.com> Cc: Steve Muckle <smuckle@google.com> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Todd Kjos <tkjos@google.com> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lkml.kernel.org/r/20190822132811.31294-6-patrick.bellasi@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>