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2024-11-08pinctrl: single: add marvell,pxa1908-padconf compatibleDuje Mihanović
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a separate pinctrl driver later. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-3-e050609b8d6c@skole.hr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatibleDuje Mihanović
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a separate pinctrl driver later. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-2-e050609b8d6c@skole.hr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08dt-bindings: pinctrl: correct typo of description for cv1800Chen Wang
It should be PINMUX/PINMUX2, not GPIOMUX/GPIOMUX2, see <dt-bindings/pinctrl/pinctrl-cv1800b.h>. Fixes: 64aa494de6fa ("dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC.") Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20241029012312.3448287-1-unicornxw@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08pinctrl: qcom: spmi-mpp: Add PM8937 compatibleBarnabás Czémán
The PM8937 provides 4 MPPs. Add a compatible to support them. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/20241031-msm8917-v2-4-8a075faa89b1@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatibleBarnabás Czémán
Document the Device Tree binding for PM8937 MPPs. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20241031-msm8917-v2-3-8a075faa89b1@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08pinctrl: qcom-pmic-gpio: add support for PM8937Barnabás Czémán
PM8937 has 8 GPIO-s with holes on GPIO3, GPIO4 and GPIO6. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/20241031-msm8917-v2-2-8a075faa89b1@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937Barnabás Czémán
Document the 8 GPIOs found on PM8937. It has holes on 3,4 and 6 pins. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20241031-msm8917-v2-1-8a075faa89b1@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-08pinctrl: Use of_property_present() for non-boolean propertiesRob Herring (Arm)
The use of of_property_read_bool() for non-boolean properties is deprecated in favor of of_property_present() when testing for property presence. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20241104194437.327430-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-07Merge tag 'intel-pinctrl-v6.13-2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v6.13-2 This includes following Intel pinctrl changes for v6.13 merge window: - Expose DSW community on Elkhart Lake. - Elaborate in the code comment the pull bias settings. Both have been in linux-next with no reported issues. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-05Merge tag 'renesas-pinctrl-for-v6.13-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.13 (take two) - Use the gpiochip_populate_parent_fwspec_twocell() helper. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-05pinctrl: elkhartlake: Add support for DSW communityAndy Shevchenko
Hardware has a DSW (Deep Sleep Well) community that might be exposed by some BIOSes. Add support for it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2024-11-05pinctrl: intel: Add a human readable decoder for pull bias valuesAndy Shevchenko
Add a human readable decoder for pull bias values in the comment. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2024-10-30pinctrl: airoha: Add support for EN7581 SoCLorenzo Bianconi
Introduce pinctrl driver for EN7581 SoC. Current EN7581 pinctrl driver supports the following functionalities: - pin multiplexing - pin pull-up, pull-down, open-drain, current strength, {input,output}_enable, output_{low,high} - gpio controller - irq controller Tested-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Co-developed-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Signed-off-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-5-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-30dt-bindings: mfd: Add support for Airoha EN7581 GPIO System ControllerChristian Marangi
Add support for Airoha EN7581 GPIO System Controller which provide a register map for controlling the GPIO, pinctrl and PWM of the SoC via dedicated pinctrl and pwm child nodes. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-4-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-30dt-bindings: pwm: airoha: Add EN7581 pwmLorenzo Bianconi
Introduce device-tree binding documentation for Airoha EN7581 pwm controller. Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-3-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-30dt-bindings: pinctrl: airoha: Add EN7581 pinctrlLorenzo Bianconi
Introduce device-tree binding documentation for Airoha EN7581 pinctrl controller. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-2-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-30dt-bindings: arm: airoha: Add the chip-scu node for EN7581 SoCLorenzo Bianconi
This patch adds the chip-scu document bindings for EN7581 SoC. The airoha chip-scu block provides a configuration interface for clock, io-muxing and other functionalities used by multiple controllers (e.g. clock, pinctrl, ecc.) on EN7581 SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-1-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-29Merge tag 'samsung-pinctrl-6.13' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.13 1. Add new pin controller drivers for new Samsung SoCs: Exynos8895, Exynos9810, Exynos990. 2. Correct the condition when applying further interrupt constraints on certain Samsung pin controllers. The condition was simply not effective. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-28pinctrl: aspeed-g6: Support drive-strength for GPIOF/GBilly Tsai
Add drive strength configuration support for GPIO F and G groups. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/20241023104406.4083460-1-billy_tsai@aspeedtech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-28pinctrl: spacemit: fix double free of mapDan Carpenter
The map pointer is freed by pinctrl_utils_free_map(). It must not be a devm_ pointer or it leads to a double free when the device is unloaded. This is similar to a couple bugs Harshit Mogalapalli fixed earlier in commits 3fd976afe974 ("pinctrl: nuvoton: fix a double free in ma35_pinctrl_dt_node_to_map_func()") and 4575962aeed6 ("pinctrl: sophgo: fix double free in cv1800_pctrl_dt_node_to_map()"). Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Acked-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/4b5f1306-dc01-4edc-96d3-b232b930ddf2@stanley.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-28dt-bindings: pinctrl: convert pinctrl-mcp23s08.txt to yaml formatHimanshu Bhavani
YAML binding file provides the conversion of the original text-based binding for the pinctrl-mcp23s08 to microchip,mcp23s08.yaml. following compatible strings using the deprecated mcp prefix have been removed from this binding: - mcp,mcp23s08 - mcp,mcp23s17 - mcp,mcp23008 - mcp,mcp23017 Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20241028063939.6276-1-himanshu.bhavani@siliconsignals.io Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-27pinctrl: samsung: Add Exynos9810 SoC specific dataMarkuss Broks
Add Samsung Exynos9810 SoC specific data to enable pinctrl support for platforms based on Exynos9810. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-27dt-bindings: pinctrl: samsung: Add compatible for exynos9810-wakeup-eintMarkuss Broks
Add the compatible for Samsung Exynos9810 pinctrl eint block to the schema. It is compatible with Exynos850 EINT controller, and doesn't have a dedicated IRQ line. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-4-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-27dt-bindings: pinctrl: samsung: Add compatible for Exynos9810 SoCMarkuss Broks
Add a compatible for Samsung Exynos9810 pinctrl block to the schema. Exynos9810 has 9 total pin banks and it's similar to other Samsung SoC pinctrl blocks. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-3-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-25dt-bindings: pinctrl: qcom,sm8650-lpass-lpi-pinctrl: Add SM8750Krzysztof Kozlowski
Document compatible for Qualcomm SM8750 SoC LPASS TLMM pin controller, fully compatible with previous SM8650 generation (same amount of pins and functions). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/20241022064245.22983-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-25pinctrl: renesas: rzg2l: Use gpiochip_populate_parent_fwspec_twocell helperLad Prabhakar
Because rzg2l_gpio_populate_parent_fwspec() and gpiochip_populate_parent_fwspec_twocell() are identical. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241017113942.139712-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-23pinmux: Use sequential access to access desc->pinmux dataMukesh Ojha
When two client of the same gpio call pinctrl_select_state() for the same functionality, we are seeing NULL pointer issue while accessing desc->mux_owner. Let's say two processes A, B executing in pin_request() for the same pin and process A updates the desc->mux_usecount but not yet updated the desc->mux_owner while process B see the desc->mux_usecount which got updated by A path and further executes strcmp and while accessing desc->mux_owner it crashes with NULL pointer. Serialize the access to mux related setting with a mutex lock. cpu0 (process A) cpu1(process B) pinctrl_select_state() { pinctrl_select_state() { pin_request() { pin_request() { ... .... } else { desc->mux_usecount++; desc->mux_usecount && strcmp(desc->mux_owner, owner)) { if (desc->mux_usecount > 1) return 0; desc->mux_owner = owner; } } Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/20241014192930.1539673-1-quic_mojha@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-23dt-bindings: pinctrl: fsl,imx6ul-pinctrl: Convert i.MX35/5x/6 to YAMLMarek Vasut
The IOMUXC controller description is almost identical on i.MX35/5x/6 SoCs, except for the configuration bits which differ across SoCs. Rename the fsl,imx6ul-pinctrl.yaml to fsl,imx35-pinctrl.yaml, fill in compatible strings for the other SoCs and fill in the various bits into desciption. This way, i.MX35/5x/6 series SoCs can all be converted to DT schema. Remove the old text DT bindings description. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/20241017211241.170861-1-marex@denx.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-23pinctrl: imx-scmi: Drop obsolete dependency on COMPILE_TESTJean Delvare
Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), OF can be enabled on all architectures. Therefore depending on COMPILE_TEST as an alternative is no longer needed. As ARM_SCMI_PROTOCOL already depends on COMPILE_TEST, we also don't need to add COMPILE_TEST as an alternative dependency for it. Signed-off-by: Jean Delvare <jdelvare@suse.de> Link: https://lore.kernel.org/20241022134017.172411db@endymion.delvare Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-22pinctrl: qcom: add support for TLMM on SAR2130PDmitry Baryshkov
Add driver for the pincontrol device as present on the Qualcomm SAR2130P platform. This is based on the msm-5.10 tree, tag KERNEL.PLATFORM.1.0.r4-00400-NEO.0. Co-developed-by: Mayank Grover <groverm@codeaurora.org> Signed-off-by: Mayank Grover <groverm@codeaurora.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-22dt-bindings: pinctrl : qcom: document SAR2130P TLMMDmitry Baryshkov
Add bindings for the pin controller (TLMM) present on the Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-1-11a1d09a6e5f@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-22pinctrl: qcom: add the tlmm driver for QCS8300 platformsJingyi Wang
Add support for QCS8300 TLMM configuration and control via the pinctrl framework. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-2-8b8d3957cf1a@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-22dt-bindings: pinctrl: describe qcs8300-tlmmJingyi Wang
Add DT bindings for the TLMM controller on QCS8300 platforms. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-1-8b8d3957cf1a@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-19Merge tag 'renesas-pinctrl-for-v6.13-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.13 - Marks GPIOs as used on RZ/A1 and RZ/A2, - Add open-drain and schmitt-trigger support on RZ/V2H(P), - Miscellaneous fixes and improvements. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-19pinctrl: spacemit: add support for SpacemiT K1 SoCYixun Lan
SpacemiT's K1 SoC has a pinctrl controller which use single register to describe all functions, which include bias pull up/down(strong pull), drive strength, schmitter trigger, slew rate, mux mode. Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-2-03d395222e4f@gentoo.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-19dt-bindings: pinctrl: spacemit: add support for K1 SoCYixun Lan
Add dt-bindings for the pinctrl driver of SpacemiT's K1 SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-1-03d395222e4f@gentoo.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-17pinctrl: samsung: Add Exynos 990 SoC pinctrl configurationIgor Belwon
Add SoC pinctrl configuration for the Exynos 990. The bank types used are the same as Exynos 850, so we can reuse its macros. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241016154838.64515-4-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-17dt-bindings: pinctrl: samsung: Add exynos990-wakeup-eint compatibleIgor Belwon
Add a dedicated compatible for the exynos990-wakeup-eint node. This SoC pin controller does not mux interrupts. It's compatible with Exynos 850's node, while also being compatible with the Exynos7 fallback. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241016154838.64515-3-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-17dt-bindings: pinctrl: samsung: Add exynos990-pinctrl compatibleIgor Belwon
Add a dedicated compatible for the exynos990-pinctrl node. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241016154838.64515-2-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-16pinctrl: th1520: Fix potential null pointer dereference on funcColin Ian King
The initialization of muxtype deferences pointer func before func is sanity checked with a null pointer check, hence we have a null pointer deference issue. Fix this by only deferencing func with the assignment to muxtype after func has been null pointer checked. Fixes: 1fc30cd92770 ("pinctrl: th1520: Factor out casts") Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reported-by: Kees Bakker <kees@ijzerbout.nl> Acked-by: Drew Fustini <dfustini@tenstorrent.com> Link: https://lore.kernel.org/20241016155655.334518-1-colin.i.king@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-16pinctrl: sophgo: fix typo in tristate of SG2002Thomas Bonnefille
Fix typo in tristate definition of the SG2002 Pinctrl driver. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Link: https://lore.kernel.org/20241016-typo-pinctrl-sg2002-v1-1-2bdacb2d41e3@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-16dt-bindings: pinctrl: samsung: Add missing constraint for Exynos8895 interruptsKrzysztof Kozlowski
Expect only one interrupt on Exynos8895 wake-up pin controller. Fixes: e2d58d1e1c61 ("dt-bindings: pinctrl: samsung: add exynos8895-wakeup-eint compatible") Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241015065848.29429-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-16dt-bindings: pinctrl: samsung: Fix interrupt constraint for variants with ↵Krzysztof Kozlowski
fallbacks Commit 904140fa4553 ("dt-bindings: pinctrl: samsung: use Exynos7 fallbacks for newer wake-up controllers") added samsung,exynos7-wakeup-eint fallback to some compatibles, so the intention in the if:then: conditions was to handle the cases: 1. Single Exynos7 compatible or Exynos5433+Exynos7 or Exynos7885+Exynos7: only one interrupt 2. Exynos850+Exynos7: no interrupts This was not implemented properly however and if:then: block matches only single Exynos5433 or Exynos7885 compatibles, which do not exist in DTS anymore, so basically is a no-op and no enforcement on number of interrupts is made by the binding. Fix the if:then: condition so interrupts in the Exynos5433 and Exynos7885 wake-up pin controller will be properly constrained. Fixes: 904140fa4553 ("dt-bindings: pinctrl: samsung: use Exynos7 fallbacks for newer wake-up controllers") Cc: stable@vger.kernel.org Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241015065848.29429-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-15pinctrl: PINCTRL_K230 should depend on ARCH_CANAANGeert Uytterhoeven
The Canaan Kendryte K230 pin controller is only present on Canaan Kendryte K230 SoCs. Hence add a dependency on ARCH_CANAAN, to prevent asking the user about this driver when configuring a kernel without Canaan Kendryte series SoC platform support. Fixes: 545887eab6f6776a ("pinctrl: canaan: Add support for k230 SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/d70279ba02a67250203744b38314f4475b3c5671.1728986052.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-15pinctrl: th1520: add a CONFIG_OF dependencyArnd Bergmann
When compile-testing without CONfIG_OF: drivers/pinctrl/pinctrl-th1520.c: In function 'th1520_pinctrl_dt_node_to_map': drivers/pinctrl/pinctrl-th1520.c:455:23: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Wimplicit-function-declaration] 455 | ret = pinconf_generic_parse_dt_config(child, pctldev, &configs, &nconfigs); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | pinconf_generic_dump_config Enforce this using Kconig dependencies. Fixes: bed5cd6f8a98 ("pinctrl: Add driver for the T-Head TH1520 SoC") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Drew Fustini <drew@pdp7.com> Link: https://lore.kernel.org/20241015151126.2401855-1-arnd@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-14pinctrl: renesas: Select PINCTRL_RZG2L for RZ/V2H(P) SoCLad Prabhakar
Add explicit selection of the PINCTRL_RZG2L config option for the RZ/V2H(P) (R9A09G057) SoC, ensuring pin control driver is enabled for this SoC. Fixes: 9bd95ac86e70 ("pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC") Reported-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241010132726.702658-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-14pinctrl: renesas: rzg2l: Add support for configuring schmitt-triggerLad Prabhakar
Add support for configuring the multiplexed pins as schmitt-trigger inputs. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241004123658.764557-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-14pinctrl: renesas: rzg2l: Add support for enabling/disabling open-drain outputsLad Prabhakar
Add support for enabling and disabling open-drain outputs. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241004123658.764557-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-10-11pinctrl: amd: Fix two small typosMarc Ferland
Found those two while reading the code: EDGE_TRAGGER -> EDGE_TRIGGER BOTH_EADGE -> BOTH_EDGES No functional changes, compile tested only. Signed-off-by: Marc Ferland <marc.ferland@sonatest.com> Link: https://lore.kernel.org/20241009151249.2086702-1-marc.ferland@sonatest.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-11pinctrl: Switch back to struct platform_driver::remove()Uwe Kleine-König
After commit 0edb555a65d1 ("platform: Make platform_driver::remove() return void") .remove() is (again) the right callback to implement for platform drivers. Convert all platform drivers below drivers/pinctrl to use .remove(), with the eventual goal to drop struct platform_driver::remove_new(). As .remove() and .remove_new() have the same prototypes, conversion is done by just changing the structure member name in the driver initializer. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://lore.kernel.org/20241007205803.444994-8-u.kleine-koenig@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-12 13:37:32 +0000