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path: root/arch/arm/boot/dts/aspeed
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2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for CPLD IOE on Spider BoardRicky CX Wu
Add I2C mux for CPLD IOE on Spider Board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-4-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for four NICsRicky CX Wu
Add i2c-mux on Spider board for four NICs and add the temperature sensor and EEPROM for the NICs. Also remove the mctp-controller property on I2C bus 15 because we need to add the property on the I2C mux to each NIC so that the MCTP driver will ensure that each port is configured properly before communicating with the NICs. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: add i2c-mux for all Server Board slotsRicky CX Wu
Add i2c mux to 8 slots of server board and add the io expanders and eeprom for the slots. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241003074251.3818101-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Remove IO expanders on I2C bus 13Ricky CX Wu
Remove IO expanders on I2C bus 13 according to schematic change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20241001083021.3462426-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Add GPIO line namesNinad Palsule
Add following GPIO line names so that userspace can control them - PCH related GPIOs - FPGA related GPIOs Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-4-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Enable serial gpio0Ninad Palsule
Enable serial GPIO0. Set number of GPIO lines to 128 and bus frequency to 1MHz. Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-3-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: system1: Bump up i2c busses freqNinad Palsule
Bump up i2c8 and i2c15 bus frequency so that PCIe slot and FPGA runs faster Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20241001191756.234096-2-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: correct the compatible string of adm1272Ricky CX Wu
Remove the space in the compatible string of adm1272 to match the pattern of compatible. Fixes: 2b8d94f4b4a4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Fixes: 2b8d94f4b4a4765d ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC") Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240927085213.331127-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add i2c-mux for Management BoardRicky CX Wu
Add I2C mux for Management Board to separate the I2C bus 35 for updating CPLD firmware and I2C bus 34 for the other devices. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240926033534.4174707-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: update NIC1 fru addressPotin Lai
Update NIC1 FRU EEPROM address to 0x52 based on EVT changes. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-3-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: enable mac2Potin Lai
Enable mac2 in advance for DVT HW schematic. - EVT system: - eth0 (mac2): no NCSI - eth1 (mac3): with NCSI - DVT system: - eth0 (mac2): with NCSI - eth1 (mac3): with NCSI Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-2-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: move hdd board i2c mux bus to i2c5Potin Lai
Due to EVT hardware changes, move HDD board i2c mux bus from i2c30 to i2c5. Signed-off-by: Potin Lai <potin.lai@quantatw.com> Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-1-a861daeba059@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: revise flash layout to 128MBRicky CX Wu
Revise flash layout to 128MB since we are using 1GB flash memory in our project. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240924094430.272074-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise quad mode to dual modeRicky CX Wu
Revise quad mode to dual mode to keep the write protect feature for the SPI flash because the WP pin is the same pin with IO2 pin in quad mode. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240924094430.272074-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: add fru device for other bladesYang Chen
The Minerva platform has 16 compute blades and 6 network blades, each with an EEPROM that can be operated by the CMM. This commit adds support for each FRU. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-4-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: change the i2c mux number for FCBsYang Chen
Change the i2c mux channel to match the correct fan board location. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-3-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: minerva: Revise the SGPIO line nameYang Chen
Modify the SGPIO line names sent from the CMM CPLD in the DVT version and map the blade and FCB numbers to match the silkscreen labels on the rack as follows: 1. Change the compute blade numbering from 0-15 to 1-16. 2. Change the network blade numbering from 0-5 to 1-6. 3. Update the FCB numbering from TOP0/1, MID0/1, and BOT0/1 to FCB1-6. 4. Revise the SGPIO line name for DVT changed. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Link: https://patch.msgid.link/20240924140215.2484170-2-yangchen.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable spi-gpio setting for TPMRicky CX Wu
Enable spi-gpio setting for TPM device in yosemite4. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240920080227.711691-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Spider BoardRicky CX Wu
Revise adc128d818 adc mode on Spider Board according to schematic. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240920085007.1076174-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: catalina: add i2c-mux-idle-disconnect to all muxPotin Lai
Add the `i2c-mux-idle-disconnect` property to all i2c-mux nodes to ensure proper behavior when switching between multiple I2C buses. This avoids potential confusion caused by device addresses appearing on multiple buses when they are not actively selected. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20240920-catalina-i2c-mux-fix-2-v1-1-66cce7c54188@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Add gpio pca9506 for CPLD IOERicky CX Wu
We use CPLD to emulate gpio pca9506 I/O expander on each server boards. Therefore, add pca9506 to probe driver for the CPLD I/O expander. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910054751.2943217-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Revise to use adm1281 on Medusa boardRicky CX Wu
Revise to use adm1281 for HSC according to the hardware design change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910054751.2943217-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Enable PECI and LPC snoop for IBM System1Manojkiran Eda
This patch enables the PECI interface and configures the LPC Snoop for ports 0x80 and 0x81 in the ASPEED BMC for IBM System1. Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com> Link: https://patch.msgid.link/20240918-dts-aspeed-system1-peci-snoop-v2-1-2d4d17403670@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555Ricky CX Wu
Enable interrupt setting and add GPIO line name for pca9555 for the I/O expanders on Medusa board. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240918101742.1346788-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Fix Rainier and Blueridge GPIO LED namesEddie James
Blueridge LED names to include the "led-" prefix as is proper. Rainier should match for ease of application design. In addition, the gpio line name ought to match. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://patch.msgid.link/20240917162100.1386130-1-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: mtmitchell: Add gpio line names for io expandersChanh Nguyen
Add below gpio line names to io expanders for more platform features. - ext-vref-sel - presence-hdd-bp5-n - presence-hdd-bp6-n - bmc-ocp0-en-n - bmc-ocp1-en-n - bmc-riser-en-n - gpi0, gpi1 Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20240905063521.319416-3-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: mtmitchell: Add I2C FAN controllersChanh Nguyen
Add the MAX31790 nodes as i2c fan controllers. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://patch.msgid.link/20240905063521.319416-2-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Harma: revise sgpio line namePeter Yin
power-card-enable power-fault-n power-hsc-good power-chassis-good asic0-card-type-detection0-n asic0-card-type-detection1-n asic0-card-type-detection2-n presence-cmm uart-switch-button uart-switch-lsb uart-switch-msb reset-control-cmos-clear Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20240909080459.3457853-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Harma: add rtc devicePeter Yin
Add "nxp,pcf8563" device and the slave address is 0x51. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20240909080459.3457853-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable adc15Ricky CX Wu
Enable Yosemite4 adc15 config for monitoring P3V_BAT_SCALED. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910022236.1564291-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Enable watchdog2Ricky CX Wu
Enable watchdog2 setting for yosemite4 system. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://patch.msgid.link/20240910080951.3568594-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Change eeprom for Medusa BoardRicky CX Wu
Change eeprom on Medusa Board to AT24C128 according to hardware change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910084109.3585923-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: yosemite4: Remove temperature sensors on Medusa BoardRicky CX Wu
Remove two temperature sensors on Medusa Board according to hardware change. Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Link: https://patch.msgid.link/20240910085701.3595248-1-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13ARM: dts: aspeed: Fix at24 EEPROM node namesRob Herring (Arm)
at24.yaml defines the node name for at24 EEPROMs as 'eeprom'. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20240910215929.823913-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-09-11Merge tag 'aspeed-6.12-devicetree' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt ASPEED device tree updates for 6.12 - New machines * IBM P11 AST2600 BMC machines, named Blueridge and Fuji * Meta's Catalina AST2600 BMC - Updates to harma, minerva, mtmitchell, mtjade, system1, SPC621D8HM3 - Various changes to the dtsi to keep the YAML checker happy * tag 'aspeed-6.12-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (52 commits) ARM: dts: aspeed: catalina: Update io expander line names ARM: dts: aspeed: catalina: Add pdb cpld io expander ARM: dts: aspeed: harma: Remove pca9546 ARM: dts: aspeed: harma: Fix spi-gpio dtb_check warnings ARM: dts: aspeed: harma: Enable mctp controller ARM: dts: aspeed: harma: Add temperature device ARM: dts: aspeed: harma: Add fru device ARM: dts: aspeed: harma: Remove multi-host property ARM: dts: aspeed: harma: Add power monitor xdp710 ARM: dts: aspeed: harma: Add ina238 ARM: dts: aspeed: harma: Add sgpio name ARM: dts: aspeed: harma: Add VR devices ARM: dts: aspeed: harma: Revise hsc chip ARM: dts: aspeed-g6: Drop cells properties from ethernet nodes ARM: dts: aspeed-g6: Use generic 'ethernet' for ftgmac100 nodes ARM: dts: aspeed: Clean up AST2500 pinctrl properties ARM: dts: aspeed: Remove undocumented XDMA nodes ARM: dts: aspeed: Specify required properties for sram node ARM: dts: aspeed: Specify correct generic compatible for CVIC ARM: dts: aspeed: Fix coprocessor interrupt controller node name ... Link: https://lore.kernel.org/r/CACPK8XeGDUrbJ-OaxqQBR=aVVYyrKGnvT1ZKXO0vPHpsjQ_i9g@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05ARM: dts: Fix undocumented LM75 compatible nodesRob Herring
"lm75" without any vendor is undocumented. It works with the Linux kernel since the I2C subsystem will do matches of the compatible string without a vendor prefix to the i2c_device_id and/or driver name. Mostly replace "lm75" with "national,lm75" as that's the original part vendor and the compatible which matches what "lm75" matched with. In a couple of cases the node name or compatible gives a clue to the actual part and vendor and a more specific compatible can be used. In these cases, it does change the variant the kernel picks. "nct75" is an OnSemi part which is compatible with TI TMP75C based on a comparison of the OnSemi NCT75 datasheet and configuration the Linux driver uses. Adding an OnSemi compatible would be an ABI change. "nxp,lm75" is most likely an NXP part. Alexander Stein says the i.MX53 boards are a NXP LM75A as well. NXP makes a LM75A and LM75B. Both are 11-bit resolution and 100ms sample time. The "national,lm75a" is 9-bit, so "national,lm75b" is the closest match for both NXP variants. While we're here, fix the node names to use the generic name "temperature-sensor". Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> # am335x-nano.dts Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx53-mba53.dts, imx53-tqma53.dtsi Link: https://lore.kernel.org/r/20240816164717.1585629-1-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-27ARM: dts: aspeed: catalina: Update io expander line namesPotin Lai
io_expander7 - P1-5: MCU_GPIO - P1-6: MCU_RST_N - P1-7: MCU_RECOVERY_N io_expander8 - P1-5: SEC_MCU_GPIO - P1-6: SEC_MCU_RST_N - P1-7: SEC_MCU_RECOVERY_N Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://lore.kernel.org/r/20240823-catalina-ioexp-update-v1-2-4bfd8dad819c@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-27ARM: dts: aspeed: catalina: Add pdb cpld io expanderPotin Lai
Add more IO expanders which are emulated by the PDB CPLD. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://lore.kernel.org/r/20240823-catalina-ioexp-update-v1-1-4bfd8dad819c@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Remove pca9546Peter Yin
Remove pca9546 device from i2c bus 9. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-12-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Fix spi-gpio dtb_check warningsPeter Yin
Revise spi-gpio node and property name and remove max-ngpios. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-11-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Enable mctp controllerPeter Yin
Enable the mctp controller in i2c9. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-10-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add temperature devicePeter Yin
Add temperature device in i2c0 and i2c2. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-9-peteryin.openbmc@gmail.com [andrew: Fixed 'deivce' typo in commit message] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add fru devicePeter Yin
Add Aegis fru device and gpio expander device in bus 11. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-8-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Remove multi-host propertyPeter Yin
Harma is single host, so remove multi-host property. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-7-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add power monitor xdp710Peter Yin
Add HSC xdp710 device in i2c4. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-6-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add ina238Peter Yin
Add INA238 power monitor for Harma fan board. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-5-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add sgpio namePeter Yin
Add power-chassis-control and power-chassis-power for phosphor-power. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-4-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Add VR devicesPeter Yin
Add isl69260, xdpe152c4 devices. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed: harma: Revise hsc chipPeter Yin
Revise HSC chip name and address to match LTC4287. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240801160136.1281291-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22ARM: dts: aspeed-g6: Drop cells properties from ethernet nodesAndrew Jeffery
These are not specified in the binding and produce warnings such as the following: arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:254.27-262.5: Warning (avoid_unnecessary_addr_size): /ahb/ethernet@1e670000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:264.27-272.5: Warning (avoid_unnecessary_addr_size): /ahb/ethernet@1e690000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property arch/arm/boot/dts/aspeed/aspeed-ast2600-evb-a1.dtb: ethernet@1e660000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-7-1cb1378e5fcd@codeconstruct.com.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
generated by cgit (git 2.34.1) at 2025-07-30 22:09:38 +0000