| Age | Commit message (Collapse) | Author |
|---|
|
Commit 2d66c7803595da0d4bcd949825d598575f5de9e6 ("cpuimx27 and mbimx27:
allow fine control of UART4 and SDHC2 usage") added the Kconfig symbol
MACH_EUKREA_CPUIMX27_USEUART4. But it forgot to prepend CONFIG_ to the
use of its macro. Add that prefix now.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup
* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
+ Linux 3.9-rc3
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Those stuff defined in mx6q.h is used nowhere now. Remove the header.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Since we have converted IMX to multiplatform build, Makefile.boot is not
used anyway. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Some assignments of policy-> min/max/cur/cpuinfo.min_freq/cpuinfo.max_freq
aren't required as part of it is done by cpufreq driver or cpufreq core.
Remove them.
At some places we merge multiple lines together too.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
policy->cpus contains all online cpus that have single shared clock line. And
their frequencies are always updated together.
Many SMP system's cpufreq drivers take care of this in individual drivers but
the best place for this code is in cpufreq core.
This patch modifies cpufreq_notify_transition() to notify frequency change for
all cpus in policy->cpus and hence updates all users of this API.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
imx ssi block has two types of clocks:
- ipg: bus clock, the clock needed for accessing registers.
- per: peripheral clock, the clock needed for generating the bit rate.
Currently ssi driver only supports slave mode and thus need only to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
When building a kernel with CONFIG_PM undefined, the following warning happens:
arch/arm/mach-imx/avic.c:57:12: warning: 'avic_saved_mask_reg' defined but not used [-Wunused-variable]
Move avic_saved_mask_reg definition inside the '#ifdef CONFIG_PM' block to
avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
|
|
Fix the following sparse warnings:
arch/arm/mach-imx/mach-imx6q.c:60:6: warning: symbol 'imx6q_restart' was not declared. Should it be static?
arch/arm/mach-imx/mach-imx6q.c:223:24: warning: symbol 'imx6q_cpufreq_pdev' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warnings:
arch/arm/mach-imx/src.c:28:6: warning: symbol 'imx_enable_cpu' was not declared. Should it be static?
arch/arm/mach-imx/src.c:39:6: warning: symbol 'imx_set_cpu_jump' was not declared. Should it be static?
arch/arm/mach-imx/src.c:46:6: warning: symbol 'imx_src_prepare_restart' was not declared. Should it be static?
arch/arm/mach-imx/src.c:59:13: warning: symbol 'imx_src_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warnings:
arch/arm/mach-imx/gpc.c:29:6: warning: symbol 'imx_gpc_pre_suspend' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:43:6: warning: symbol 'imx_gpc_post_resume' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:71:6: warning: symbol 'imx_gpc_mask_all' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:83:6: warning: symbol 'imx_gpc_restore_all' was not declared. Should it be static?
arch/arm/mach-imx/gpc.c:122:13: warning: symbol 'imx_gpc_init' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/avic.c:54:14: warning: symbol 'avic_base' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/tzic.c:52:14: warning: symbol 'tzic_base' was not declared. Should it be static?
Also, remove the comment, as it does not apply for kernels newer than 3.2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/clk.c:3:1: warning: symbol 'imx_ccm_lock' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/clk-busy.c:150:16: warning: symbol 'clk_busy_mux_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
imx_irq_set_priority() is not used anywhere, so remove it.
This fixes the following sparse warnings:
arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'imx_irq_set_priority' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/clk-gate2.c:86:12: warning: symbol 'clk_register_gate2' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
rch/arm/mach-imx/clk-pllv2.c:232:16: warning: symbol 'clk_pllv2_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/clk-pllv1.c:81:16: warning: symbol 'clk_pllv1_ops' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warnings:
arch/arm/mach-imx/cpu-imx5.c:65:12: warning: symbol 'mx51_neon_fixup' was not declared. Should it be static?
arch/arm/mach-imx/cpu-imx5.c:99:5: warning: symbol 'mx53_revision' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/iomux-imx31.c:43:15: warning: symbol 'mxc_pin_alloc_map' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warning:
arch/arm/mach-imx/mm-imx3.c:85:13: warning: symbol 'imx3_init_l2x0' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Fix the following sparse warnings:
arch/arm/mach-imx/cpu.c:10:6: warning: symbol 'mxc_set_cpu_type' was not declared. Should it be static?
arch/arm/mach-imx/cpu.c:15:6: warning: symbol 'imx_print_silicon_rev' was not declared. Should it be static?
arch/arm/mach-imx/cpu.c:24:13: warning: symbol 'imx_set_aips' was not declared. Should it be static?
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
The old cpufreq driver is not necessary anymore with DT and
cpufreq-cpu0.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Commit a1f1c7e (arm/imx6q: add suspend/resume support) added
declaration for a non-existing function pl310_get_save_ptr() by
mistake. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Commit 13eed98 (arm/imx6q: add device tree machine support) added
duplicated function declaration for imx_enable_cpu() and
imx_set_cpu_jump(). Remove them.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
The initialization is done from the cpuidle framework.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
Use the CPUIDLE_FLAG_TIMER_STOP and let the cpuidle framework
to handle the CLOCK_EVT_NOTIFY_BROADCAST_ENTER/EXIT when entering
this state.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo <shawn.guo@linaro.org>:
The imx fixes for 3.9, take 4:
Running suspend/resume without no_console_suspend setting on kernel
cmdline will likely makes system hang. It causesd by the sync issue
between imx_cpu_die() and imx_cpu_kill() call. Fix the issue by
synchronizing the calls using cpu jumping argument register which is
free to use in kernel.
* tag 'imx-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill
ARM: imx: add dependency check for DEBUG_IMX_UART_PORT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Commit ce4f3313b05 (clk: add table lookup to mux) caused the following build
error on imx_v4_v5_defconfig/imx_v6_v7_defconfig:
arch/arm/mach-imx/clk-busy.c:172:11: error: 'struct clk_mux' has no member named 'width'
Fix it by passing the 'mask' field.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: shortened $SUBJECT line]
|
|
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
|
|
There is a sync issue with hotplug operation. It's possible that when
imx_cpu_kill gets running on primary core, the imx_cpu_die execution
on the core which is to be killed hasn't been finished yet. The problem
will very likely be hit when running suspend without no_console_suspend
setting on kernel cmdline.
It uses cpu jumping argument register to sync imx_cpu_die and
imx_cpu_kill. The register will be set in imx_cpu_die and imx_cpu_kill
will wait for the register being cleared to actually kill the cpu.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: <stable@vger.kernel.org>
|
|
git://git.pengutronix.de/git/imx/linux-2.6 into fixes
From Sascha Hauer <s.hauer@pengutronix.de>:
Two small ARM i.MX fixes for v3.9-rc
- Fix i.MX25 DT compilation
- Enable MAX clk on i.MX35
* tag 'arm-imx-fixes-for-3.9-rc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: i.MX35: enable MAX clock
ARM: i.MX25: Fix DT compilation
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The i.MX35 has two bits per clock gate which are decoded as follows:
0b00 -> clock off
0b01 -> clock is on in run mode, off in wait/doze
0b10 -> clock is on in run/wait mode, off in doze
0b11 -> clock is always on
The reset value for the MAX clock is 0b10.
The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being turned on. This
detection is made depending on the lower bit of the gate. If the reset
value has been altered by the bootloader to 0b11 the clock framework
will detect the clock as turned on, yet unused, hence it will turn it
off and the system locks up.
This patch turns the MAX clock on unconditionally making the Kernel
independent of the bootloader.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
The i.MX25 DT machine descriptor calls a non existing imx25_timer_init()
function. This patch adds it to fix compilation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Now that we have OF based init with CLKSRC_OF, convert smp_twd init
function to use it and covert all callers of
twd_local_timer_of_register.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-omap@vger.kernel.org
Cc: spear-devel@list.st.com
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
|
|
We always boot from PLL1, so let's have pll1_sys in the clks_init_on
list to have clk prepare/enable use count match the hardware status,
so that drivers managing pll1_sys like cpufreq can get the use count
right from the start.
Reported-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Building the kernel with allyesconfig fails because the i.mx early
resume code located in the .data section is unable to fixup the bl
relocation as the branch target gets too far away.
The idea of having code in the .data section allows for easy access to
nearby data using relative addressing while the MMU is off. However it
is probably best to move the code back to the .text section where it
belongs and fixup the data access instead. This solves the bl reloc
issue (at least until this becomes a general problem) and simplifies
the code as well.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Pull ARM SoC i.MX DT changes from Olof Johansson:
"This branch contains of devicetree changes for the Freescale i.MX
platform.
The base patch of the branch changes the format of the dts files to a
slightly different format that makes it easier to do derivative board
definitions, but it also introduces a lot of churn in the process
since every line of the file is touched.
On top of that are a handful of the regular changes; enabling more
boards as DT-based instead of legacy board files (mx25pdk), enabling
another driver for devicetree and thus adding bindings (onewire), etc.
I'm not happy about the churn, and will likely not take it for other
platforms in the future."
* tag 'late-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
ARM: dts: add dtsi for imx6q and imx6dl
ARM: dts: rename imx6q.dtsi to imx6qdl.dtsi
ARM: dts: i.MX6: Add regulator delay support
ARM: dts: Add device tree entry for onewire master on i.MX53
ARM: i.MX53: Add clocks for i.mx53 onewire master.
W1: Add device tree support to MXC onewire master.
ARM: imx: enable imx6q-cpufreq support
ARM: dts: Add apf51 basic support
ARM i.MX6: change mxs usbphy clock usage
ARM: dts: imx6q: Remove silicon version from SDMA firmware
ARM i.MX53: dts: add oftree for MBa53 baseboard
ARM i.MX53: add dts for the TQ tqma53 module
ARM: dts: imx53: pinctrl update
ARM i.MX51 babbage: Add keypad support
ARM: dts: imx: Add imx51 KPP entry
ARM: dts: imx25-karo-tx25: Put status entry in the end
ARM: mx25pdk: Add device tree support
ARM: dts: imx: use nodes label in board dts
ARM: dts: add missing imx dtb targets
ARM: boot: dts: Add an entry for imx27-pdk.dtb
...
|
|
Pull ARM SoC-specific updates from Arnd Bergmann:
"This is a larger set of new functionality for the existing SoC
families, including:
- vt8500 gains support for new CPU cores, notably the Cortex-A9 based
wm8850
- prima2 gains support for the "marco" SoC family, its SMP based
cousin
- tegra gains support for the new Tegra4 (Tegra114) family
- socfpga now supports a newer version of the hardware including SMP
- i.mx31 and bcm2835 are now using DT probing for their clocks
- lots of updates for sh-mobile
- OMAP updates for clocks, power management and USB
- i.mx6q and tegra now support cpuidle
- kirkwood now supports PCIe hot plugging
- tegra clock support is updated
- tegra USB PHY probing gets implemented diffently"
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
ARM: prima2: remove duplicate v7_invalidate_l1
ARM: shmobile: r8a7779: Correct TMU clock support again
ARM: prima2: fix __init section for cpu hotplug
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
arm: socfpga: Add SMP support for actual socfpga harware
arm: Add v7_invalidate_l1 to cache-v7.S
arm: socfpga: Add entries to enable make dtbs socfpga
arm: socfpga: Add new device tree source for actual socfpga HW
ARM: tegra: sort Kconfig selects for Tegra114
ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
ARM: tegra: Fix build error for gic update
ARM: tegra: remove empty tegra_smp_init_cpus()
ARM: shmobile: Register ARM architected timer
ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
ARM: shmobile: r8a7779: Correct TMU clock support
ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
ARM: mxs: use apbx bus clock to drive the timers on timrotv2
...
|
|
Pull ARM SoC cleanups from Arnd Bergmann:
"A large number of cleanups, all over the platforms. This is dominated
largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
others moving code out of arch/arm into more appropriate subsystems.
The clocksource and irqchip drivers are now abstracted to the point
where platforms that are already cleaned up do not need to even
specify the driver they use, it can all get configured from the device
tree as we do for normal device drivers. The clocksource changes
basically touch every single platform in the process.
We further clean up the use of platform specific header files here,
with the goal of turning more of the platforms over to being
"multiplatform" enabled, which implies that they cannot expose their
headers to architecture independent code any more.
It is expected that no functional changes are part of the cleanup.
The overall reduction in total code lines is mostly the result of
removing broken and obsolete code."
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
ARM: mvebu: correct gated clock documentation
ARM: kirkwood: add missing include for nsa310
ARM: exynos: move exynos4210-combiner to drivers/irqchip
mfd: db8500-prcmu: update resource passing
drivers/db8500-cpufreq: delete dangling include
ARM: at91: remove NEOCORE 926 board
sunxi: Cleanup the reset code and add meaningful registers defines
ARM: S3C24XX: header mach/regs-mem.h local
ARM: S3C24XX: header mach/regs-power.h local
ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
ARM: S3C24XX: transform s3c2443 subirqs into new structure
ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs
ARM: S3C24XX: move s3c2443 irq code to irq.c
ARM: S3C24XX: transform s3c2416 irqs into new structure
ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs
ARM: S3C24XX: move s3c2416 irq init to common irq code
ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property
ARM: S3C24XX: Move irq syscore-ops to irq-pm
clocksource: always define CLOCKSOURCE_OF_DECLARE
...
|
|
into next/fixes-non-critical
ARM: i.MX: clock fixes
- fix wrong timer clock on i.MX25 leading to strange timing inconsistencies
- fix SPI clocks for i.MX27
* tag 'arm-imx-clk-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: i.MX25: clk: parent per5_clk to AHB clock
ARM: imx27: clk-imx27: SPI: Rename IPG clock and add PER clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This resolves one non-obvious merge conflict between the imx cpuidle
patches and the imx DT changes for 3.9.
Conflicts:
arch/arm/mach-imx/mach-imx6q.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
MACH_MX31ADS_WM1133_EV1 already depends on REGULATOR_WM8350,
but that still allows REGULATOR_WM8350 to be a loadable
module. Depending on REGULATOR_WM8350 to be built-in
ensures we cannot create a broken configuration.
Without this patch, building allmodconfig results in:
arch/arm/mach-imx/built-in.o: In function `mx31_wm8350_init':
arch/arm/mach-imx/mach-mx31ads.c:461: undefined reference to `wm8350_register_regulator'
arch/arm/mach-imx/mach-mx31ads.c:471: undefined reference to `wm8350_dcdc_set_slot'
arch/arm/mach-imx/mach-mx31ads.c:473: undefined reference to `wm8350_isink_set_flash'
arch/arm/mach-imx/mach-mx31ads.c:480: undefined reference to `wm8350_dcdc25_set_mode'
arch/arm/mach-imx/mach-mx31ads.c:485: undefined reference to `wm8350_register_led'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Axel Lin <axel.lin@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
|
From Dinh Nguyen, this is a series of patches introducing support for
socfpga hardware (Altera Cyclone5). It also includes a cleanup that
moves some of the ARMv7 cache maintenance functions to a common location,
since three other platforms aready implemented it separately.
* socfpga/hw:
arm: socfpga: Add SMP support for actual socfpga harware
arm: Add v7_invalidate_l1 to cache-v7.S
arm: socfpga: Add entries to enable make dtbs socfpga
arm: socfpga: Add new device tree source for actual socfpga HW
Trivial conflict in arch/arm/mach-tegra/headsmp.S.
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
mach-socfpga is another platform that needs to use
v7_invalidate_l1 to bringup additional cores. There was a comment that
the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Pavel Machek <pavel@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Olof Johansson <olof@lixom.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
Update operating-points per hardware document and add support for
1 GHz and 1.2 GHz frequencies.
400 MHz, 800 MHz and 1 GHz should be supported by all i.MX6Q chips,
while 1.2 GHz support needs to know from OTP fuse bit.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
This mxs usbphy is only needs to be on after system boots
up, and software never needs to control it anymore.
Meanwhile, usbphy's parent needs to be notified if usb
is suspend or not. So we design below mxs usbphy usage:
- usbphy1_gate and usbphy2_gate:
Their parents are dummy clock, we only needs to enable
it after system boots up.
- usbphy1 and usbphy2
Usage reserved bit for this clock, in that case, the refcount
will be updated, but without hardware changing.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
