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2025-04-15arm64: dts: qcom: sm6115: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-12-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sdm845: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-11-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sdm670: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-10-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sc8280xp: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-9-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sc8180x: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-8-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sc7280: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-7-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sc7180: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-6-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sa8775p: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-5-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: qcm2290: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-4-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: msm8998: use correct size for VBIF regionsDmitry Baryshkov
Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-3-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sa8775p: mark MDP interconnects as ALWAYS onDmitry Baryshkov
Change the tag for MDP interconnects to QCOM_ICC_TAG_ALWAYS, so that if CPUSS collapses, the display may stay on. Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-2-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sc7280: Use the header with DSI phy clock IDsDmitry Baryshkov
Use the header with DSI phy clock IDs to make code more readable. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-1-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15arm64: dts: qcom: sdm660-xiaomi-lavender: Add missing SD card detect GPIOAlexey Minnekhanov
During initial porting these cd-gpios were missed. Having card detect is beneficial because driver does not need to do polling every second and it can just use IRQ. SD card detection in U-Boot is also fixed by this. Fixes: cf85e9aee210 ("arm64: dts: qcom: sdm660-xiaomi-lavender: Add eMMC and SD") Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415130101.1429281-1-alexeymin@postmarketos.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: msm8992-lg-h815: Fix CPU node "enable-method" property ↵Rob Herring (Arm)
dependencies The "spin-table" enable-method requires "cpu-release-addr" property, so add a dummy entry. It is assumed the bootloader will fill in the correct values. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-6-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: msm8939: Fix CPU node "enable-method" property dependenciesRob Herring (Arm)
The "spin-table" enable-method requires "cpu-release-addr" property, so add a dummy entry. It is assumed the bootloader will fill in the correct values. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-5-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: qdu1000: Fix qcom,freq-domainRob Herring (Arm)
The correct property name is 'qcom,freq-domain', not 'qcom,freq-domains'. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-4-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: Remove unnecessary MM_[UD]L audio routesLuca Weiss
Since commit 6fd8d2d275f7 ("ASoC: qcom: qdsp6: Move frontend AIFs to q6asm-dai") from over 4 years ago the audio routes beween MM_DL* + MultiMedia* Playback and MultiMedia* Capture + MM_UL* are not necessary anymore and can be removed from the dts files. It also helps to stop anyone copying these into new dts files. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Srinivas Kandagatla <srini@kernel.org> Link: https://lore.kernel.org/r/20250411-cleanup-mm-routes-v1-1-ba98f653aa69@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: enable MICs LDOAleksandrs Vinarskis
Particular device comes without headset combo jack, hence does not feature wcd codec IC. In such cases, DMICs are powered from vreg_l1b. Describe all 4 microphones in the audio routing. vdd-micb is defined for lpass-macro already. Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250412124956.20562-1-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-14arm64: dts: qcom: remove max-speed = 1G for RGMII for ethernetRussell King (Oracle)
The RGMII interface is designed for speeds up to 1G. Phylink already imposes the design limits for MII interfaces, and additional specification is unnecessary. Therefore, we can remove this property without any effect. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/E1u3bkm-000Epw-QU@rmk-PC.armlinux.org.uk Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8650: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-24-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8550: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-23-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8450: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-22-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8350: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-21-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8250: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-20-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm8150: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-19-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm6350: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-18-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm6125: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-17-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sm6115: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-16-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sdm845: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-15-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sdm670: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-14-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sdm630: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-13-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sc8180x: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-12-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: sc7180: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-11-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: qcm2290: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-10-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8998: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-9-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8996: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-8-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8976: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-7-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8953: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-6-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8939: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-5-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8917: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-4-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08arm64: dts: qcom: msm8916: Use the header with DSI phy clock IDsKrzysztof Kozlowski
Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-3-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-07Merge branch 'arm64-for-6.15' into arm64-for-6.16Bjorn Andersson
Changes queued for v6.15 would have had the potential to break bisectability and was therefor not accepted. Merge the whole set towards v6.16, as this is no longer a concern.
2025-03-26Merge tag 'platform-drivers-x86-v6.15-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform drivers updates from Ilpo Järvinen: - alienware-wmi: - Refactor and split WMAX/legacy drivers - dell-ddv: - Correct +0.1 offset in temperature - Use the power supply extension mechanism for battery temperatures - intel/pmc: - Refactor init to mostly use a common init function - Add support for Arrow Lake U/H - Add support for Panther Lake - intel/sst: - Improve multi die handling - Prefix header search path with sysroot (fixes cross-compiling) - lenovo-wmi-hotkey-utilities: - Support for mic & audio mute LEDs - samsung-galaxybook: - Add driver for Samsung Galaxy Book series - wmi: - Rework WCxx/WExx ACPI method handling - Enable data block collection when the data block is set - platform/arm: - Add Huawei Matebook E Go EC driver - platform/mellanox: - Relocate to drivers/platform/mellanox/ - mlxbf-bootctl: - RTC battery status sysfs support - Miscellaneous cleanups / refactoring / improvements * tag 'platform-drivers-x86-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (75 commits) platform/x86: x86-android-tablets: Add select POWER_SUPPLY to Kconfig platform/x86/amd/pmf: convert timeouts to secs_to_jiffies() platform/x86: thinkpad_acpi: convert timeouts to secs_to_jiffies() irqdomain: platform/x86: Switch to irq_domain_create_linear() platform/x86/amd/pmc: fix leak in probe() tools/power/x86/intel-speed-select: v1.22 release tools/power/x86/intel-speed-select: Prefix header search path with sysroot tools/power/x86/intel-speed-select: Die ID for IO dies tools/power/x86/intel-speed-select: Fix the condition to check multi die system tools/power/x86/intel-speed-select: Prevent increasing MAX_DIE_PER_PACKAGE platform/x86/amd/pmc: Use managed APIs for mutex platform/x86/amd/pmc: Remove unnecessary line breaks platform/x86/amd/pmc: Move macros and structures to the PMC header file platform/x86/amd/pmc: Notify user when platform does not support s0ix transition platform/x86: dell-ddv: Use the power supply extension mechanism platform/x86: dell-ddv: Use devm_battery_hook_register platform/x86: dell-ddv: Fix temperature calculation platform/x86: thinkpad_acpi: check the return value of devm_mutex_init() platform/x86: samsung-galaxybook: Fix block_recording not supported logic platform/x86: dell-uart-backlight: Make dell_uart_bl_serdev_driver static ...
2025-03-18arm64: dts: qcom: x1e001de-devkit: fix USB retimer reset polarityJohan Hovold
The ps8830 retimer reset is active low. Fix up the retimer nodes which were based on an early version of the driver which inverted the polarity. Fixes: 019e1ee32fec ("arm64: dts: qcom: x1e001de-devkit: Enable external DP support") Cc: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20250318074907.13903-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17arm64: dts: qcom: qcs8300: Add RPMh sleep statsMaulik Shah
Add RPMh stats to read low power statistics for various subsystem and SoC sleep modes. Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250317-add_qcom_stats-v1-1-016ae05ac4b0@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17arm64: dts: qcom: ipq9574: Add nsscc nodeDevi Priya
Add a node for the nss clock controller found on ipq9574 based devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/r/20250313110359.242491-6-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17arm64: dts: qcom: x1e80100: enable rtcJohan Hovold
On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which a driver can take into account. On X1E based Windows on Arm machines the offset is stored in a Qualcomm specific UEFI variable. Unlike on previous platforms the alarm registers are also unaccessible on X1E as they are owned by the ADSP. Assume all X1E machines use similar firmware and enable the RTC in the PMIC dtsi for now. Based on a patch by Jonathan Marek. [1] Link: https://lore.kernel.org/r/20241015004945.3676-4-jonathan@marek.ca # [1] Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Sebastian Reichel <sre@kernel.org> # Lenovo T14s Gen6 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250219134118.31017-7-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-17arm64: dts: qcom: sc8280xp-x13s: switch to uefi rtc offsetJohan Hovold
On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which a driver can take into account. Switch to using the Qualcomm specific UEFI variable that is used by the UEFI firmware (and Windows) to store the RTC offset. This specifically means that the RTC time will be synchronised between the UEFI firmware setup (or UEFI shell), Windows and Linux. Note however that Windows stores the RTC time in local time by default, while Linux typically uses UTC (i.e. as on X86). Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250219134118.31017-6-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-16arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2Luca Weiss
On SM8650 the CPUs 0-1 are "silver" (Cortex-A520), CPU 2-6 are "gold" (Cortex-A720) and CPU 7 is "gold-plus" (Cortex-X4). So reference the correct "gold" idle-state for CPU core 2. Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250314-sm8650-cpu2-sleep-v1-1-31d5c7c87a5d@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-16arm64: dts: qcom: sa8775p: Add LMH interrupts for cpufreq_hw nodeJagadeesh Kona
Add LMH interrupts for cpufreq_hw node to indicate if there is any thermal throttle. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250117-sa8775p-lmh-interrupts-v1-1-bae549f0bfe8@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>