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2020-11-27arm64: dts: mediatek: Add mt8183 power domains controllerMatthias Brugger
Add power domains controller node for SoC mt8183 Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-14-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: mediatek: Add smi_common node for MT8183Enric Balletbo i Serra
The SMI (Smart Multimedia Interface) Common is a bridge between the m4u (Multimedia Memory Management Unit) and the Multimedia HW. This block is needed to support different multimedia features, like display, video decode, and camera. Also is needed to control the power domains of such HW blocks. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-13-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: mediatek: Add mt8173 power domain controllerEnric Balletbo i Serra
Add power domain controller node for SoC mt8173. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-4-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27Merge branch 'linus' into sched/core, to resolve semantic conflictIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-11-27arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and MakefileSeiya Wang
Add basic chip support for Mediatek MT8192 Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Link: https://lore.kernel.org/r/20201030092207.26488-2-seiya.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: mediatek: add MT8167 pumpkin board dtsFabien Parent
The pumpkin board is made by Gossamer Engineering and is using a MediaTek SoC. The board currently comes in two available version: MT8516 SoC and MT8167 SoC. The board provides the following IOs: eMMC, NAND, SD card, USB type-A, Ethernet, Wi-Fi, Bluetooth, Audio (jack out, 2 PDM port, 1 analog in), serial over USB, HDMI, DSI, CSI, and an expansion header. The board can be powered by battery and/or via a USB Type-C port and is using a PMIC MT6392. The eMMC and NAND are sharing pins and cannot be used together. This commit is adding the basic boot support for the Pumpkin MT8167 board. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201027194816.1227654-3-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: mediatek: add dtsi for MT8167Fabien Parent
The MT8167 SoC provides the following peripherals: GPIO, UART, USB2, SPI, eMMC, SDIO, NAND, Flash, ADC, I2C, PWM, TImers, IR, Ethernet, Audio (I2S, SPDIF, TDM, HDMI), HDMI, DSI, CSI, MDP (Multimedia Data Path), Video encoding (H.264), Video Decoding (H.264, VP8). The MT8167 is compatible with MT8516 but provides multimedia IPs to it. This commit is just adding the basic dtsi file with the support of the following IOs: GPIO, Clocks. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201027194816.1227654-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: mediatek: mt8516: add efuse nodeFabien Parent
Add node to support e-fuses on MT8516 Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201016171837.3261310-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27arm64: dts: renesas: r8a77951: Add PCIe EP nodesYuya Hamamachi
Add PCIe EP nodes for R8A77951 SoC dtsi. Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com> Link: https://lore.kernel.org/r/20201125073303.19057-3-yuya.hamamachi.sx@renesas.com Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2020-11-27crypto: hisilicon/trng - add HiSilicon TRNG driver supportWeili Qian
Move existing char/hw_random/hisi-trng-v2.c to crypto/hisilicon/trng.c. Signed-off-by: Weili Qian <qianweili@huawei.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-11-26Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into arm/dt ARM64: DT: Hisilicon ARM64 DT updates for 5.11 - Cleanups of the hisilicon DTS to align with the dtschema. All of them do not have any functional effect except passing dtschema checks or dtc W=2 builds. * tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios" arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml arm64: dts: hisilicon: list all clocks required by pl011.yaml arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml arm64: dts: hisilicon: normalize the node name of the UART devices arm64: dts: hisilicon: normalize the node name of the usb devices arm64: dts: hisilicon: normalize the node name of the SMMU devices arm64: dts: hisilicon: place clock-names "biu" before "ciu" arm64: dts: hisilicon: remove unused property pinctrl-names arm64: dts: hisilicon: write the values of property-units into a uint32 array arm64: dts: hisilicon: separate each group of data in the property "reg" arm64: dts: hisilicon: normalize the node name of the ITS devices Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26Merge tag 'tegra-for-5.10-arm64-dt-fixes' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes arm64: tegra: Device tree fixes for v5.10-rc6 This contains a couple of fixes to device trees. Among other things, this restores suspend/resume on Jetson TX2 and makes USB OTG work on Jetson TX1. * tag 'tegra-for-5.10-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix Tegra234 VDK node names arm64: tegra: Wrong AON HSP reg property size arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1 arm64: tegra: Correct the UART for Jetson Xavier NX arm64: tegra: Disable the ACONNECT for Jetson TX2 Link: https://lore.kernel.org/r/20201125170306.1095734-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26Merge tag 'zynqmp-soc-fixes-for-v5.10-rc6' of ↵Arnd Bergmann
https://github.com/Xilinx/linux-xlnx into arm/fixes arm64: soc: ZynqMP SoC fixes for v5.10-rc6 - Fix SD dll reset issue by using proper macro - Fix PM feature checking for Xilinx Versal SoC * tag 'zynqmp-soc-fixes-for-v5.10-rc6' of https://github.com/Xilinx/linux-xlnx: (337 commits) firmware: xilinx: Use hash-table for api feature check firmware: xilinx: Fix SD DLL node reset issue Linux 5.10-rc4 kvm: mmu: fix is_tdp_mmu_check when the TDP MMU is not in use afs: Fix afs_write_end() when called with copied == 0 [ver #3] ocfs2: initialize ip_next_orphan panic: don't dump stack twice on warn hugetlbfs: fix anon huge page migration race mm: memcontrol: fix missing wakeup polling thread kernel/watchdog: fix watchdog_allowed_mask not used warning reboot: fix overflow parsing reboot cpu number Revert "kernel/reboot.c: convert simple_strtoul to kstrtoint" compiler.h: fix barrier_data() on clang mm/gup: use unpin_user_pages() in __gup_longterm_locked() mm/slub: fix panic in slab_alloc_node() mailmap: fix entry for Dmitry Baryshkov/Eremin-Solenikov mm/vmscan: fix NR_ISOLATED_FILE corruption on 64-bit mm/compaction: stop isolation if too many pages are isolated and we have pages to migrate mm/compaction: count pages and stop correctly during page isolation drm/nouveau/kms/nv50-: Use atomic encoder callbacks everywhere ... Link: https://lore.kernel.org/r/fd5ab967-f3cf-95fb-7947-5477ff85f97e@monstr.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26arm64: dts: qcom: sdm845: use GIC_SPI for IPA interruptsAlex Elder
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-4-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sc7180: use GIC_SPI for IPA interruptsAlex Elder
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-3-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sc7180: limit IPA iommu streamsAlex Elder
Recently we learned that Android and Windows firmware don't seem to like using 3 as an iommu mask value for IPA. A simple fix was to specify exactly the streams needed explicitly, rather than implying a range with the mask. Make the same change for the SC7180 platform. See also: https://lore.kernel.org/linux-arm-msm/20201123052305.157686-1-bjorn.andersson@linaro.org/ Fixes: d82fade846aa8 ("arm64: dts: qcom: sc7180: add IPA information") Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-2-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sm8150: Add Coresight supportSai Prakash Ranjan
Add coresight components found on Qualcomm Technologies, Inc. SM8150 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201126052422.24869-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: tegra: Fix Tegra194 HDA {clock,reset}-names orderingSameer Pujar
As per the HDA binding doc reorder {clock,reset}-names entries for Tegra194. This also serves as a preparation for converting existing binding doc to json-schema. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Enable AHCI on Jetson TX2Sowjanya Komatineni
This patch enables AHCI on Jetson TX2. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210Sowjanya Komatineni
Tegra AHCI dt-binding doc is converted from text based to yaml based. dtbs_check valdiation strictly follows reset-names order specified in yaml dt-binding. Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold. Tegra186 has 2 resets sata and sata-cold. This patch changes order of SATA resets to maintain proper resets order for commonly available resets across Tegra124 thru Tegra186 for dtbs_check to pass. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Add XUSB pad controller interruptJC Kuo
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194 XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake event happens. This is required for supporting XUSB host controller ELPG. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for ↵Matthias Kaehlcke
pp3300_hub The trogdor design has two options for supplying the 'pp3300_hub' power rail, it can be supplied by 'pp3300_l7c' or 'pp3300_a'. The 'pp3300_a' path includes a load switch that can be controlled through GPIO84. Initially trogdor boards used 'pp3300_l7c' to power the USB hub, newer revisions (will) use 'pp3300_a' as supply for 'pp3300_hub'. Add a DT node for the 'pp3300_a' path and a pinctrl entry for the GPIO. Make this path the default and keep trogdor rev1, lazor rev0 and rev1 on 'pp3300_l7c'. These earlier revisions also allocated the GPIO to the purpose of controlling the power switch, so there is no need to limit the pinctrl config to newer revisions. Remove the platform-wide 'always/boot-on' properties from 'pp3300_l7c' and add them to the boards that use this supply. Also delete the 'always/boot-on' properties of 'pp3300_hub' for these boards. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20201124164714.v4.1.I0ed4abdd2b2916fbedf76be254bc3457fb8b9655@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-25arm64: add config for Broadcom BCM4908 SoCsRafał Miłecki
Add ARCH_BCM4908 config that can be used for compiling DTS files. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-25arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS filesRafał Miłecki
They don't descibe hardware fully yet but it's enough to boot a system. Some missing blocks: 1. PMC (Power Management Controller?) 2. Ethernet 3. Crypto 4. Thermal Asus DTS is missing defining full NAND partitions layout and buttons. Further changes will fill those gaps as soon as required bindings will be found / tested / added. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-25kasan: arm64: set TCR_EL1.TBID1 when enabledPeter Collingbourne
On hardware supporting pointer authentication, we previously ended up enabling TBI on instruction accesses when tag-based ASAN was enabled, but this was costing us 8 bits of PAC entropy, which was unnecessary since tag-based ASAN does not require TBI on instruction accesses. Get them back by setting TCR_EL1.TBID1. Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-by: Andrey Konovalov <andreyknvl@google.com> Link: https://linux-review.googlesource.com/id/I3dded7824be2e70ea64df0aabab9598d5aebfcc4 Link: https://lore.kernel.org/r/20f64e26fc8a1309caa446fffcb1b4e2fe9e229f.1605952129.git.pcc@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-11-25arm64: Enable perf events based hard lockup detectorSumit Garg
With the recent feature added to enable perf events to use pseudo NMIs as interrupts on platforms which support GICv3 or later, its now been possible to enable hard lockup detector (or NMI watchdog) on arm64 platforms. So enable corresponding support. One thing to note here is that normally lockup detector is initialized just after the early initcalls but PMU on arm64 comes up much later as device_initcall(). So we need to re-initialize lockup detection once PMU has been initialized. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Alexandru Elisei <alexandru.elisei@arm.com> Link: https://lore.kernel.org/r/1602060704-10921-1-git-send-email-sumit.garg@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2020-11-25arm64: tegra: Rename ADMA device nodes for Tegra210Sameer Pujar
DMA device nodes should follow regex pattern of "^dma-controller(@.*)?$". This is a preparatory patch to use YAML doc format for ADMA. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERMThierry Reding
For some reason this was never hooked up. Do it now so that over-current interrupts can be logged. Reported-by: Nicolas Chauvet <kwizart@gmail.com> Suggested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zonesNicolas Chauvet
According to dmesg, thermal-zones for mem and cpu are missing hot temperatures properties. throttrip: pll: missing hot temperature ... throttrip: mem: missing hot temperature ... Adding them will clear the messages. Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Add missing gpu-throt-level to Tegra210 socthermNicolas Chauvet
On Jetson TX1 the following message can be seen: tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop This patch will fix the invalid prop issue according to the binding. Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Add missing hot temperatures to Tegra132 thermal-zonesNicolas Chauvet
According to dmesg, thermal-zones for mem and cpu are missing hot temperatures properties. throttrip: pll: missing hot temperature ... throttrip: mem: missing hot temperature ... Adding them will clear the messages. Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Fix DT binding for IO High Voltage entryVidya Sagar
Fix the device-tree entry that represents I/O High Voltage property by replacing 'nvidia,io-high-voltage' with 'nvidia,io-hv' as the former entry is deprecated. Fixes: dbb72e2c305b ("arm64: tegra: Add configuration for PCIe C5 sideband signals") Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Fix GIC400 missing GICH/GICV register regionsMarc Zyngier
GIC400 has full support for virtualization, and yet the tegra186 DT doesn't expose the GICH/GICV regions (despite exposing the maintenance interrupt that only makes sense for virtualization). Add the missing regions, based on the hunch that the HW doesn't use the CPU build-in interfaces, but instead the external ones provided by the GIC. KVM's virtual GIC now works with this change. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Add missing CPU PMUs on Tegra186Marc Zyngier
Add the description of CPU PMUs for both the Denver and A57 clusters, which enables the perf subsystem. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Fix Tegra234 VDK node namesJon Hunter
When the device-tree board file was added for the Tegra234 VDK simulator it incorrectly used the names 'cbb' and 'sdhci' instead of 'bus' and 'mmc', respectively. The names 'bus' and 'mmc' are required by the device-tree json-schema validation tools. Therefore, fix this by renaming these nodes accordingly. Fixes: 639448912ba1 ("arm64: tegra: Initial Tegra234 VDK support") Reported-by: Ashish Singhal <ashishsingha@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Wrong AON HSP reg property sizeDipen Patel
The AON HSP node's "reg" property size 0xa0000 will overlap with other resources. This patch fixes that wrong value with correct size 0x90000. Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Dipen Patel <dipenp@nvidia.com> Fixes: a38570c22e9d ("arm64: tegra: Add nodes for TCU on Tegra194") Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1JC Kuo
USB host mode is broken on the OTG port of Jetson TX1 platform because the USB_VBUS_EN0 regulator (regulator@11) is being overwritten by the vdd-cam-1v2 regulator. This commit rearranges USB_VBUS_EN0 to be regulator@14. Fixes: 257c8047be44 ("arm64: tegra: jetson-tx1: Add camera supplies") Cc: stable@vger.kernel.org Signed-off-by: JC Kuo <jckuo@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Correct the UART for Jetson Xavier NXJon Hunter
The Jetson Xavier NX board routes UARTA to the 40-pin header and UARTC to a 12-pin debug header. The UARTs can be used by either the Tegra Combined UART (TCU) driver or the Tegra 8250 driver. By default, the TCU will use UARTC on Jetson Xavier NX. Currently, device-tree for Xavier NX enables the TCU and the Tegra 8250 node for UARTC. Fix this by disabling the Tegra 8250 node for UARTC and enabling the Tegra 8250 node for UARTA. Fixes: 3f9efbbe57bc ("arm64: tegra: Add support for Jetson Xavier NX") Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: tegra: Disable the ACONNECT for Jetson TX2Jon Hunter
Commit ff4c371d2bc0 ("arm64: defconfig: Build ADMA and ACONNECT driver") enable the Tegra ADMA and ACONNECT drivers and this is causing resume from system suspend to fail on Jetson TX2. Resume is failing because the ACONNECT driver is being resumed before the BPMP driver, and the ACONNECT driver is attempting to power on a power-domain that is provided by the BPMP. While a proper fix for the resume sequencing problem is identified, disable the ACONNECT for Jetson TX2 temporarily to avoid breaking system suspend. Please note that ACONNECT driver is used by the Audio Processing Engine (APE) on Tegra, but because there is no mainline support for APE on Jetson TX2 currently, disabling the ACONNECT does not disable any useful feature at the moment. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-25arm64: dts: zynqmp: Wire mailbox with zynqmp-power driverMichal Simek
The support to driver was added by commit ffdbae28d9d1 ("drivers: soc: xilinx: Use mailbox IPI callback") that's why also enable it via DT by default. It setups communication with firmware via IPI interface. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/5d3523150890e494df308ee69523d0f0e7b33b22.1605185549.git.michal.simek@xilinx.com
2020-11-25arm64: dts: zynqmp: Fix pcie ranges descriptionMichal Simek
DT schema is checking tuples which should be properly separated. The patch is doing this separation to avoid the following warning: ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0, 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under any of the given schemas (Possible causes of the failure): ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0, 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com
2020-11-25arm64: zynqmp: Move gic node to axi busMichal Simek
The reason for this change is that after change from amba to axi U-Boot started to show error like: Unable to update property /axi/ethernet@ff0e0000:mac-address, err=FDT_ERR_NOTFOUND Unable to update property /axi/ethernet@ff0e0000:local-mac-address, err=FDT_ERR_NOTFOUND The reason is implementation in fdt_nodename_eq_() which is taken from dtc to the kernel and to the U-Boot. Especially DTC commit d2a9da045897 ("libfdt: Make unit address optional for finding nodes") which is in DTC from 2007. The part of commit description is " This is contrary to traditional OF-like finddevice() behaviour, which allows the unit address to be omitted (which is useful when the device name is unambiguous without the address)." The kernel commit dfff9066e60e ("arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml") changed amba-apu/amba to axi@0/axi but fdt_nodename_eq_() detects /axi/ as match for /axi@0/ because of commit above. That's why it easier to fix one DT inside the kernel by moving GIC node from own bus to generic axi bus as is done by others SoCs. This will avoid incorrect match because the unit address is omitted. Reported-by: Paul Thomas <pthomas8589@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com
2020-11-24arm64: defconfig: Enable Qualcomm PON driverBjorn Andersson
The PON block in the PMIC provides, among other things, support for "reboot reason", power key and reset "key" handling. Let's enable the driver for this block. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201125023831.99774-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variantSibi Sankar
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support frequencies upto 2.5 GHz. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1606198876-3515-2-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-liteSibi Sankar
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC since the gold cores only support frequencies upto 2.1 GHz. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/1606198876-3515-1-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdorTerry Hsiao
Add a label to the "pen-insert" node in sc7180-trogdor.dtsi Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com> Link: https://lore.kernel.org/r/20201116083014.547-1-terry_hsiao@compal.corp-partner.google.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger ↵Antony Wang
thermistor Trogdor has a thermistor to monitor the temperature of the charger IC. Add the ADC (monitor) nodes and a thermal zone for this thermistor. Signed-off-by: Antony Wang <antony_wang@compal.corp-partner.google.com> [mka: tweaked commit message] Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20201030084840.1.If389f211a8532b83095ff8c66ec181424440f8d6@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: pm6150x: add ADC_TM definitionsJishnu Prakash
Add ADC_TM peripheral definitions for PM6150 and PM6150L. Add ADC peripheral definition for PM6150l, which is needed for ADC_TM. Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org> Link: https://lore.kernel.org/r/1602160825-10414-2-git-send-email-jprakash@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: sdm845: Limit ipa iommu streamsBjorn Andersson
The Android and Windows firmware does not accept the use of 3 as a mask to cover the IPA streams. But with 0x721 being related to WiFi and 0x723 being unsed the mapping can be reduced to just cover 0x720 and 0x722, which is accepted. Acked-by: Alex Elder <elder@linaro.org> Tested-by: Alex Elder <elder@linaro.org> Fixes: e9e89c45bfeb ("arm64: dts: sdm845: add IPA iommus property") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201123052305.157686-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: qcom: fix indentation error in sm8250 cpu nodesJonathan Marek
Use tabs instead of 6 spaces. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20201123144016.19596-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-23 17:03:30 +0000