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Interrupt-remapping gets enabled very early in the boot, as it determines the
apic mode that the processor can use. And the current code enables the vt-d
fault handling before the setup_local_APIC(). And hence the APIC LDR registers
and data structure in the memory may not be initialized. So the vt-d fault
handling in logical xapic/x2apic modes were broken.
Fix this by enabling the vt-d fault handling in the end_local_APIC_setup()
A cleaner fix of enabling fault handling while enabling intr-remapping
will be addressed for v2.6.38. [ Enabling intr-remapping determines the
usage of x2apic mode and the apic mode determines the fault-handling
configuration. ]
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
LKML-Reference: <20101201062244.541996375@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: stable@kernel.org [v2.6.32+]
Acked-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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In x2apic mode, we need to set the upper address register of the fault
handling interrupt register of the vt-d hardware. Without this
irq migration of the vt-d fault handling interrupt is broken.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
LKML-Reference: <1291225233.2648.39.camel@sbsiddha-MOBL3>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: stable@kernel.org [v2.6.32+]
Acked-by: Chris Wright <chrisw@sous-sol.org>
Tested-by: Takao Indoh <indou.takao@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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During suspend, we disable all the non boot cpus. And during resume we bring
them all back again. So no need to do alternatives_smp_switch() in between.
On my core 2 based laptop, this speeds up the suspend path by 15msec and the
resume path by 5 msec (suspend/resume speed up differences can be attributed
to the different P-states that the cpu is in during suspend/resume).
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <1290557500.4946.8.camel@sbsiddha-MOBL3.sc.intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Alignment of alloc_bootmem() depends on the value of
L1_CACHE_SHIFT. What we need here, however, is 64 byte alignment. Use
alloc_bootmem_align() and explicitly specify the alignment instead.
This fixes a kernel boot crash reported by Jody when the cpu in .config
is set to MPENTIUMII but the kernel is booted on a xsave-capable CPU.
Reported-by: Jody Bruchon <jody@nctritech.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20101116212442.059967454@sbsiddha-MOBL3.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: <stable@kernel.org>
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The vdso Makefile passes linker-style -m options not to the linker but
to gcc. This happens to work with earlier gcc, but fails with gcc
4.6. Pass gcc-style -m options, instead.
Note: all currently supported versions of gcc supports -m32, so there
is no reason to conditionalize it any more.
Reported-by: H. J. Lu <hjl.tools@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
LKML-Reference: <tip-*@git.kernel.org>
Cc: <stable@kernel.org>
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When adjusting the code to handle removing the old nmi watchdog,
I forgot to consider the compile case when the local apic is not
enabled.
This change fixes the following build error:
arch/x86/kernel/apic/hw_nmi.c:28:6: error: redefinition of ‘touch_nmi_watchdog’
Signed-off-by: Don Zickus <dzickus@redhat.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Cc: Randy Dunlap <randy.dunlap@oracle.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Rakib Mullick <rakib.mullick@gmail.com>
LKML-Reference: <20101213153719.GD18577@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Add helper definition and function for MXS-based.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Add core definitions for MXS-based SoC MX23 and MX28.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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commit 995bd3bb5 (x86: Hpet: Avoid the comparator readback penalty)
chose 8 HPET cycles as a safe value for the ETIME check, as we had the
confirmation that the posted write to the comparator register is
delayed by two HPET clock cycles on Intel chipsets which showed
readback problems.
After that patch hit mainline we got reports from machines with newer
AMD chipsets which seem to have an even longer delay. See
http://thread.gmane.org/gmane.linux.kernel/1054283 and
http://thread.gmane.org/gmane.linux.kernel/1069458 for further
information.
Boris tried to come up with an ACPI based selection of the minimum
HPET cycles, but this failed on a couple of test machines. And of
course we did not get any useful information from the hardware folks.
For now our only option is to chose a paranoid high and safe value for
the minimum HPET cycles used by the ETIME check. Adjust the minimum ns
value for the HPET clockevent accordingly.
Reported-Bistected-and-Tested-by: Markus Trippelsdorf <markus@trippelsdorf.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <alpine.LFD.2.00.1012131222420.2653@localhost6.localdomain6>
Cc: Simon Kirby <sim@hostway.ca>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andreas Herrmann <Andreas.Herrmann3@amd.com>
Cc: John Stultz <johnstul@us.ibm.com>
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The delayed TSC init function does not check whether the system has no
TSC or TSC is disabled at the kernel command line, which results in a
crash in the work queue based extended calibration due to division by
zero because the basic calibration never happened.
Add the missing checks and do not touch TSC when not available or
disabled.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <johnstul@us.ibm.com>
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Now that there's an upstream polled gpio-keys driver, add the outstanding
platform data for it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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There are still quite a number of MFD and GPIO expander drivers that are
using the old irq_chip APIs that haven't had a chance to update during
the .37 cycle, resulting in allyes/modconfig errors on some
configurations.
Mark Brown has done most of the legwork to get these fixed up in .38,
so this should just be a .37 stop-gap that we can drop at the end of the
.38 merge window.
Reported-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch maps key0/key1/key2/key3 as HOME/MENU/BACK/POWER buttons
on mackerel board.
Signed-off-by: Tony SIM <chinyeow.sim.xt@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The current implementation of the v7_coherent_*_range function assumes
that the D and I cache lines have the same size, which is incorrect
architecturally. This patch adds the icache_line_size macro which reads
the CTR register. The main loop in v7_coherent_*_range is split in two
independent loops or the D and I caches. This also has the performance
advantage that the DSB is moved outside the main loop.
Reported-by: Kevin Sapp <ksapp@quicinc.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The current implementation of the dcache_line_size macro reads the L1
cache size from the CCSIDR register. This, however, is not guaranteed to
be the smallest cache line in the cache hierarchy. The patch changes to
the macro to use the more architecturally correct CTR register.
Reported-by: Kevin Sapp <ksapp@quicinc.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Completely unused.
Based upon a patch by Julian Calaby.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Julian Calaby <julian.calaby@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Commit fcf173e4511193b1efeccb0f22a8c641b464353b (usb: musb: add names for IRQs
in structure resource) forgot to assign name to the DA8xx MUSB IRQ resource.
Because of that MUSB driver fails to load on DA8xx machines.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
the following messages for all GPIO banks:
omap_hwmod: gpio1: cannot be enabled (3)
This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
Fix this and also fix two other macros that had the same problem.
Thanks to Tony Lindgren <tony@atomide.com> for originally reporting
this bug.
Signed-off-by: Paul Walmsley <paul@pwsan.com
Cc: Charulatha Varadarajan <charu@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Function qeth_l3_arp_query now queries for IPv6 addresses, too, if
QETH_QARP_WITH_IPV6 is passed as parameter to the ioctl. HiperSockets
and GuestLAN in HiperSockets mode provide corresponding entries.
Signed-off-by: Einar Lueck <elelueck@de.ibm.com>
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Please use omap1_defconfig instead, or search online
for a more optimized defconfig for your omap1 board.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The omap1_defconfig this should be eventually usable for booting
all omap1 machines. Generated based on:
$ grep ARCH_OMAP1=y arch/arm/configs/* | cut -d: -f1 | xargs cat | \
sort | uniq >> arch/arm/configs/omap1_defconfig
Then change few things manually, like use Nokia 770 CONFIG_CMDLINE
as it does not allow setting it in the bootloader.
Finally ran make savedefconfig on it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Otherwise multi-omap1 configurations will fail.
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Otherwise multi-omap1 support for omap1 won't work as the cpu_class_is_omap1()
won't work until the SoC is detected.
Note that eventually these will go away, please use ioremap + read/write instead.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This way we can use the generic omap SoC detection code instead.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ensure that the at24 eeprom driver is selected for certain boards that
need boot data (e.g. MAC address) from EEPROM.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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There was a single case of 'da850evm' prefix in the board-da850-evm.c file
where the reset of the prefixes were 'da850_evm'; change it to 'da850_evm' for
consistency.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Change the mach-davinci Kconfig file so that GPIO_PCA953X is default when
MACH_DAVINCI_DA850_EVM is set instead of always selecting. This allows users
to compile pca953x as a module.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sergei Shtylyov <sshtylyov@mvista.com>
CC: Nori, Sekhar <nsekhar@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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When the RMII PHY on the UI board is enabled with CONFIG_DA850_UI_RMII
then then following will be printed to the console when warnings are
also enabled:
WARNING: at drivers/gpio/gpiolib.c:1567 __gpio_set_value+0x4c/0x5c()
Modules linked in:
[<c002c6ac>] (unwind_backtrace+0x0/0xf8) from [<c003b48c>] (warn_slowpath_common+0x4c/0x64)
[<c003b48c>] (warn_slowpath_common+0x4c/0x64) from [<c003b4c0>] (warn_slowpath_null+0x1c/0x24)
[<c003b4c0>] (warn_slowpath_null+0x1c/0x24) from [<c01aed60>] (__gpio_set_value+0x4c/0x5c)
[<c01aed60>] (__gpio_set_value+0x4c/0x5c) from [<c0033bd4>] (da850_evm_ui_expander_setup+0x1e4/0x2
44)
[<c0033bd4>] (da850_evm_ui_expander_setup+0x1e4/0x244) from [<c02e2e1c>] (pca953x_probe+0x1f8/0x29
0)
<snip>
Traced the WARN_ON to the gpio_set_value(rmii_sel,0) call in
da850_evm_setup_emac_rmii. Replacing the call with the _cansleep variant
results in no more warning. Also replacing the gpio_set_value calls in the
teardown function.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Chris Cordahi <christophercordahi@nanometrics.ca>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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aemif_calc_rate() can return a negative error value, so all the
variables that get tested for this value need to be signed.
The maximum bit width of WSETUP(WSETUP_MAX) appears to be 30 bits
(0xf << 26). Using a signed instead of an unsigned integer
shouldn't make a difference here.
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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A common do-while loop can be factored out from the end of
the branches.
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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This patch applies the following modifications to the tnetv107x clock tree:
- reparent tnetv107x usb clocks to usbss
- mark timer1 as always enabled
- enable set_rate on pll divider output clocks
- adjust tnetv107x tsc sysclk rate lower to fix invalid reset defaults
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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This patch modifies the sysclk rate setting code to use the divider mask
specified in pll_data. Without this, devices with different divider ranges
(e.g. tnetv107x) fail.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Overwrite the default implementation of sched_clock that is based on
jiffies by something more precise. This improves timestamps in ftrace.
Implementation is copied from OMAP platform code.
Signed-off-by: Andreas Gaeer <Andreas.Gaer@baslerweb.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Enabling the musb OTG mode for SDP and PANDA boards.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Registering the twl6030-usb transceiver device as a child to twl6030 core.
Removed the NOP transceiver init call from board file.
Populated twl4030_usb_data platform data structure with the function
pointers for OMAP4430 internal PHY operation to be used by twl630-usb driver.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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setup_local_APIC() is used to setup local APIC early during CPU
initialization and already assumes that preemption is disabled on
entry. However, The function unnecessarily disables and enables
preemption and uses smp_processor_id() multiple times in and out of
the nested preemption disabled section. This gives the wrong
impression that the function might be able to handle being called with
preemption enabled and/or migrated to another processor in the middle.
Make it clear that the function is always called with preemption
disabled, drop the confusing preemption disable block and call
smp_processor_id() once at the beginning of the function.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Cyrill Gorcunov <gorcunov@gmail.com>
Reviewed-by: Pekka Enberg <penberg@kernel.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: brgerst@gmail.com
LKML-Reference: <4D00B3B9.7060702@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Selecting the twl6030-usb for OMAP4430SDP and OMAP4PANDA boards and
adding OMAP4 internal phy code for compilation
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Adding the twl6030-usb transceiver support for OMAP4 musb driver.
OMAP4 supports 2 types of transceiver interface.
1. UTMI: The PHY is embedded within OMAP4. The transceiver functionality
is split between the twl6030 PMIC chip and OMAP4430. The VBUS, ID pin
sensing and OTG SRP generation part is integrated in TWL6030 and UTMI PHY
functionality is embedded within the OMAP4430.
There is no direct interactions between the MUSB controller and TWL6030
chip to communicate the session-valid, session-end and ID-GND events.
It has to be done through a software by setting/resetting bits in
one of the control module register of OMAP4430 which in turn toggles
the appropriate signals to MUSB controller.
The internal transceiver has functional clocks and
powerdown bits to powerdown the PHY for power saving.
Since there is no option available for having 2 transceiver drivers
for one USB controller, internal PHY specific APIs are passed through
plaform_data function pointers to use in the twl6030-usb transceiver
driver.
2. ULPI interface is provided for off-chip transceivers.
Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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commit 4814ced5116e3b73dc4f63eec84999739fc8ed11 (OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Let musb work on 4430sdp as well. We can now
test any problems with multi-omap builds.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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musb core doesn't need to know about platform
specific details. So start moving clock
handling to platform glue layer and make
musb core agnostic about that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Just adding its own platform_driver, not really
using it yet.
Later patches will come to split power management
code from musb_core and move it completely to HW
glue layer.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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