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2023-11-14ARM: dts: qcom: pm8058: switch to interrupts-extendedDmitry Baryshkov
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-28-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8018: switch to interrupts-extendedDmitry Baryshkov
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-27-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8921: switch to interrupts-extendedDmitry Baryshkov
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad DYbcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-26-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8058: use defined IRQ flagsDmitry Baryshkov
Use symbolic names for IRQ flags instead of using the numeric values. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-25-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8921: move reg propertyDmitry Baryshkov
Move reg property to come after compatible. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-24-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8018: move reg propertyDmitry Baryshkov
Move reg property to come after compatible. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-23-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8921: reorder nodesDmitry Baryshkov
Move pm8921 device nodes to follow the alphanumberic sorting order. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-22-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: pm8058: reorder nodesDmitry Baryshkov
Move pm8058 device nodes to follow the alphanumberic sorting order. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-21-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8660: split PMIC to separate dtsi filesDmitry Baryshkov
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-20-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: mdm9615: split PMIC to separate dtsi filesDmitry Baryshkov
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-19-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: apq8064: split PMICs to separate dtsi filesDmitry Baryshkov
The PMICs are not a part of the SoC, so move PMICs to separate files and include them from the board files. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-18-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8960: split PMIC to separate dtsi filesDmitry Baryshkov
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-17-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8960: move PMIC interrupts to the board filesDmitry Baryshkov
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-16-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8660: move PMIC interrupts to the board filesDmitry Baryshkov
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-15-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: mdm9615: move PMIC interrupts to the board filesDmitry Baryshkov
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-14-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: apq8064: move PMIC interrupts to the board filesDmitry Baryshkov
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-13-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8960: fix PMIC node labelsDmitry Baryshkov
Change PM8921 node labels to start with pm8921_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-12-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8660: fix PMIC node labelsDmitry Baryshkov
Change PM8058 node labels to start with pm8058_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-11-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: mdm9615: fix PMIC node labelsDmitry Baryshkov
Change PM8018 node labels to start with pm8018_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-10-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: apq8064: fix PMIC node labelsDmitry Baryshkov
Change PM8921 node labels to start with pm8921_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-9-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: strip prefix from PMIC filesDmitry Baryshkov
As the vendor DTS files were moved to per-vendor subdirs, there no need to use common prefixes. Drop the `qcom-' prefix from PMIC dtsi file. This makes 32-bit qcom/ dts files closer to arm64 ones. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-8-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: mdm9615-wp8548-mangoh-green: group include clausesDmitry Baryshkov
Group file inclusion to follow contemporary practice. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-7-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: apq8064-nexus7: move sdcc1 node to proper placeDmitry Baryshkov
Move sdcc1 device node to follow the alphanumberic sorting order. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-6-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8660-surf: use keypad label directlyDmitry Baryshkov
Directly use pm8058_keypad to declare keypad properties instead of referencing pm8058 top-level node. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: msm8960: introduce label for PMIC keypadDmitry Baryshkov
To simplify MSM8960 CDP board file, add label to PMIC keypad node. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom: apq8064: correct XOADC register addressDmitry Baryshkov
The XOADC is present at the address 0x197 rather than just 197. It doesn't change a lot (since the driver hardcodes all register addresses), but the DT should present correct address anyway. Fixes: c4b70883ee33 ("ARM: dts: add XOADC and IIO HWMON to APQ8064") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230928110309.1212221-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom-sdx65: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-17-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14ARM: dts: qcom-sdx55: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-16-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: sm8350: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-15-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: sm8250: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-14-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: sm8150: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-13-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: sdm845: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-12-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: msm8998: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-11-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: msm8996: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-10-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: ipq8074: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-9-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14arm64: dts: qcom: ipq6018: switch USB QMP PHY to new style of bindingsDmitry Baryshkov
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230824211952.1397699-8-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-14Merge tag 'qcom-arm64-for-6.7-2' into arm64-for-6.8Bjorn Andersson
This merges leftover patches originally targetted for 6.7, but wasn't propagated in time. This describes the USB components on IPQ5018, and one of the SPI controllers. The IPQ9574 RDP descriptions are refactored to keep common dtsi, and the WPS button is described. GPLL0 is described as a source clock for the mailbox (APCS clock) across IPQ5332, IPQ6018, IPQ8074, and IPQ9574. On MSM8916, the asynchronous packet router (APR) is described on the DSP remoteproc, and audio services are described. Audio and modem are then enabled on a range of MSM8916- and MSM8939-based devices. GPU support is enabled on the Samsung Galaxy Tab devices, and RGB LED is added to BQ Aquaris X5 and BQ Aquaris M5. The QRB4210 RB2 is no longer hard coded to be in peripheral mode, and RPMh sleep stats are added to the SA8775P platform. Camera Control Interface (CCI) controllers are introduced on SC7280. One of the DP PHY compatibles on X13s is updated, to reflect that the it should operate in eDP mode. And missing camera LED pin configuration is added. Flash LED is described fo the SDM845-based OnePlus and Xiaomi devices. Missing description of USB PHY regulators are added to Sony Xperia 10 IV, and modem and ath10k-based WiFi are enabled. The uart for the Bluetooth controller on the SM6375 is added as well. The true rng block is added for SA8775P, SC7280, SM8450, an SM8550.
2023-11-14arm64: dts: renesas: rzg2lc-smarc-som: Enable 4-bit tx supportBiju Das
Enable 4-bit tx support for sbc node. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231108172232.259301-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-14arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx supportBiju Das
Enable 4-bit tx support for sbc node. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231108172232.259301-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-13ARM: dts: renesas: marzen: Rename keyboard nodesGeert Uytterhoeven
make dtbs_check: arch/arm/boot/dts/renesas/r8a7779-marzen.dtb: /: keyboard-gpio: {'compatible': ['gpio-keys-polled'], 'poll-interval': [[50]], 'pinctrl-0': [[29]], 'pinctrl-names': ['default'], 'key-3': {'gpios': [[28, 19, 1]], 'linux,code': [[4]], 'label': ['SW1-3'], 'debounce-interval': [[20]]}, 'key-4': {'gpios': [[28, 20, 1]], 'linux,code': [[5]], 'label': ['SW1-4'], 'debounce-interval': [[20]]}} is not of type 'array' from schema $id: http://devicetree.org/schemas/gpio/gpio-consumer.yaml# arch/arm/boot/dts/renesas/r8a7779-marzen.dtb: pinctrl@fffc0000: keyboard-gpio: {'pins': ['GP_0_19', 'GP_0_20'], 'bias-pull-up': True, 'phandle': [[29]]} is not of type 'array' from schema $id: http://devicetree.org/schemas/gpio/gpio-consumer.yaml# Node names ending in "-gpio" confuse the checker. Fix this by renaming the keyboards to "keypad-0" and "keypad-1", as they are not full keyboards. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/eec1ccfb75c6215428609fdcaf3a37c75fe1fc87.1698228163.git.geert+renesas@glider.be
2023-11-13ARM: dts: renesas: iwg22d-sodimm: Fix stmpe node namesGeert Uytterhoeven
make dtbs_check: arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dtb: stmpe811@44: 'stmpe_touchscreen' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/mfd/st,stmpe.yaml# arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dtb: stmpe811@44: 'stmpe_touchscreen' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/mfd/st,stmpe.yaml# Fix this by using recommended node names for the STMicroelectronics Port Expander (STMPE) device node and its subnode. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/40536ce7ca01e5acc9ed1d595f0e3a720eeb78d7.1698228434.git.geert+renesas@glider.be
2023-11-13arm64: dts: renesas: Add missing ADV751[13] power supply propertiesGeert Uytterhoeven
make dtbs_check: arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: hdmi-encoder@39: 'avdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: hdmi-encoder@39: 'dvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: hdmi-encoder@39: 'pvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: hdmi-encoder@39: 'dvdd-3v-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: hdmi-encoder@39: 'bgvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# ... Fix this by adding the missing power supply properties. Add fixed regulators where needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/4d58019b2f5f7ce026a5b671ac54aab79a58b278.1698068647.git.geert+renesas@glider.be
2023-11-13ARM: dts: renesas: Add missing ADV751[13] power supply propertiesGeert Uytterhoeven
make dtbs_check: arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: hdmi@39: 'avdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: hdmi@39: 'dvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: hdmi@39: 'pvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: hdmi@39: 'dvdd-3v-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: hdmi@39: 'bgvdd-supply' is a required property from schema $id: http://devicetree.org/schemas/display/bridge/adi,adv7511.yaml# ... Fix this by adding the missing power supply properties, and by adding fixed regulators where needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/6c49fd83d327a68040f052bd9fd96fe25b0fc301.1698068647.git.geert+renesas@glider.be
2023-11-13ARM: dts: renesas: rcar-gen2: Fix I2C bus demux node namesGeert Uytterhoeven
make dtbs_check: $nodename:0: 'i2c-10' does not match '^(i2c-?)?mux' Fix this by renaming all I2C bus demultiplexer node names to "i2c-mux<N>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/63e97cb50282b3255ba9654f539b9baa8c621b30.1698068647.git.geert+renesas@glider.be
2023-11-13riscv: dts: renesas: Convert isa detection to new propertiesConor Dooley
Convert the RZ/Five devicetrees to use the new properties "riscv,isa-base" & "riscv,isa-extensions". For compatibility with other projects, "riscv,isa" remains. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231009-smog-gag-3ba67e68126b@wendy Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-13ARM: dts: renesas: blanche: Add FLASH nodeGeert Uytterhoeven
Add a device node for the Spansion S29GL512S NOR FLASH on the Blanche development board. This FLASH resides in the external address space of the Local Bus State Controller. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7edb26bc29ad58198901ae6b6f869684473bb29d.1693481518.git.geert+renesas@glider.be
2023-11-13ARM: dts: renesas: marzen: Add FLASH nodeGeert Uytterhoeven
Add a device node for the Spansion S29GL512N NOR FLASH on the Marzen development board. This FLASH resides in the external address space of the Local Bus State Controller. Note that as the CFI-FLASH has a run-time conflict with CPU bring-up, it will only be available when booting with SMP disabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/440ce3bb950c34fd57071b4eec83ad9643b682e5.1693481518.git.geert+renesas@glider.be
2023-11-13x86/paravirt: Make the struct paravirt_patch_site packedHou Wenlong
Similar to struct alt_instr, make the struct paravirt_patch_site packed and get rid of all the .align directives and save 2 bytes for one PARA_SITE entry on X86_64. [ bp: Massage commit message. ] Suggested-by: Nadav Amit <namit@vmware.com> Signed-off-by: Hou Wenlong <houwenlong.hwl@antgroup.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/6dcb20159ded36586c5f7f2ae159e4e030256627.1686301237.git.houwenlong.hwl@antgroup.com
2023-11-13x86/paravirt: Use relative reference for the original instruction offsetHou Wenlong
Similar to the alternative patching, use a relative reference for original instruction offset rather than absolute one, which saves 8 bytes for one PARA_SITE entry on x86_64. As a result, a R_X86_64_PC32 relocation is generated instead of an R_X86_64_64 one, which also reduces relocation metadata on relocatable builds. Hardcode the alignment to 4 now. [ bp: Massage commit message. ] Signed-off-by: Hou Wenlong <houwenlong.hwl@antgroup.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/9e6053107fbaabc0d33e5d2865c5af2c67ec9925.1686301237.git.houwenlong.hwl@antgroup.com
2023-11-13x86/barrier: Do not serialize MSR accesses on AMDBorislav Petkov (AMD)
AMD does not have the requirement for a synchronization barrier when acccessing a certain group of MSRs. Do not incur that unnecessary penalty there. There will be a CPUID bit which explicitly states that a MFENCE is not needed. Once that bit is added to the APM, this will be extended with it. While at it, move to processor.h to avoid include hell. Untangling that file properly is a matter for another day. Some notes on the performance aspect of why this is relevant, courtesy of Kishon VijayAbraham <Kishon.VijayAbraham@amd.com>: On a AMD Zen4 system with 96 cores, a modified ipi-bench[1] on a VM shows x2AVIC IPI rate is 3% to 4% lower than AVIC IPI rate. The ipi-bench is modified so that the IPIs are sent between two vCPUs in the same CCX. This also requires to pin the vCPU to a physical core to prevent any latencies. This simulates the use case of pinning vCPUs to the thread of a single CCX to avoid interrupt IPI latency. In order to avoid run-to-run variance (for both x2AVIC and AVIC), the below configurations are done: 1) Disable Power States in BIOS (to prevent the system from going to lower power state) 2) Run the system at fixed frequency 2500MHz (to prevent the system from increasing the frequency when the load is more) With the above configuration: *) Performance measured using ipi-bench for AVIC: Average Latency: 1124.98ns [Time to send IPI from one vCPU to another vCPU] Cumulative throughput: 42.6759M/s [Total number of IPIs sent in a second from 48 vCPUs simultaneously] *) Performance measured using ipi-bench for x2AVIC: Average Latency: 1172.42ns [Time to send IPI from one vCPU to another vCPU] Cumulative throughput: 40.9432M/s [Total number of IPIs sent in a second from 48 vCPUs simultaneously] From above, x2AVIC latency is ~4% more than AVIC. However, the expectation is x2AVIC performance to be better or equivalent to AVIC. Upon analyzing the perf captures, it is observed significant time is spent in weak_wrmsr_fence() invoked by x2apic_send_IPI(). With the fix to skip weak_wrmsr_fence() *) Performance measured using ipi-bench for x2AVIC: Average Latency: 1117.44ns [Time to send IPI from one vCPU to another vCPU] Cumulative throughput: 42.9608M/s [Total number of IPIs sent in a second from 48 vCPUs simultaneously] Comparing the performance of x2AVIC with and without the fix, it can be seen the performance improves by ~4%. Performance captured using an unmodified ipi-bench using the 'mesh-ipi' option with and without weak_wrmsr_fence() on a Zen4 system also showed significant performance improvement without weak_wrmsr_fence(). The 'mesh-ipi' option ignores CCX or CCD and just picks random vCPU. Average throughput (10 iterations) with weak_wrmsr_fence(), Cumulative throughput: 4933374 IPI/s Average throughput (10 iterations) without weak_wrmsr_fence(), Cumulative throughput: 6355156 IPI/s [1] https://github.com/bytedance/kvm-utils/tree/master/microbenchmark/ipi-bench Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230622095212.20940-1-bp@alien8.de
generated by cgit (git 2.34.1) at 2025-09-22 16:30:18 +0000