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2023-12-07arm64: dts: qcom: pm8350k: Remove hanging whitespaceNia Espera
pmk8350 has a random tab character inserted, so remove it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Nia Espera <nespera@igalia.com> Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-3-3a638b02eea5@igalia.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8350: Fix DMA0 addressNia Espera
DMA0 node downstream is specified at 0x900000, so fix the typo. Without this, enabling any i2c node using DMA0 causes a hang. Fixes: bc08fbf49bc8 ("arm64: dts: qcom: sm8350: Define GPI DMA engines") Fixes: 41d6bca799b3 ("arm64: dts: qcom: sm8350: correct DMA controller unit address") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Nia Espera <nespera@igalia.com> Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-2-3a638b02eea5@igalia.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8180x: align APSS with bindingsKrzysztof Kozlowski
SC8180x APSS Devicetree bindings expect qcom,sc8180x-apss-shared to use qcom,sdm845-apss-shared fallback: sc8180x-lenovo-flex-5g.dtb: mailbox@17c00000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,sc8180x-apss-shared'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111204725.35707-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm6375-pdx225: add fixed touchscreen AVDD regulatorKrzysztof Kozlowski
The Samsung S6SY761 touchscreen bindings expect AVDD regulator which is missing in the Sony Xperia PDX225 DTS. There is however pinctrl setting for in the touchscreen device node with similar name: "avdd", so assume author wanted to control a fixed regulator with a GPIO. This fixes dtbs_check warning: sm6375-sony-xperia-murray-pdx225.dtb: touchscreen@48: 'avdd-supply' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231111164229.63803-6-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm6125: add interrupts to DWC3 USB controllerKrzysztof Kozlowski
Add interrupts to SM6125 DWC3 USB controller, based on downstream/vendor code of Trinket DTSI from Xiaomi Laurel device, to fix dtbs_check warnings: sm6125-xiaomi-laurel-sprout.dtb: usb@4ef8800: 'interrupt-names' is a required property sm6125-xiaomi-laurel-sprout.dtb: usb@4ef8800: 'oneOf' conditional failed, one must be fixed: 'interrupts' is a required property 'interrupts-extended' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20231111164229.63803-5-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm6115: align mem timer size cells with bindingsKrzysztof Kozlowski
Commit 70d1e09ebf19 ("arm64: dts: qcom: sm6115: Use 64 bit addressing") converted all addresses to 64-bit addressing, but the ARMv7 memory mapped architected timer bindings expect sizes up to 32-bit. Keep 64-bit addressing but change size of memory mapping to 32-bit (size-cells=1) and adjust the ranges to match this. This fixes dtbs_check warnings like: sm6115p-lenovo-j606f.dtb: timer@f120000: #size-cells:0:0: 1 was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111164229.63803-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8150: use 'gpios' suffix for PCI GPIOsKrzysztof Kozlowski
Linux handles both versions, but bindings expect GPIO properties to have 'gpios' suffix instead of 'gpio': sa8155p-adp.dtb: pci@1c00000: Unevaluated properties are not allowed ('perst-gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231111164229.63803-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8180x-primus: use 'gpios' suffix for PCI GPIOsKrzysztof Kozlowski
Linux handles both versions, but bindings expect GPIO properties to have 'gpios' suffix instead of 'gpio': sc8180x-primus.dtb: pci@1c10000: Unevaluated properties are not allowed ('perst-gpio', 'wake-gpio' were unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111164229.63803-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8180x-flex-5g: use 'gpios' suffix for PCI GPIOsKrzysztof Kozlowski
Linux handles both versions, but bindings expect GPIO properties to have 'gpios' suffix instead of 'gpio': sc8180x-lenovo-flex-5g.dtb: pci@1c08000: Unevaluated properties are not allowed ('perst-gpio', 'wake-gpio' were unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111164229.63803-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sdm845: correct Soundwire node nameKrzysztof Kozlowski
Soundwire Devicetree bindings expect the Soundwire controller device node to be named just "soundwire": sdm845-db845c.dtb: swm@c85: $nodename:0: 'swm@c85' does not match '^soundwire(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20231111095617.16496-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sdm845-db845c: correct LED panic indicatorKrzysztof Kozlowski
There is no "panic-indicator" default trigger but a property with that name: sdm845-db845c.dtb: leds: led-0: Unevaluated properties are not allowed ('linux,default-trigger' was unexpected) Fixes: 3f72e2d3e682 ("arm64: dts: qcom: Add Dragonboard 845c") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111095617.16496-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: qrb5165-rb5: correct LED panic indicatorKrzysztof Kozlowski
There is no "panic-indicator" default trigger but a property with that name: qrb5165-rb5.dtb: leds: led-user4: Unevaluated properties are not allowed ('linux,default-trigger' was unexpected) Fixes: b5cbd84e499a ("arm64: dts: qcom: qrb5165-rb5: Add onboard LED support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231111094623.12476-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8250: Add wakeup-source to usb_1 and usb_2Bryan O'Donoghue
To test out a different GDSC change I wanted to have a USB keypress resume a system in suspend. Adding wakeup-source to usb_1 and usb_2 "just works" for me on rb5. Consistent with qcm2290 and sa8775p add wakeup-source to the dtsi for the SoC. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231109004311.2449566-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sdm850-lenovo-yoga: Add wakeup-sourcesSteev Klimaszewski
The keyboard and touchpad can be used to wake the machine up from sleep, so mark them as such in the dts file. Signed-off-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231107-wakeup-source-v2-1-bf1562ef9367@kali.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sa8775p-ride: enable pmm8654au_0_pon_resinShazad Hussain
The volume down key is controlled by PMIC via the PON hardware on sa8775p platform, so enable the same for sa8775p-ride. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Link: https://lore.kernel.org/r/20231107120503.28917-1-quic_shazhuss@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8350: move DPU opp-table to its nodeKrzysztof Kozlowski
The Qualcomm MDSS bindings expect that DPU opp-table is defined within DPU node: sm8350-hdk.dtb: display-subsystem@ae00000: Unevaluated properties are not allowed ('opp-table' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231107103540.27353-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8280xp-x13s: drop sound-dai-cells from eDisplayPortKrzysztof Kozlowski
Qualcomm MDSS Embedded DisplayPort bindings do not allow sound-dai-cells: sc8280xp-lenovo-thinkpad-x13s.dtb: displayport-controller@aea0000: #sound-dai-cells: False schema does not allow [[0] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231107103540.27353-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8180x-primus: drop sound-dai-cells from eDisplayPortKrzysztof Kozlowski
Qualcomm MDSS Embedded DisplayPort bindings do not allow sound-dai-cells: sc8180x-primus.dtb: displayport-controller@ae9a000: #sound-dai-cells: False schema does not allow [[0]] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231107103540.27353-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8250: correct Soundwire node nameKrzysztof Kozlowski
Soundwire Devicetree bindings expect the Soundwire controller device node to be named just "soundwire": sm8250-xiaomi-elish-boe.dtb: soundwire-controller@3250000: $nodename:0: 'soundwire-controller@3250000' does not match '^soundwire(@.*)?$' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231107102111.16465-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8280xp: correct Soundwire node nameKrzysztof Kozlowski
Soundwire Devicetree bindings expect the Soundwire controller device node to be named just "soundwire": sc8280xp-lenovo-thinkpad-x13s.dtb: soundwire-controller@3210000: $nodename:0: 'soundwire-controller@3210000' does not match '^soundwire(@.*)?$' Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231107102111.16465-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: qdu1000-idp: drop unused LLCC multi-ch-bit-offKrzysztof Kozlowski
There is no "multi-ch-bit-off" property in LLCC, according to bindings and Linux driver: qdu1000-idp.dtb: system-cache-controller@19200000: 'multi-ch-bit-off' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231107080417.16700-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: qdu1000: correct LLCC reg entriesKrzysztof Kozlowski
According to bindings and Linux driver there is no "multi_channel_register" address space for LLCC. The first "reg" entry is supposed to be llcc0_base since commit 43aa006e074c ("dt-bindings: arm: msm: Fix register regions used for LLCC banks"): qdu1000-idp.dtb: system-cache-controller@19200000: reg: [[0, 421527552, 0, 14155776], [0, 438304768, 0, 524288], [0, 572293416, 0, 4]] is too long qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:0: 'llcc0_base' was expected qdu1000-idp.dtb: system-cache-controller@19200000: reg-names: ['llcc_base', 'llcc_broadcast_base', 'multi_channel_register'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231107080417.16700-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8450: fix soundwire controllers node nameNeil Armstrong
Fix the following dt bindings check: arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: soundwire-controller@31f0000: $nodename:0: 'soundwire-controller@31f0000' does not match '^soundwire(@.*)?$' from schema $id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml# Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8450-upstream-soundwire-bindings-fix-v1-1-41d4844a5a7d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8550: fix soundwire controllers node nameNeil Armstrong
Fix the following dt bindings check: arch/arm64/boot/dts/qcom/sm8550-mtp.dtb: soundwire-controller@6ab0000: $nodename:0: 'soundwire-controller@6ab0000' does not match '^soundwire(@.*)?$' from schema $id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml# Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8550-upstream-soundwire-bindings-fix-v1-1-4ded91c805a1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sc8280xp: Add in CAMCC for sc8280xpBryan O'Donoghue
Add in CAMCC for sc8280xp. The sc8280xp Camera Clock Controller looks similar to most of the sdmX, smX and now scX controllers. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231026105345.3376-5-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8550: Enable download mode register writeMukesh Ojha
Enable download mode setting for sm8550 which can help collect ramdump for this SoC. Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/1698253601-11957-4-git-send-email-quic_mojha@quicinc.com [bjorn: Updated tcsr offset, per Mukesh correction] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8350: Add TCSR halt register spaceMukesh Ojha
Enable download mode for sm8350 which can help collect ramdump for this SoC. Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1698253601-11957-3-git-send-email-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: sm8250: Add TCSR halt register spaceMukesh Ojha
Enable download mode for sm8250 which can help collect ramdump for this SoC. Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1698253601-11957-2-git-send-email-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: ipq5018: add few more reserved memory regionsKathiravan Thirumoorthy
Like all other IPQ SoCs, bootloader will collect the system RAM contents upon crash for the post morterm analysis. If we don't reserve the memory region used by bootloader, obviously linux will consume it and upon next boot on crash, bootloader will be loaded in the same region, which will lead to loose some of the data, sometimes we may miss out critical information. So lets reserve the region used by the bootloader. Similarly SBL copies some data into the reserved region and it will be used in the crash scenario. So reserve 1MB for SBL as well. While at it, enable the SMEM support along with TCSR mutex. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231025-ipq5018-misc-v1-1-7d14fde97fe7@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: ipq5332: add missing properties to the GPIO LED nodeKathiravan Thirumoorthy
Add the color and function property to the GPIO LED node, which are missed out in the initial submission. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231025-ipq5332-gpio-led-v1-1-0f0f52617648@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: ipq9574: enable GPIO based LEDKathiravan Thirumoorthy
Add support for wlan-2g LED on GPIO64. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231025-ipq9574-led-v2-1-59b2725697ad@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: qcom: qrb2210-rb1: use USB host modeCaleb Connolly
The default for the QCM2290 platform that this board is based on is OTG mode, however the role detection logic is not hooked up for this board and the dwc3 driver is configured to not allow role switching from userspace. Force this board to host mode as this is the preferred usecase until we get role switching hooked up. Fixes: e18771961336 ("arm64: dts: qcom: Add initial QTI RB1 device tree") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231025-b4-rb1-usb-host-v1-1-522616c575ef@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07arm64: dts: fsd: add specific compatibles for Tesla FSDKrzysztof Kozlowski
Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. This will also help reviews of new code using existing DTS as template. No functional impact on Linux drivers behavior. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231205092229.19135-7-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-07powerpc/Makefile: Auto detect cross compilerMichael Ellerman
If no cross compiler is specified, try to auto detect one. Look for various combinations, matching: powerpc(64(le)?)?(-unknown)?-linux(-gnu)?- There are more possibilities, but the above is known to find a compiler on Fedora and Ubuntu (which use linux-gnu-), and also detects the kernel.org cross compilers (which use linux-). This allows cross compiling with simply: # Ubuntu $ sudo apt install gcc-powerpc-linux-gnu # Fedora $ sudo dnf install gcc-powerpc64-linux-gnu $ make ARCH=powerpc defconfig $ make ARCH=powerpc -j 4 Inspired by arch/parisc/Makefile. Acked-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231206115548.1466874-4-mpe@ellerman.id.au
2023-12-07powerpc/Makefile: Default to ppc64le_defconfig when cross buildingMichael Ellerman
If the kernel is being cross compiled, there is no information from uname on which defconfig is most appropriate, so the Makefile defaults to ppc64. However these days almost all distros that support powerpc are little endian, so it's more likely that defaulting to ppc64le_defconfig will produce something useful for a user. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231206115548.1466874-3-mpe@ellerman.id.au
2023-12-07powerpc/vdso: No need to undef powerpc for 64-bit buildMichael Ellerman
The vdso Makefile adds -U$(ARCH) to CPPFLAGS for the vdso64.lds linker script. ARCH is always powerpc, so it becomes -Upowerpc, which means undefine the "powerpc" symbol. But the 64-bit compiler doesn't define powerpc in the first place, compare: $ gcc-5.1.0-nolibc/powerpc64-linux/bin/powerpc64-linux-gcc -m32 -E -dM - </dev/null | grep -w powerpc #define powerpc 1 $ gcc-5.1.0-nolibc/powerpc64-linux/bin/powerpc64-linux-gcc -m64 -E -dM - </dev/null | grep -w powerpc $ So there's no need to undefine it for the 64-bit linker script. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231206115548.1466874-2-mpe@ellerman.id.au
2023-12-07powerpc/Makefile: Don't use $(ARCH) unnecessarilyMichael Ellerman
There's no need to use $(ARCH) for references to the arch directory in the source tree, it is always arch/powerpc. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231206115548.1466874-1-mpe@ellerman.id.au
2023-12-07powerpc/book3s64: Avoid __pte_protnone() check in __pte_flags_need_flush()Aneesh Kumar K.V (IBM)
This reverts commit 1abce0580b89 ("powerpc/64s: Fix __pte_needs_flush() false positive warning") The previous patch dropped the usage of _PAGE_PRIVILEGED with PAGE_NONE. Hence this check can be dropped. Signed-off-by: "Aneesh Kumar K.V (IBM)" <aneesh.kumar@kernel.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231204093638.71503-2-aneesh.kumar@kernel.org
2023-12-07powerpc/book3s/hash: Drop _PAGE_PRIVILEGED from PAGE_NONEAneesh Kumar K.V (IBM)
There used to be a dependency on _PAGE_PRIVILEGED with pte_savedwrite. But that got dropped by commit 6a56ccbcf6c6 ("mm/autonuma: use can_change_(pte|pmd)_writable() to replace savedwrite") With the change in this patch numa fault pte (pte_protnone()) gets mapped as regular user pte with RWX cleared (no-access) whereas earlier it used to be mapped _PAGE_PRIVILEGED. Hash fault handling code gets some WARN_ON added in this patch because those functions are not expected to get called with _PAGE_READ cleared. commit 18061c17c8ec ("powerpc/mm: Update PROTFAULT handling in the page fault path") explains the details. Signed-off-by: "Aneesh Kumar K.V (IBM)" <aneesh.kumar@kernel.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231204093638.71503-1-aneesh.kumar@kernel.org
2023-12-07KVM: PPC: Book3S HV nestedv2: Do not cancel pending decrementer exceptionJordan Niethe
In the nestedv2 case, if there is a pending decrementer exception, the L1 must get the L2's timebase from the L0 to see if the exception should be cancelled. This adds the overhead of a H_GUEST_GET_STATE call to the likely case in which the decrementer should not be cancelled. Avoid this logic for the nestedv2 case. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-13-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Reduce reliance on analyse_instr() in mmio emulationJordan Niethe
Commit 709236039964 ("KVM: PPC: Reimplement non-SIMD LOAD/STORE instruction mmio emulation with analyse_instr() input") and commit 2b33cb585f94 ("KVM: PPC: Reimplement LOAD_FP/STORE_FP instruction mmio emulation with analyse_instr() input") made kvmppc_emulate_loadstore() use the results from analyse_instr() for instruction emulation. In particular the effective address from analyse_instr() is used for UPDATE type instructions and fact that op.val is all ready endian corrected is used in the STORE case. However, these changes now have some negative implications for the nestedv2 case. For analyse_instr() to determine the correct effective address, the GPRs must be loaded from the L0. This is not needed as vcpu->arch.vaddr_accessed is already set. Change back to using vcpu->arch.vaddr_accessed. In the STORE case, use kvmppc_get_gpr() value instead of the op.val. kvmppc_get_gpr() will reload from the L0 if needed in the nestedv2 case. This means if a byte reversal is needed must now be passed to kvmppc_handle_store() like in the kvmppc_handle_load() case. This means the call to kvmhv_nestedv2_reload_ptregs() can be avoided as there is no concern about op.val being stale. Drop the call to kvmhv_nestedv2_mark_dirty_ptregs() as without the call to kvmhv_nestedv2_reload_ptregs(), stale state could be marked as valid. This is fine as the required marking things dirty is already handled for the UPDATE case by the call to kvmppc_set_gpr(). For LOADs, it is handled in kvmppc_complete_mmio_load(). This is called either directly in __kvmppc_handle_load() if the load can be handled in KVM, or on the next kvm_arch_vcpu_ioctl_run() if an exit was required. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-12-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Register the VPA with the L0Jordan Niethe
In the nestedv2 case, the L1 may register the L2's VPA with the L0. This allows the L0 to manage the L2's dispatch count, as well as enable possible performance optimisations by seeing if certain resources are not being used by the L2 (such as the PMCs). Use the H_GUEST_SET_STATE call to inform the L0 of the L2's VPA address. This can not be done in the H_GUEST_VCPU_RUN input buffer. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-11-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Do not call H_COPY_TOFROM_GUESTJordan Niethe
H_COPY_TOFROM_GUEST is part of the nestedv1 API and so should not be called by a nestedv2 host. Do not attempt to call it. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-10-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Avoid msr check in kvmppc_handle_exit_hv()Jordan Niethe
The msr check in kvmppc_handle_exit_hv() is not needed for nestedv2 hosts, skip the check to avoid a H_GUEST_GET_STATE hcall. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-9-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Do not inject certain interruptsJordan Niethe
There is no need to inject an external interrupt in kvmppc_book3s_irqprio_deliver() as the test for BOOK3S_IRQPRIO_EXTERNAL in kvmhv_run_single_vcpu() before guest entry will raise LPCR_MER if needed. There is also no need to inject the decrementer interrupt as this will be raised within the L2 if needed. Avoiding these injections reduces H_GUEST_GET_STATE hcalls by the L1. Suggested-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-8-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV: Handle pending exceptions on guest entry with MSR_EENicholas Piggin
Commit 026728dc5d41 ("KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry") changed guest entry so that if external interrupts are enabled, BOOK3S_IRQPRIO_EXTERNAL is not tested for. Test for this regardless of MSR_EE. For an L1 host, do not inject an interrupt, but always use LPCR_MER. If the L0 desires it can inject an interrupt. Fixes: 026728dc5d41 ("KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [jpn: use kvmpcc_get_msr(), write commit message] Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-7-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Ensure LPCR_MER bit is passed to the L0Jordan Niethe
LPCR_MER is conditionally set during entry to a guest if there is a pending external interrupt. In the nestedv2 case, this change is not being communicated to the L0, which means it is not being set in the L2. Ensure the updated LPCR value is passed to the L0. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-6-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Get the PID only if needed to copy tofrom a guestJordan Niethe
kvmhv_copy_tofrom_guest_radix() gets the PID at the start of the function. If pid is not used, then this is a wasteful H_GUEST_GET_STATE hcall for nestedv2 hosts. Move the assignment to where pid will be used. Suggested-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-5-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Do not check msr on hcallsJordan Niethe
The check for a hcall coming from userspace is done for KVM-PR. This is not supported for nestedv2 and the L0 will directly inject the necessary exception to the L2 if userspace performs a hcall. Avoid checking the MSR and thus avoid a H_GUEST_GET_STATE hcall in the L1. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-4-vaibhav@linux.ibm.com
2023-12-07KVM: PPC: Book3S HV nestedv2: Avoid reloading the tb offsetJordan Niethe
The kvmppc_get_tb_offset() getter reloads KVMPPC_GSID_TB_OFFSET from the L0 for nestedv2 host. This is unnecessary as the value does not change. KVMPPC_GSID_TB_OFFSET also need not be reloaded in kvmppc_{s,g}et_dec_expires(). Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-3-vaibhav@linux.ibm.com